From patchwork Mon Dec 26 13:48:28 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Eric Miao X-Patchwork-Id: 5979 Return-Path: X-Original-To: patchwork@peony.canonical.com Delivered-To: patchwork@peony.canonical.com Received: from fiordland.canonical.com (fiordland.canonical.com [91.189.94.145]) by peony.canonical.com (Postfix) with ESMTP id 0AB1923E07 for ; Mon, 26 Dec 2011 13:48:52 +0000 (UTC) Received: from mail-ey0-f180.google.com (mail-ey0-f180.google.com [209.85.215.180]) by fiordland.canonical.com (Postfix) with ESMTP id 01479A1845C for ; Mon, 26 Dec 2011 13:48:51 +0000 (UTC) Received: by mail-ey0-f180.google.com with SMTP id c11so9057909eaa.11 for ; Mon, 26 Dec 2011 05:48:51 -0800 (PST) Received: by 10.205.138.136 with SMTP id is8mr6087286bkc.35.1324907331753; Mon, 26 Dec 2011 05:48:51 -0800 (PST) X-Forwarded-To: linaro-patchwork@canonical.com X-Forwarded-For: patch@linaro.org linaro-patchwork@canonical.com Delivered-To: patches@linaro.org Received: by 10.205.82.144 with SMTP id ac16cs149398bkc; Mon, 26 Dec 2011 05:48:51 -0800 (PST) Received: by 10.52.92.43 with SMTP id cj11mr11979194vdb.25.1324907329773; Mon, 26 Dec 2011 05:48:49 -0800 (PST) Received: from mail-vx0-f178.google.com (mail-vx0-f178.google.com [209.85.220.178]) by mx.google.com with ESMTPS id cm5si10551596vdc.46.2011.12.26.05.48.49 (version=TLSv1/SSLv3 cipher=OTHER); Mon, 26 Dec 2011 05:48:49 -0800 (PST) Received-SPF: pass (google.com: domain of eric.y.miao@gmail.com designates 209.85.220.178 as permitted sender) client-ip=209.85.220.178; Authentication-Results: mx.google.com; spf=pass (google.com: domain of eric.y.miao@gmail.com designates 209.85.220.178 as permitted sender) smtp.mail=eric.y.miao@gmail.com; dkim=pass (test mode) header.i=@gmail.com Received: by vcbfo11 with SMTP id fo11so10998513vcb.37 for ; Mon, 26 Dec 2011 05:48:49 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=mime-version:sender:in-reply-to:references:from:date :x-google-sender-auth:message-id:subject:to:content-type :content-transfer-encoding; bh=YyPOhkeeYZ1kGuoappK9Z5sjwarNj9Ng2SdqEUPHFLc=; b=HuKSRopELE3bSEMPk/yGrH27GeBxHOIKicWJWj1lrUbTnxp09nDdS9i1VwSuegUq6M jML9ukVRO1NJBcWtkvqyMiVM6gcB2r+nUIfueHHumZVIE5Rupd8HG//ngjM263DC7HES YXQyvyNPIIuOz/KHp4BTfrB87qyvAfk6RSU8c= Received: by 10.52.20.35 with SMTP id k3mr13342104vde.34.1324907329187; Mon, 26 Dec 2011 05:48:49 -0800 (PST) MIME-Version: 1.0 Sender: eric.y.miao@gmail.com Received: by 10.52.110.99 with HTTP; Mon, 26 Dec 2011 05:48:28 -0800 (PST) In-Reply-To: <1324561704-4145-1-git-send-email-eric.miao@linaro.org> References: <1324561704-4145-1-git-send-email-eric.miao@linaro.org> From: Eric Miao Date: Mon, 26 Dec 2011 21:48:28 +0800 X-Google-Sender-Auth: Uo0GR7yyyVz48BVMhvQZdMyzKZ4 Message-ID: Subject: Fwd: [PATCH] ARM: imx6q: add support for IRAM To: patches@linaro.org ---------- Forwarded message ---------- From: Eric Miao Date: Thu, Dec 22, 2011 at 9:48 PM Subject: [PATCH] ARM: imx6q: add support for IRAM To: linux-arm-kernel Cc: Jason Chen , Eric Miao From: Jason Chen Signed-off-by: Jason Chen Signed-off-by: Eric Miao ---  arch/arm/mach-imx/Kconfig             |    1 +  arch/arm/mach-imx/clock-imx6q.c       |    3 ++-  arch/arm/mach-imx/mach-imx6q.c        |    3 +++  arch/arm/plat-mxc/include/mach/mx6q.h |    6 ++++++  4 files changed, 12 insertions(+), 1 deletions(-) -- 1.7.5.4 diff --git a/arch/arm/mach-imx/Kconfig b/arch/arm/mach-imx/Kconfig index 6ee6803..023d240 100644 --- a/arch/arm/mach-imx/Kconfig +++ b/arch/arm/mach-imx/Kconfig @@ -602,6 +602,7 @@ config SOC_IMX6Q        select HAVE_IMX_GPC        select HAVE_IMX_MMDC        select HAVE_IMX_SRC +       select IRAM_ALLOC        select ARM_CPU_SUSPEND if PM        select USE_OF diff --git a/arch/arm/mach-imx/clock-imx6q.c b/arch/arm/mach-imx/clock-imx6q.c index 039a7ab..b347a84 100644 --- a/arch/arm/mach-imx/clock-imx6q.c +++ b/arch/arm/mach-imx/clock-imx6q.c @@ -1777,6 +1777,7 @@ DEF_CLK(mmdc_ch0_axi_clk, CCGR3, CG10, &periph_clk,         &mmdc_ch0_ipg_clk);  DEF_CLK(mmdc_ch1_ipg_clk, CCGR3, CG13, &ipg_clk,         NULL);  DEF_CLK(mmdc_ch1_axi_clk, CCGR3, CG11, &periph2_clk,     &mmdc_ch1_ipg_clk);  DEF_CLK(openvg_axi_clk,   CCGR3, CG13, &axi_clk,         NULL); +DEF_CLK(ocram_clk,       CCGR3, CG14, &ahb_clk,          NULL);  DEF_CLK(pwm1_clk,        CCGR4, CG8,  &ipg_perclk,       NULL);  DEF_CLK(pwm2_clk,        CCGR4, CG9,  &ipg_perclk,       NULL);  DEF_CLK(pwm3_clk,        CCGR4, CG10, &ipg_perclk,       NULL); @@ -1984,7 +1985,7 @@ int __init mx6q_clocks_init(void)        /* only keep necessary clocks on */        writel_relaxed(0x3 << CG0  | 0x3 << CG1  | 0x3 << CG2,  CCGR0);        writel_relaxed(0x3 << CG8  | 0x3 << CG9  | 0x3 << CG10, CCGR2); -       writel_relaxed(0x3 << CG10 | 0x3 << CG12,               CCGR3); +       writel_relaxed(0x3 << CG10 | 0x3 << CG12 | 0x1 << CG14, CCGR3);        writel_relaxed(0x3 << CG4  | 0x3 << CG6  | 0x3 << CG7,  CCGR4);        writel_relaxed(0x3 << CG0,                              CCGR5);        writel_relaxed(0,                                       CCGR6); diff --git a/arch/arm/mach-imx/mach-imx6q.c b/arch/arm/mach-imx/mach-imx6q.c index bee6334..d69f99f 100644 --- a/arch/arm/mach-imx/mach-imx6q.c +++ b/arch/arm/mach-imx/mach-imx6q.c @@ -24,6 +24,7 @@  #include  #include  #include +#include  /* For imx6q sabrelite board: set KSZ9021RN RGMII pad skew */  static int ksz9021rn_phy_fixup(struct phy_device *phydev) @@ -48,6 +49,8 @@ static void __init imx6q_init_machine(void)        of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL); +       iram_init(MX6Q_IRAM_BASE_ADDR, MX6Q_IRAM_SIZE); +        imx6q_pm_init();  } diff --git a/arch/arm/plat-mxc/include/mach/mx6q.h b/arch/arm/plat-mxc/include/mach/mx6q.h index 254a561..e051ff1 100644 --- a/arch/arm/plat-mxc/include/mach/mx6q.h +++ b/arch/arm/plat-mxc/include/mach/mx6q.h @@ -13,6 +13,8 @@  #ifndef __MACH_MX6Q_H__  #define __MACH_MX6Q_H__ +#include +  #define MX6Q_IO_P2V(x)                 IMX_IO_P2V(x)  #define MX6Q_IO_ADDRESS(x)             IOMEM(MX6Q_IO_P2V(x)) @@ -30,4 +32,8 @@  #define MX6Q_UART4_BASE_ADDR           0x021f0000  #define MX6Q_UART4_SIZE                        0x4000 +/* The last 4K is for cpu hotplug to workaround wdog issue */ +#define MX6Q_IRAM_BASE_ADDR            0x00900000 +#define MX6Q_IRAM_SIZE                 (SZ_256K - SZ_4K) +  #endif /* __MACH_MX6Q_H__ */