mbox series

[risu,0/9] risu: refactor and reduce CPU-specific code

Message ID 1487957728-8354-1-git-send-email-peter.maydell@linaro.org
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Series risu: refactor and reduce CPU-specific code | expand

Message

Peter Maydell Feb. 24, 2017, 5:35 p.m. UTC
This patchset refactors the risu C code to reduce the significant
amount of duplicated and duplicated-but-not-quite-the-same code
in the per-CPU files.

I've compile tested this for all architectures, but I'm not in a
position to do runtime tests for non-ARM (my attempt to use the
ppc64le risu under QEMU gives mismatch errors even without these
patches, and the m68k risu makes QEMU crash, presumably because our
m68k support isn't complete yet).  So I wasn't quite prepared to just
push it straight out to master the way I've done with previous
changes I've been making.

Nikunj, Laurent: if you have time to test this patchset to confirm
that it hasn't broken anything for you that would be great.
If not, no problem; I'll probably push it to master in a week
or so and we can sort any issues with it out later as separate
patches.

You can find a git branch with these changes at
https://git.linaro.org/people/peter.maydell/risu-dev.git cpu-refactor

(nb that's not the official risu upstream repo, but a different
one on the same server that I'm using for development/testing).


My motivation for all this, incidentally, is that I wanted to have
a go at resurrecting the x86 backend as a test case for how we
should support variable-length instruction sets. I got distracted
by how much duplicate code we were dealing with both in risugen
and in risu itself...

thanks
-- PMM


Peter Maydell (9):
  Drop the weird modification of a ucontext in the ppc reginfo_is_eq()
  Abstract out getting and setting parameter register
  Make get_risuop() a formal part of the CPU interface
  ppc64le, m68k: Make reginfo_dump() API match arm, aarch64
  m68k: Drop unused ucontext_t* argument to reginfo_is_eq()
  Make reginfo_{init,is_eq,dump,dump_mismatch} official per-CPU API
  Move send_register_info() to reginfo.c
  Move recv_and_compare_register_info() and report_match_status() to
    reginfo.c
  Tidy up #include lines

 Makefile               |   4 +-
 reginfo.c              | 151 ++++++++++++++++++++++++++++++++++++++++++++++
 risu.h                 |  43 ++++++++++++-
 risu_aarch64.c         | 152 +++-------------------------------------------
 risu_arm.c             | 159 ++++---------------------------------------------
 risu_m68k.c            | 136 +++---------------------------------------
 risu_ppc64le.c         | 136 +++---------------------------------------
 risu_reginfo_aarch64.h |  12 ----
 risu_reginfo_arm.h     |  12 ----
 risu_reginfo_m68k.c    |  23 +++----
 risu_reginfo_m68k.h    |  12 ----
 risu_reginfo_ppc64le.c |  59 ++++++++----------
 risu_reginfo_ppc64le.h |  12 ----
 13 files changed, 271 insertions(+), 640 deletions(-)
 create mode 100644 reginfo.c

-- 
2.7.4

Comments

Laurent Vivier Feb. 24, 2017, 6:15 p.m. UTC | #1
Le 24/02/2017 à 18:35, Peter Maydell a écrit :
> This patchset refactors the risu C code to reduce the significant

> amount of duplicated and duplicated-but-not-quite-the-same code

> in the per-CPU files.

> 

> I've compile tested this for all architectures, but I'm not in a

> position to do runtime tests for non-ARM (my attempt to use the

> ppc64le risu under QEMU gives mismatch errors even without these

> patches, and the m68k risu makes QEMU crash, presumably because our

> m68k support isn't complete yet).  So I wasn't quite prepared to just


Yes, the FPU part is missing.

> push it straight out to master the way I've done with previous

> changes I've been making.

> 

> Nikunj, Laurent: if you have time to test this patchset to confirm

> that it hasn't broken anything for you that would be great.


for m68k
Tested-by: Laurent Vivier <laurent@vivier.eu>


> 

> My motivation for all this, incidentally, is that I wanted to have

> a go at resurrecting the x86 backend as a test case for how we

> should support variable-length instruction sets.


I think m68k is needing that too.

Thanks,
Laurent
Peter Maydell Feb. 24, 2017, 6:17 p.m. UTC | #2
On 24 February 2017 at 18:15, Laurent Vivier <laurent@vivier.eu> wrote:
> Le 24/02/2017 à 18:35, Peter Maydell a écrit :

>> My motivation for all this, incidentally, is that I wanted to have

>> a go at resurrecting the x86 backend as a test case for how we

>> should support variable-length instruction sets.

>

> I think m68k is needing that too.


Yep; but I don't have an m68k to hand, whereas I do have
x86-64 ;-)

thanks
-- PMM
Peter Maydell Feb. 28, 2017, 5:47 p.m. UTC | #3
On 24 February 2017 at 18:15, Laurent Vivier <laurent@vivier.eu> wrote:
> Le 24/02/2017 à 18:35, Peter Maydell a écrit :

>> This patchset refactors the risu C code to reduce the significant

>> amount of duplicated and duplicated-but-not-quite-the-same code

>> in the per-CPU files.

>>

>> I've compile tested this for all architectures, but I'm not in a

>> position to do runtime tests for non-ARM (my attempt to use the

>> ppc64le risu under QEMU gives mismatch errors even without these

>> patches, and the m68k risu makes QEMU crash, presumably because our

>> m68k support isn't complete yet).  So I wasn't quite prepared to just

>

> Yes, the FPU part is missing.

>

>> push it straight out to master the way I've done with previous

>> changes I've been making.

>>

>> Nikunj, Laurent: if you have time to test this patchset to confirm

>> that it hasn't broken anything for you that would be great.

>

> for m68k

> Tested-by: Laurent Vivier <laurent@vivier.eu>


Thanks; I've gone ahead and pushed this series to risu master.

-- PMM