From patchwork Thu Jul 27 10:59:05 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 108821 Delivered-To: patches@linaro.org Received: by 10.140.101.44 with SMTP id t41csp1891372qge; Thu, 27 Jul 2017 03:59:12 -0700 (PDT) X-Received: by 10.223.177.143 with SMTP id q15mr2987214wra.200.1501153152098; Thu, 27 Jul 2017 03:59:12 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1501153152; cv=none; d=google.com; s=arc-20160816; b=SoAp/KGT0BfSZCTUhBRO9OwvzsKLeS8iCtCfwklXEVRC+MpnJbrZ07JRoSR5vcJH7E I1UfEvnTYph8ifwb5rvJtxNwUfR1SwUmDmH5SulGIHOVmVkN1y7OzvoTXf9ZZb+aFecU xPg9WPC+3zaguVk4I6sLMXPs0TuoG8zOb9ZU7QAA4oQcCVfGccnh/I14gwSD5FXgBXwh vybqz8VpqWTG1GCaHWpLzRVqK5RJWIkp5Sia25iGqHHVDEtEJ/5vBdgPaEO/VT1xcTqw Y9+L9LgtnBwre6TshBnY2XMGTsYdAdFXdXOvHfCO9a0ImMmKvEWuvRNbDJlX8EtFJQMk hljg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=message-id:date:subject:cc:to:from:arc-authentication-results; bh=ukhlL9MmlwcExcss72INKcVlEV84ZqVyBsyXh9+7g1A=; b=auIYl6QJTt4rm0mXw0eVPjmiaeClL1C+taFF1EIHwX8XsGy+lexQAZOiONvznN/tVz 8E7o0PQ9jBGNDMsgPZiwpDcwUEwTnGOeDtCf9BB0pzVwXjl0uQ8egbR5fNCnHv3dq+j1 P0O5BCEv8YLuXtNiEqmGRogCQQmTVCT4mx94BJKngi6NCZWEpH++Ei8xhYrGbwcfJe/w MW66HsLhQhAemKd1l+65h9xkyzKbs2tLz8SmClgcMCnjUE7trWLsqk2fYd/Nb9Tvg/Ha tv7sNHYROsroYAcbNQS4lErFd3Quc1bT2kXIj6mzNN3nOjyUb4vrX1qfCiX3dQvYjEYm 9vKA== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of pm215@archaic.org.uk designates 2001:8b0:1d0::2 as permitted sender) smtp.mailfrom=pm215@archaic.org.uk; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from orth.archaic.org.uk (orth.archaic.org.uk. [2001:8b0:1d0::2]) by mx.google.com with ESMTPS id o88si4408307wmi.31.2017.07.27.03.59.11 for (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 27 Jul 2017 03:59:12 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of pm215@archaic.org.uk designates 2001:8b0:1d0::2 as permitted sender) client-ip=2001:8b0:1d0::2; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of pm215@archaic.org.uk designates 2001:8b0:1d0::2 as permitted sender) smtp.mailfrom=pm215@archaic.org.uk; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from pm215 by orth.archaic.org.uk with local (Exim 4.84_2) (envelope-from ) id 1dagVb-0003lK-64; Thu, 27 Jul 2017 11:59:11 +0100 From: Peter Maydell To: qemu-arm@nongnu.org, qemu-devel@nongnu.org Cc: patches@linaro.org Subject: [PATCH for-2.10 0/5] M profile MPU bugfixes Date: Thu, 27 Jul 2017 11:59:05 +0100 Message-Id: <1501153150-19984-1-git-send-email-peter.maydell@linaro.org> X-Mailer: git-send-email 2.7.4 This patchset fixes some bugs in the M profile MPU code: * the guest shouldn't be able to make system space executable * PPB region accesses should not be subject to MPU lookups * we were not resetting the PMSAv7 MPU state for M profile CPUs * we weren't migrating the MPU_RNR state The renaming from cp15.c6_rgnr to pmsav7.rnr is not strictly necessary for 2.10, but it doesn't affect many places in the code and it restores the invariant that no mutable M profile CPU state is stored in env->cp15.something fields. thanks -- PMM Peter Maydell (5): target/arm: Don't do MPU lookups for addresses in M profile PPB region target/arm: Don't allow guest to make System space executable for M profile target/arm: Rename cp15.c6_rgnr to pmsav7.rnr target/arm: Move PMSAv7 reset into arm_cpu_reset() so M profile MPUs get reset target/arm: Migrate MPU_RNR register state for M profile cores hw/intc/armv7m_nvic.c | 14 +++++------ target/arm/cpu.c | 14 +++++++++++ target/arm/cpu.h | 3 +-- target/arm/helper.c | 67 +++++++++++++++++++++++++++++++++++---------------- target/arm/machine.c | 30 ++++++++++++++++++++++- 5 files changed, 97 insertions(+), 31 deletions(-) -- 2.7.4