From patchwork Thu Dec 7 18:14:47 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 121040 Delivered-To: patches@linaro.org Received: by 10.140.22.227 with SMTP id 90csp8688600qgn; Thu, 7 Dec 2017 10:14:56 -0800 (PST) X-Google-Smtp-Source: AGs4zMZ8GEl8qQO4XrqAn8KyQoJ8Ueevtu88qrAPGDO+CdWQPuP7Ka7YYb9ixufSDqFlNLN1ChcC X-Received: by 10.223.163.11 with SMTP id c11mr25196319wrb.214.1512670496517; Thu, 07 Dec 2017 10:14:56 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1512670496; cv=none; d=google.com; s=arc-20160816; b=HJy6OpMwHRs2I0lMOslWZPXG18WT2y2YmnP2dV3mar4UuZKcT7grmFV+WtR6IInq2w WFcmyniDDk+PbYC78RYMzJup8s6QAx5BkHRFtUr8Dy+SITeNo1OKjndBHH1cYnBR7vtS CQa0Ddd8Xw8v5TdrLIoga38+L3N6gT2ih2NeDDu6SMUmIHoaC+/0+6H/AsFlUQcLs5Gp fm4JnnYW61zl0tH4TfxYNOIS3SmqlSYTHwmFhl9rAZEfix7wIc+VWEelJjc/Nfs+PBKl xUUXkLz7qXtHGDA+SEd0pgMCMdLmzT00RMyWDs6kSKL3K4maiQzgt7scKJqGyJrwTrN9 07Pg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=message-id:date:subject:cc:to:from:arc-authentication-results; bh=TO0uMxklzq2hu20ccj9B4DtSp8aAGR+aqI6NxrYd83k=; b=yWKXXP3lx+1I45tXr8Vu367tudJg2ruV2Kk3BRXwwLg0KmMiUlgytv29BVS2t8f4K7 QIiG5RqJE1zqcCmBy7y2T5xeox13vSU1iR88TB7ae6dMseiwJ3STr04wnL8iekKiqw53 iZJDY0Dd5qrCNUl4g7GXcOZPxRx11Wfk//lOM8Faag86BhcOTCuxUmD7onSe1369YY/Z 8LGHWcNd2K4byGmLJGBALUiCR9pVw0ANCPIWRp8S94Bdxe2x6s+fSbx0VmW2Q7WHtgep JWPBXW+xVmInrhOAK005s9obJNgz5pkqqi34SPxkQhaDmXfd9XOFab8pB3zb66fRvtsg ByTg== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of pm215@archaic.org.uk designates 2001:8b0:1d0::2 as permitted sender) smtp.mailfrom=pm215@archaic.org.uk; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from orth.archaic.org.uk (orth.archaic.org.uk. [2001:8b0:1d0::2]) by mx.google.com with ESMTPS id o103si4653582wrc.2.2017.12.07.10.14.56 for (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Thu, 07 Dec 2017 10:14:56 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of pm215@archaic.org.uk designates 2001:8b0:1d0::2 as permitted sender) client-ip=2001:8b0:1d0::2; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of pm215@archaic.org.uk designates 2001:8b0:1d0::2 as permitted sender) smtp.mailfrom=pm215@archaic.org.uk; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from pm215 by orth.archaic.org.uk with local (Exim 4.89) (envelope-from ) id 1eN0hC-000814-Ff; Thu, 07 Dec 2017 18:14:54 +0000 From: Peter Maydell To: qemu-arm@nongnu.org, qemu-devel@nongnu.org Cc: patches@linaro.org, Eduardo Habkost , "Richard W . M . Jones" Subject: [PATCH 0/6] arm: support -cpu max (and gic-version=max) Date: Thu, 7 Dec 2017 18:14:47 +0000 Message-Id: <1512670493-18114-1-git-send-email-peter.maydell@linaro.org> X-Mailer: git-send-email 2.7.4 This patchset adds support for '-cpu max' to Arm, along the lines of the existing support we have for x86 targets: * under KVM, -cpu max is the same as -cpu host * under TCG, -cpu max means "emulate with as many features as possible" -cpu max is supported for both usermode and system emulation, again following the x86 line. NB that cross-QEMU-version migration is not supported for -cpu max: in future the definition of "maximum set of features" will change as we add more emulation features. The patchset also adds support to the virt board for the "max" option to -machine gic-version, requesting "best available interrupt controller", with the same semantics as -cpu max. Together these should assist users like libguestfs that just want to be able to run code without having to figure out what the right command line arguments for this particular host system are. Patch 1 is a bugfix, needed because now "-cpu host" without -enable-kvm will only be detected when the CPU object fails realize, rather than because we don't register the 'host' CPU type at all. (This is something that I meant to do much earlier: see https://lists.gnu.org/archive/html/qemu-devel/2017-02/msg06183.html but at the time we were about to freeze for 2.9, so it fell off my immediate todo list and then I never got back to it...) thanks -- PMM Peter Maydell (6): hw/arm/virt: Check that the CPU realize method succeeded target/arm: Query host CPU features on-demand at instance init target/arm: Move definition of 'host' cpu type into cpu.c target/arm: Add "-cpu max" support hw/arm/virt: Add "max" to the list of CPU types "virt" supports hw/arm/virt: Support -machine gic-version=max target/arm/cpu-qom.h | 2 ++ target/arm/cpu.h | 5 +++++ target/arm/kvm_arm.h | 35 ++++++++++++++++++++---------- hw/arm/virt.c | 32 +++++++++++++++++---------- target/arm/cpu.c | 61 ++++++++++++++++++++++++++++++++++++++++++++++++++++ target/arm/cpu64.c | 21 ++++++++++++++++++ target/arm/kvm.c | 51 +++++++++++++++---------------------------- target/arm/kvm32.c | 8 +++---- target/arm/kvm64.c | 8 +++---- 9 files changed, 159 insertions(+), 64 deletions(-) -- 2.7.4