mbox series

[v8,00/25] Remaining MTTCG Base patches and ARM enablement

Message ID 20170127103922.19658-1-alex.bennee@linaro.org
Headers show
Series Remaining MTTCG Base patches and ARM enablement | expand

Message

Alex Bennée Jan. 27, 2017, 10:38 a.m. UTC
Hi,

All of the changes in this revision are addressing comments from v7
posted last week. A new pre-cursor patch was added:

  cputlb and arm/sparc targets: convert mmuidx flushes from varg to
    bitmap

To change the cputlb API to use a bitmap instead of vargs. This has
generated quite a bit of churn in the ARM target but it is pretty
mechanical.

I also folded the BQL irq protection patches from v7 into:

  tcg: drop global lock during TCG code execution

This is required to keep the series bisectable although the BQL safety
is only really relevant to guests using MTTCG. I didn't think it was
worth making the asserts conditional on parallel_cpus although it does
mean this patch gets a little bigger.

The other big change was to:

  cputlb: introduce tlb_flush_*_all_cpus[_synced]

Where I replaced the wait flag with an expanded set of API calls. The
*_synced variants which are marked as QEMU_NORETURN to make their
behaviour clear.

The series applies to origin/master as of today and you can find my
tree at:

  https://github.com/stsquad/qemu/tree/mttcg/base-patches-v8

There is the usual collection of r-b tags and minor merge/re-base
fixes all documented in the --- sections of the commit messages.

In terms of merging strategy I would appreciate some thoughts. While I
think the series is ready to go I appreciate it is quite a chunk to
merge in one go. That said an early merge gives us plenty of time to
shake out any lingering issues before feature freeze.

I guess the key decider is that we are happy the design provides for
solutions for any other things we come across?

Cheers,

Alex

Alex Bennée (19):
  docs: new design document multi-thread-tcg.txt
  tcg: move TCG_MO/BAR types into own file
  tcg: add kick timer for single-threaded vCPU emulation
  tcg: rename tcg_current_cpu to tcg_current_rr_cpu
  tcg: remove global exit_request
  tcg: enable tb_lock() for SoftMMU
  tcg: enable thread-per-vCPU
  cputlb: add assert_cpu_is_self checks
  cputlb: tweak qemu_ram_addr_from_host_nofail reporting
  cputlb and arm/sparc targets: convert mmuidx flushes from varg to
    bitmap
  cputlb: add tlb_flush_by_mmuidx async routines
  cputlb: atomically update tlb fields used by tlb_reset_dirty
  cputlb: introduce tlb_flush_*_all_cpus[_synced]
  target-arm/powerctl: defer cpu reset work to CPU context
  target-arm: don't generate WFE/YIELD calls for MTTCG
  target-arm/cpu.h: make ARM_CP defined consistent
  target-arm: introduce ARM_CP_EXIT_PC
  target-arm: ensure all cross vCPUs TLB flushes complete
  tcg: enable MTTCG by default for ARM on x86 hosts

Jan Kiszka (1):
  tcg: drop global lock during TCG code execution

KONRAD Frederic (2):
  tcg: add options for enabling MTTCG
  cputlb: introduce tlb_flush_* async work.

Pranith Kumar (3):
  mttcg: translate-all: Enable locking debug in a debug build
  mttcg: Add missing tb_lock/unlock() in cpu_exec_step()
  tcg: handle EXCP_ATOMIC exception for system emulation

 configure                  |   6 +
 cpu-exec-common.c          |   3 -
 cpu-exec.c                 |  41 ++--
 cpus.c                     | 343 ++++++++++++++++++++++++++-------
 cputlb.c                   | 465 +++++++++++++++++++++++++++++++++++++--------
 docs/multi-thread-tcg.txt  | 350 ++++++++++++++++++++++++++++++++++
 exec.c                     |  12 +-
 hw/core/irq.c              |   1 +
 hw/i386/kvmvapic.c         |   4 +-
 hw/intc/arm_gicv3_cpuif.c  |   3 +
 hw/ppc/ppc.c               |  16 +-
 hw/ppc/spapr.c             |   3 +
 include/exec/cputlb.h      |   2 -
 include/exec/exec-all.h    | 130 +++++++++++--
 include/qom/cpu.h          |  16 ++
 include/sysemu/cpus.h      |   2 +
 memory.c                   |   2 +
 qemu-options.hx            |  20 ++
 qom/cpu.c                  |  10 +
 target/arm/arm-powerctl.c  | 146 ++++++++------
 target/arm/cpu.h           |  73 ++++---
 target/arm/helper.c        | 385 ++++++++++++++++++-------------------
 target/arm/op_helper.c     |  50 ++++-
 target/arm/translate-a64.c |  26 ++-
 target/arm/translate.c     |  46 +++--
 target/arm/translate.h     |   4 +-
 target/i386/smm_helper.c   |   7 +
 target/s390x/misc_helper.c |   5 +-
 target/sparc/ldst_helper.c |   8 +-
 tcg/i386/tcg-target.h      |  16 ++
 tcg/tcg-mo.h               |  45 +++++
 tcg/tcg.h                  |  27 +--
 translate-all.c            |  66 ++-----
 translate-common.c         |  21 +-
 vl.c                       |  49 ++++-
 35 files changed, 1818 insertions(+), 585 deletions(-)
 create mode 100644 docs/multi-thread-tcg.txt
 create mode 100644 tcg/tcg-mo.h

-- 
2.11.0

Comments

Pranith Kumar Jan. 29, 2017, 11:05 p.m. UTC | #1
Alex Bennée writes:

> Hi,

>

> All of the changes in this revision are addressing comments from v7

> posted last week. A new pre-cursor patch was added:

>

>   cputlb and arm/sparc targets: convert mmuidx flushes from varg to

>     bitmap

>

> To change the cputlb API to use a bitmap instead of vargs. This has

> generated quite a bit of churn in the ARM target but it is pretty

> mechanical.

>

> I also folded the BQL irq protection patches from v7 into:

>

>   tcg: drop global lock during TCG code execution

>

> This is required to keep the series bisectable although the BQL safety

> is only really relevant to guests using MTTCG. I didn't think it was

> worth making the asserts conditional on parallel_cpus although it does

> mean this patch gets a little bigger.

>

> The other big change was to:

>

>   cputlb: introduce tlb_flush_*_all_cpus[_synced]

>

> Where I replaced the wait flag with an expanded set of API calls. The

> *_synced variants which are marked as QEMU_NORETURN to make their

> behaviour clear.

>

> The series applies to origin/master as of today and you can find my

> tree at:

>

>   https://github.com/stsquad/qemu/tree/mttcg/base-patches-v8

>

> There is the usual collection of r-b tags and minor merge/re-base

> fixes all documented in the --- sections of the commit messages.

>

> In terms of merging strategy I would appreciate some thoughts. While I

> think the series is ready to go I appreciate it is quite a chunk to

> merge in one go. That said an early merge gives us plenty of time to

> shake out any lingering issues before feature freeze.

>

> I guess the key decider is that we are happy the design provides for

> solutions for any other things we come across?

>

> Cheers,

>

> Alex

>

> Alex Bennée (19):

>   docs: new design document multi-thread-tcg.txt

>   tcg: move TCG_MO/BAR types into own file

>   tcg: add kick timer for single-threaded vCPU emulation

>   tcg: rename tcg_current_cpu to tcg_current_rr_cpu

>   tcg: remove global exit_request

>   tcg: enable tb_lock() for SoftMMU

>   tcg: enable thread-per-vCPU

>   cputlb: add assert_cpu_is_self checks

>   cputlb: tweak qemu_ram_addr_from_host_nofail reporting

>   cputlb and arm/sparc targets: convert mmuidx flushes from varg to

>     bitmap

>   cputlb: add tlb_flush_by_mmuidx async routines

>   cputlb: atomically update tlb fields used by tlb_reset_dirty

>   cputlb: introduce tlb_flush_*_all_cpus[_synced]

>   target-arm/powerctl: defer cpu reset work to CPU context

>   target-arm: don't generate WFE/YIELD calls for MTTCG

>   target-arm/cpu.h: make ARM_CP defined consistent

>   target-arm: introduce ARM_CP_EXIT_PC

>   target-arm: ensure all cross vCPUs TLB flushes complete

>   tcg: enable MTTCG by default for ARM on x86 hosts

>

> Jan Kiszka (1):

>   tcg: drop global lock during TCG code execution

>

> KONRAD Frederic (2):

>   tcg: add options for enabling MTTCG

>   cputlb: introduce tlb_flush_* async work.

>

> Pranith Kumar (3):

>   mttcg: translate-all: Enable locking debug in a debug build

>   mttcg: Add missing tb_lock/unlock() in cpu_exec_step()

>   tcg: handle EXCP_ATOMIC exception for system emulation

>

>  configure                  |   6 +

>  cpu-exec-common.c          |   3 -

>  cpu-exec.c                 |  41 ++--

>  cpus.c                     | 343 ++++++++++++++++++++++++++-------

>  cputlb.c                   | 465 +++++++++++++++++++++++++++++++++++++--------

>  docs/multi-thread-tcg.txt  | 350 ++++++++++++++++++++++++++++++++++

>  exec.c                     |  12 +-

>  hw/core/irq.c              |   1 +

>  hw/i386/kvmvapic.c         |   4 +-

>  hw/intc/arm_gicv3_cpuif.c  |   3 +

>  hw/ppc/ppc.c               |  16 +-

>  hw/ppc/spapr.c             |   3 +

>  include/exec/cputlb.h      |   2 -

>  include/exec/exec-all.h    | 130 +++++++++++--

>  include/qom/cpu.h          |  16 ++

>  include/sysemu/cpus.h      |   2 +

>  memory.c                   |   2 +

>  qemu-options.hx            |  20 ++

>  qom/cpu.c                  |  10 +

>  target/arm/arm-powerctl.c  | 146 ++++++++------

>  target/arm/cpu.h           |  73 ++++---

>  target/arm/helper.c        | 385 ++++++++++++++++++-------------------

>  target/arm/op_helper.c     |  50 ++++-

>  target/arm/translate-a64.c |  26 ++-

>  target/arm/translate.c     |  46 +++--

>  target/arm/translate.h     |   4 +-

>  target/i386/smm_helper.c   |   7 +

>  target/s390x/misc_helper.c |   5 +-

>  target/sparc/ldst_helper.c |   8 +-

>  tcg/i386/tcg-target.h      |  16 ++

>  tcg/tcg-mo.h               |  45 +++++

>  tcg/tcg.h                  |  27 +--

>  translate-all.c            |  66 ++-----

>  translate-common.c         |  21 +-

>  vl.c                       |  49 ++++-

>  35 files changed, 1818 insertions(+), 585 deletions(-)

>  create mode 100644 docs/multi-thread-tcg.txt

>  create mode 100644 tcg/tcg-mo.h


Tested-by: Pranith Kumar <bobby.prani@gmail.com>

Reviewed-by: Pranith Kumar <bobby.prani@gmail.com>


-- 
Pranith
Richard Henderson Jan. 31, 2017, 11:44 p.m. UTC | #2
On 01/27/2017 02:38 AM, Alex Bennée wrote:
> Hi,

>

> All of the changes in this revision are addressing comments from v7

> posted last week. A new pre-cursor patch was added:

>

>   cputlb and arm/sparc targets: convert mmuidx flushes from varg to

>     bitmap

>

> To change the cputlb API to use a bitmap instead of vargs. This has

> generated quite a bit of churn in the ARM target but it is pretty

> mechanical.

>

> I also folded the BQL irq protection patches from v7 into:

>

>   tcg: drop global lock during TCG code execution

>

> This is required to keep the series bisectable although the BQL safety

> is only really relevant to guests using MTTCG. I didn't think it was

> worth making the asserts conditional on parallel_cpus although it does

> mean this patch gets a little bigger.

>

> The other big change was to:

>

>   cputlb: introduce tlb_flush_*_all_cpus[_synced]

>

> Where I replaced the wait flag with an expanded set of API calls. The

> *_synced variants which are marked as QEMU_NORETURN to make their

> behaviour clear.

>

> The series applies to origin/master as of today and you can find my

> tree at:

>

>   https://github.com/stsquad/qemu/tree/mttcg/base-patches-v8

>

> There is the usual collection of r-b tags and minor merge/re-base

> fixes all documented in the --- sections of the commit messages.

>

> In terms of merging strategy I would appreciate some thoughts. While I

> think the series is ready to go I appreciate it is quite a chunk to

> merge in one go. That said an early merge gives us plenty of time to

> shake out any lingering issues before feature freeze.


As far as I'm concerned, I'm done with my review and this can go in.

Those remaining nits in target/arm are extremely minor and ought to be between 
you and PMM as ARM maintainer -- whatever he's happy with should go.

Once this is in I'll send a patch to enable mttcg for Alpha, which has also 
tested well.


r~