Message ID | 20171025093535.10175-1-richard.henderson@linaro.org |
---|---|
Headers | show |
Series | tcg queued patches | expand |
Hi, This series seems to have some coding style problems. See output below for more information: Subject: [Qemu-devel] [PULL 00/51] tcg queued patches Type: series Message-id: 20171025093535.10175-1-richard.henderson@linaro.org === TEST SCRIPT BEGIN === #!/bin/bash BASE=base n=1 total=$(git log --oneline $BASE.. | wc -l) failed=0 git config --local diff.renamelimit 0 git config --local diff.renames True commits="$(git log --format=%H --reverse $BASE..)" for c in $commits; do echo "Checking PATCH $n/$total: $(git log -n 1 --format=%s $c)..." if ! git show $c --format=email | ./scripts/checkpatch.pl --mailback -; then failed=1 echo fi n=$((n+1)) done exit $failed === TEST SCRIPT END === Updating 3c8cf5a9c21ff8782164d1def7f44bd888713384 From https://github.com/patchew-project/qemu * [new tag] patchew/20171025093535.10175-1-richard.henderson@linaro.org -> patchew/20171025093535.10175-1-richard.henderson@linaro.org Switched to a new branch 'test' 77626a041c translate-all: exit from tb_phys_invalidate if qht_remove fails 4a90f4ebe9 tcg: Initialize cpu_env generically 2152c41bd3 tcg: enable multiple TCG contexts in softmmu 58ccac2561 tcg: introduce regions to split code_gen_buffer 9127fe5b64 translate-all: use qemu_protect_rwx/none helpers 86abfd9e92 osdep: introduce qemu_mprotect_rwx/none b98ae7360f tcg: allocate optimizer temps with tcg_malloc 356db0bab8 tcg: distribute profiling counters across TCGContext's 8b52922c45 tcg: introduce **tcg_ctxs to keep track of all TCGContext's 1f81eecd3a gen-icount: fold exitreq_label into TCGContext 59e4a38c26 tcg: define tcg_init_ctx and make tcg_ctx a pointer 3103c47aaf tcg: take tb_ctx out of TCGContext 0bf9f60518 translate-all: report correct avg host TB size 3c88306ec2 exec-all: rename tb_free to tb_remove 42857d44ba translate-all: use a binary search tree to track TBs in TBContext 65eedf9e8d tcg: Remove CF_IGNORE_ICOUNT d4c9947316 tcg: Add CF_LAST_IO + CF_USE_ICOUNT to CF_HASH_MASK f823bdd39d cpu-exec: lookup/generate TB outside exclusive region during step_atomic 10287570c7 tcg: check CF_PARALLEL instead of parallel_cpus 0e5ad6e79e target/sparc: check CF_PARALLEL instead of parallel_cpus 56024229c8 target/sh4: check CF_PARALLEL instead of parallel_cpus 1de3863b5b target/s390x: check CF_PARALLEL instead of parallel_cpus 40235bc3c1 target/m68k: check CF_PARALLEL instead of parallel_cpus 07ae79e853 target/i386: check CF_PARALLEL instead of parallel_cpus af968dcdfa target/hppa: check CF_PARALLEL instead of parallel_cpus 8ae9c37655 target/arm: check CF_PARALLEL instead of parallel_cpus c6903f61b8 tcg: convert tb->cflags reads to tb_cflags(tb) 857e9bace7 tcg: Include CF_COUNT_MASK in CF_HASH_MASK 664c0a988f tcg: Add CPUState cflags_next_tb d00a1708d4 tcg: define CF_PARALLEL and use it for TB hashing along with CF_COUNT_MASK ab6636facc tcg: Use offsets not indices for TCGv_* 158a9ef727 qom: Introduce CPUClass.tcg_initialize 2c3836bc80 tcg: Remove TCGV_EQUAL* 37ba8ce8e9 tcg: Remove GET_TCGV_* and MAKE_TCGV_* ac1bcac6c9 tcg: Introduce temp_tcgv_{i32,i64,ptr} 7a2668fa18 tcg: Introduce tcgv_{i32, i64, ptr}_{arg, temp} 50712fd38b tcg: Push tcg_ctx into tcg_gen_callN 9e01153d05 tcg: Push tcg_ctx into generator functions 8496a5236b tcg: Use per-temp state data in optimize 818b8ab51f tcg: Remove unused TCG_CALL_DUMMY_TCGV 72bbb04702 tcg: Change temp_allocate_frame arg to TCGTemp 7d35604262 tcg: Avoid loops against variable bounds fa2959c5ca tcg: Use per-temp state data in liveness 988d1b1378 tcg: Introduce temp_arg, export temp_idx d275e8c996 tcg: Return NULL temp for TCG_CALL_DUMMY_ARG 9a6fd94cb4 tcg: Add temp_global bit to TCGTemp 21db94e37e tcg: Introduce arg_temp a1d9d381b7 tcg: Propagate TCGOp down to allocators 37e9e9eb62 tcg: Propagate args to op->args in tcg.c a34134aa11 tcg: Propagate args to op->args in optimizer c912ac427e tcg: Merge opcode arguments into TCGOp === OUTPUT BEGIN === Checking PATCH 1/51: tcg: Merge opcode arguments into TCGOp... ERROR: spaces prohibited around that ':' (ctx:WxW) #482: FILE: tcg/tcg.h:613: + unsigned calli : 4; /* 12 */ ^ ERROR: spaces prohibited around that ':' (ctx:WxW) #483: FILE: tcg/tcg.h:614: + unsigned callo : 2; /* 14 */ ^ ERROR: space prohibited before that ':' (ctx:WxW) #484: FILE: tcg/tcg.h:615: + unsigned : 2; /* 16 */ ^ ERROR: spaces prohibited around that ':' (ctx:WxW) #489: FILE: tcg/tcg.h:618: + unsigned prev : 16; /* 32 */ ^ ERROR: spaces prohibited around that ':' (ctx:WxW) #490: FILE: tcg/tcg.h:619: + unsigned next : 16; /* 48 */ ^ total: 5 errors, 0 warnings, 485 lines checked Your patch has style problems, please review. If any of these errors are false positives report them to the maintainer, see CHECKPATCH in MAINTAINERS. Checking PATCH 2/51: tcg: Propagate args to op->args in optimizer... ERROR: spaces required around that '-' (ctx:VxV) #649: FILE: tcg/optimize.c:1165: + tcg_opt_gen_mov(s, op, op->args[0], op->args[4-tmp]); ^ total: 1 errors, 0 warnings, 912 lines checked Your patch has style problems, please review. If any of these errors are false positives report them to the maintainer, see CHECKPATCH in MAINTAINERS. Checking PATCH 3/51: tcg: Propagate args to op->args in tcg.c... Checking PATCH 4/51: tcg: Propagate TCGOp down to allocators... Checking PATCH 5/51: tcg: Introduce arg_temp... Checking PATCH 6/51: tcg: Add temp_global bit to TCGTemp... Checking PATCH 7/51: tcg: Return NULL temp for TCG_CALL_DUMMY_ARG... Checking PATCH 8/51: tcg: Introduce temp_arg, export temp_idx... Checking PATCH 9/51: tcg: Use per-temp state data in liveness... WARNING: line over 80 characters #187: FILE: tcg/tcg.c:1808: + } else if (arg_temp(op->args[0])->state == TS_DEAD && have_opc_new2) { total: 0 errors, 1 warnings, 441 lines checked Your patch has style problems, please review. If any of these errors are false positives report them to the maintainer, see CHECKPATCH in MAINTAINERS. Checking PATCH 10/51: tcg: Avoid loops against variable bounds... Checking PATCH 11/51: tcg: Change temp_allocate_frame arg to TCGTemp... Checking PATCH 12/51: tcg: Remove unused TCG_CALL_DUMMY_TCGV... Checking PATCH 13/51: tcg: Use per-temp state data in optimize... Checking PATCH 14/51: tcg: Push tcg_ctx into generator functions... Checking PATCH 15/51: tcg: Push tcg_ctx into tcg_gen_callN... Checking PATCH 16/51: tcg: Introduce tcgv_{i32, i64, ptr}_{arg, temp}... Checking PATCH 17/51: tcg: Introduce temp_tcgv_{i32,i64,ptr}... Checking PATCH 18/51: tcg: Remove GET_TCGV_* and MAKE_TCGV_*... Checking PATCH 19/51: tcg: Remove TCGV_EQUAL*... Checking PATCH 20/51: qom: Introduce CPUClass.tcg_initialize... Checking PATCH 21/51: tcg: Use offsets not indices for TCGv_*... Checking PATCH 22/51: tcg: define CF_PARALLEL and use it for TB hashing along with CF_COUNT_MASK... Checking PATCH 23/51: tcg: Add CPUState cflags_next_tb... Checking PATCH 24/51: tcg: Include CF_COUNT_MASK in CF_HASH_MASK... Checking PATCH 25/51: tcg: convert tb->cflags reads to tb_cflags(tb)... ERROR: return is not a function, parentheses are not required #103: FILE: target/alpha/translate.c:458: + return ((tb_cflags(ctx->base.tb) & CF_LAST_IO) WARNING: line over 80 characters #219: FILE: target/hppa/translate.c:472: + if ((tb_cflags(ctx->base.tb) & CF_LAST_IO) || ctx->base.singlestep_enabled) { total: 1 errors, 1 warnings, 924 lines checked Your patch has style problems, please review. If any of these errors are false positives report them to the maintainer, see CHECKPATCH in MAINTAINERS. Checking PATCH 26/51: target/arm: check CF_PARALLEL instead of parallel_cpus... Checking PATCH 27/51: target/hppa: check CF_PARALLEL instead of parallel_cpus... Checking PATCH 28/51: target/i386: check CF_PARALLEL instead of parallel_cpus... WARNING: line over 80 characters #23: FILE: target/i386/translate.c:5310: + if ((s->prefix & PREFIX_LOCK) && (tb_cflags(s->base.tb) & CF_PARALLEL)) { WARNING: line over 80 characters #32: FILE: target/i386/translate.c:5321: + if ((s->prefix & PREFIX_LOCK) && (tb_cflags(s->base.tb) & CF_PARALLEL)) { total: 0 errors, 2 warnings, 16 lines checked Your patch has style problems, please review. If any of these errors are false positives report them to the maintainer, see CHECKPATCH in MAINTAINERS. Checking PATCH 29/51: target/m68k: check CF_PARALLEL instead of parallel_cpus... Checking PATCH 30/51: target/s390x: check CF_PARALLEL instead of parallel_cpus... Checking PATCH 31/51: target/sh4: check CF_PARALLEL instead of parallel_cpus... Checking PATCH 32/51: target/sparc: check CF_PARALLEL instead of parallel_cpus... Checking PATCH 33/51: tcg: check CF_PARALLEL instead of parallel_cpus... Checking PATCH 34/51: cpu-exec: lookup/generate TB outside exclusive region during step_atomic... Checking PATCH 35/51: tcg: Add CF_LAST_IO + CF_USE_ICOUNT to CF_HASH_MASK... Checking PATCH 36/51: tcg: Remove CF_IGNORE_ICOUNT... Checking PATCH 37/51: translate-all: use a binary search tree to track TBs in TBContext... Checking PATCH 38/51: exec-all: rename tb_free to tb_remove... Checking PATCH 39/51: translate-all: report correct avg host TB size... Checking PATCH 40/51: tcg: take tb_ctx out of TCGContext... Checking PATCH 41/51: tcg: define tcg_init_ctx and make tcg_ctx a pointer... Checking PATCH 42/51: gen-icount: fold exitreq_label into TCGContext... Checking PATCH 43/51: tcg: introduce **tcg_ctxs to keep track of all TCGContext's... Checking PATCH 44/51: tcg: distribute profiling counters across TCGContext's... Checking PATCH 45/51: tcg: allocate optimizer temps with tcg_malloc... Checking PATCH 46/51: osdep: introduce qemu_mprotect_rwx/none... Checking PATCH 47/51: translate-all: use qemu_protect_rwx/none helpers... Checking PATCH 48/51: tcg: introduce regions to split code_gen_buffer... Checking PATCH 49/51: tcg: enable multiple TCG contexts in softmmu... Checking PATCH 50/51: tcg: Initialize cpu_env generically... ERROR: do not initialise globals to 0 or NULL #645: FILE: tcg/tcg.c:124: +TCGv_env cpu_env = 0; total: 1 errors, 0 warnings, 567 lines checked Your patch has style problems, please review. If any of these errors are false positives report them to the maintainer, see CHECKPATCH in MAINTAINERS. Checking PATCH 51/51: translate-all: exit from tb_phys_invalidate if qht_remove fails... === OUTPUT END === Test command exited with code: 1 --- Email generated automatically by Patchew [http://patchew.org/]. Please send your feedback to patchew-devel@freelists.org
On 25 October 2017 at 10:34, Richard Henderson <richard.henderson@linaro.org> wrote: > Primarily Emilio's work toward removing tb_lock, with fixes. > But there are some other tcg-related patches that are queued. > > > r~ > > > The following changes since commit 3d7196d43bfe12efe98568cb60057e273652b99b: > > Merge remote-tracking branch 'remotes/kraxel/tags/usb-20171023-pull-request' into staging (2017-10-24 16:05:57 +0100) > > are available in the git repository at: > > git://github.com/rth7680/qemu.git tags/pull-tcg-20171025 > > for you to fetch changes up to cc689485ee3e9dca05765326ee8fd619a6ec48f0: > > translate-all: exit from tb_phys_invalidate if qht_remove fails (2017-10-24 13:53:42 -0700) > > ---------------------------------------------------------------- > TCG patch queue > Applied, thanks. -- PMM
On 25.10.2017 11:34, Richard Henderson wrote: > Primarily Emilio's work toward removing tb_lock, with fixes. > But there are some other tcg-related patches that are queued. > > r~ > > The following changes since commit 3d7196d43bfe12efe98568cb60057e273652b99b: > > Merge remote-tracking branch 'remotes/kraxel/tags/usb-20171023-pull-request' into staging (2017-10-24 16:05:57 +0100) > > are available in the git repository at: > > git://github.com/rth7680/qemu.git tags/pull-tcg-20171025 > > for you to fetch changes up to cc689485ee3e9dca05765326ee8fd619a6ec48f0: > > translate-all: exit from tb_phys_invalidate if qht_remove fails (2017-10-24 13:53:42 -0700) > > ---------------------------------------------------------------- > TCG patch queue > > ---------------------------------------------------------------- > Emilio G. Cota (25): > tcg: define CF_PARALLEL and use it for TB hashing along with CF_COUNT_MASK > tcg: convert tb->cflags reads to tb_cflags(tb) > target/arm: check CF_PARALLEL instead of parallel_cpus > target/hppa: check CF_PARALLEL instead of parallel_cpus > target/i386: check CF_PARALLEL instead of parallel_cpus > target/m68k: check CF_PARALLEL instead of parallel_cpus > target/s390x: check CF_PARALLEL instead of parallel_cpus > target/sh4: check CF_PARALLEL instead of parallel_cpus > target/sparc: check CF_PARALLEL instead of parallel_cpus > tcg: check CF_PARALLEL instead of parallel_cpus > cpu-exec: lookup/generate TB outside exclusive region during step_atomic > translate-all: use a binary search tree to track TBs in TBContext > exec-all: rename tb_free to tb_remove > translate-all: report correct avg host TB size > tcg: take tb_ctx out of TCGContext > tcg: define tcg_init_ctx and make tcg_ctx a pointer > gen-icount: fold exitreq_label into TCGContext > tcg: introduce **tcg_ctxs to keep track of all TCGContext's > tcg: distribute profiling counters across TCGContext's > tcg: allocate optimizer temps with tcg_malloc > osdep: introduce qemu_mprotect_rwx/none > translate-all: use qemu_protect_rwx/none helpers > tcg: introduce regions to split code_gen_buffer > tcg: enable multiple TCG contexts in softmmu Seems like something in this patch series broke a couple of ARM boards (smdkc210, nuri, raspi2, xlnx-ep108 and xlnx-zcu102). With current master branch, I just get this error: $ aarch64-softmmu/qemu-system-aarch64 -machine raspi2 ** ERROR:/home/thuth/devel/qemu/tcg/tcg.c:537:tcg_register_thread: assertion failed: (n < max_cpus) Aborted (core dumped) Could you please have a look at this? Thanks, Thomas
On Wed, Nov 01, 2017 at 18:34:23 +0100, Thomas Huth wrote: > Seems like something in this patch series broke a couple of ARM boards > (smdkc210, nuri, raspi2, xlnx-ep108 and xlnx-zcu102). With current > master branch, I just get this error: > > $ aarch64-softmmu/qemu-system-aarch64 -machine raspi2 > ** > ERROR:/home/thuth/devel/qemu/tcg/tcg.c:537:tcg_register_thread: > assertion failed: (n < max_cpus) > Aborted (core dumped) > > Could you please have a look at this? Turns out some boards initialize a fixed number of vcpus, which can be > max_cpus. The below fixes the issue for me, although I'm not entirely happy with it because if -{smp,max}_cpus < machine_class->max_cpus, some TCG regions will be wasted. Not a huge deal (in most cases it will be 2MB per unused vCPU), but a better fix might be to just honour -max_cpus for these boards. We might just not care enough though. Emilio ---8<--- Subject: [PATCH] hw: define and use machine_class->max_cpus_override max_cpus needs to be an upper bound on the number of vCPUs initialized; otherwise TCG region initialization breaks. Some boards initialize a hard-coded number of vCPUs; mark this with machine_class->max_cpus_override so that max_cpus is set to machine_class->max_cpus when set. Update the ARM boards that hard-code max_cpus, thereby letting them boot again. Reported-by: Thomas Huth <thuth@redhat.com> Signed-off-by: Emilio G. Cota <cota@braap.org> --- hw/arm/exynos4_boards.c | 2 ++ hw/arm/raspi.c | 1 + hw/arm/xlnx-zcu102.c | 3 +++ include/hw/boards.h | 3 ++- vl.c | 4 ++++ 5 files changed, 12 insertions(+), 1 deletion(-) diff --git a/hw/arm/exynos4_boards.c b/hw/arm/exynos4_boards.c index f1441ec..7071505 100644 --- a/hw/arm/exynos4_boards.c +++ b/hw/arm/exynos4_boards.c @@ -189,6 +189,7 @@ static void nuri_class_init(ObjectClass *oc, void *data) mc->desc = "Samsung NURI board (Exynos4210)"; mc->init = nuri_init; mc->max_cpus = EXYNOS4210_NCPUS; + mc->max_cpus_override = 1; mc->ignore_memory_transaction_failures = true; } @@ -205,6 +206,7 @@ static void smdkc210_class_init(ObjectClass *oc, void *data) mc->desc = "Samsung SMDKC210 board (Exynos4210)"; mc->init = smdkc210_init; mc->max_cpus = EXYNOS4210_NCPUS; + mc->max_cpus_override = 1; mc->ignore_memory_transaction_failures = true; } diff --git a/hw/arm/raspi.c b/hw/arm/raspi.c index 5941c9f..bf4eec3 100644 --- a/hw/arm/raspi.c +++ b/hw/arm/raspi.c @@ -167,6 +167,7 @@ static void raspi2_machine_init(MachineClass *mc) mc->no_floppy = 1; mc->no_cdrom = 1; mc->max_cpus = BCM2836_NCPUS; + mc->max_cpus_override = 1; mc->default_ram_size = 1024 * 1024 * 1024; mc->ignore_memory_transaction_failures = true; }; diff --git a/hw/arm/xlnx-zcu102.c b/hw/arm/xlnx-zcu102.c index e2d15a1..f7e0004 100644 --- a/hw/arm/xlnx-zcu102.c +++ b/hw/arm/xlnx-zcu102.c @@ -185,6 +185,8 @@ static void xlnx_ep108_machine_class_init(ObjectClass *oc, void *data) mc->block_default_type = IF_IDE; mc->units_per_default_bus = 1; mc->ignore_memory_transaction_failures = true; + mc->max_cpus = XLNX_ZYNQMP_NUM_APU_CPUS + XLNX_ZYNQMP_NUM_RPU_CPUS; + mc->max_cpus_override = 1; } static const TypeInfo xlnx_ep108_machine_init_typeinfo = { @@ -241,6 +243,7 @@ static void xlnx_zcu102_machine_class_init(ObjectClass *oc, void *data) mc->units_per_default_bus = 1; mc->ignore_memory_transaction_failures = true; mc->max_cpus = XLNX_ZYNQMP_NUM_APU_CPUS + XLNX_ZYNQMP_NUM_RPU_CPUS; + mc->max_cpus_override = 1; } static const TypeInfo xlnx_zcu102_machine_init_typeinfo = { diff --git a/include/hw/boards.h b/include/hw/boards.h index 191a5b3..724be45 100644 --- a/include/hw/boards.h +++ b/include/hw/boards.h @@ -176,7 +176,8 @@ struct MachineClass { no_sdcard:1, has_dynamic_sysbus:1, pci_allow_0_address:1, - legacy_fw_cfg_order:1; + legacy_fw_cfg_order:1, + max_cpus_override:1; int is_default; const char *default_machine_opts; const char *default_boot_order; diff --git a/vl.c b/vl.c index ec29909..b2f056a 100644 --- a/vl.c +++ b/vl.c @@ -4336,6 +4336,10 @@ int main(int argc, char **argv, char **envp) machine_class->name, machine_class->max_cpus); exit(1); } + /* some machines initialize a hard-coded number of cpus */ + if (machine_class->max_cpus_override) { + max_cpus = machine_class->max_cpus; + } /* * Get the default machine options from the machine if it is not already -- 2.7.4
On 1 November 2017 at 20:36, Emilio G. Cota <cota@braap.org> wrote: > On Wed, Nov 01, 2017 at 18:34:23 +0100, Thomas Huth wrote: >> Seems like something in this patch series broke a couple of ARM boards >> (smdkc210, nuri, raspi2, xlnx-ep108 and xlnx-zcu102). With current >> master branch, I just get this error: >> >> $ aarch64-softmmu/qemu-system-aarch64 -machine raspi2 >> ** >> ERROR:/home/thuth/devel/qemu/tcg/tcg.c:537:tcg_register_thread: >> assertion failed: (n < max_cpus) >> Aborted (core dumped) >> >> Could you please have a look at this? > > Turns out some boards initialize a fixed number of vcpus, which > can be > max_cpus. > > The below fixes the issue for me, although I'm not entirely happy > with it because if -{smp,max}_cpus < machine_class->max_cpus, some > TCG regions will be wasted. Not a huge deal (in most cases it will be > 2MB per unused vCPU), but a better fix might be to just honour -max_cpus > for these boards. We might just not care enough though. Maybe we should allow machine models to specify: * max_cpus (the most they can support; 1 if not set by board, as in current code) * min_cpus (the least they can support; 1 if not set by board) * default_cpus (what you get if you don't ask for something else; 1 if not set by board) Then: * these boards which always create a fixed number of CPUs should set all three to the same thing * boards which only create the CPUs requested by the user can leave them unset (as today) * the generic command line parsing code should stop with an error message if the user sets max_cpus smaller than the board's min_cpus setting or greater than the board's max_cpus, or if they set -smp to less than the board's min_cpus * the TCG code can rely on the max_cpus global being right Incidentally every time we add a field to MachineClass we should add a doc comment giving its semantics. thanks -- PMM
On Thu, Nov 02, 2017 at 13:38:07 +0000, Peter Maydell wrote: > Maybe we should allow machine models to specify: > * max_cpus (the most they can support; 1 if not set by board, > as in current code) > * min_cpus (the least they can support; 1 if not set by board) > * default_cpus (what you get if you don't ask for something else; > 1 if not set by board) > > Then: > * these boards which always create a fixed number of CPUs > should set all three to the same thing > * boards which only create the CPUs requested by the user > can leave them unset (as today) > * the generic command line parsing code should stop with an > error message if the user sets max_cpus smaller than > the board's min_cpus setting or greater than the board's > max_cpus, or if they set -smp to less than the board's > min_cpus Shouldn't we just print a warning (like we've been doing in some boards, e.g. nuri) and upgrade smp_cpus/max_cpus to whatever value? Changing this now could qualify as a regression. Also, just noticed 4bd2f93 ("exynos4_boards: Silence lack of -smp 2 warning for qtest", 2013-11-05); I don't really know how "-smp 1" is built in qtest code, but doing as above breaks check-qtest-aarch64. E.