[v7,00/26] tcg: generic vector operations

Message ID	20171218171758.16964-1-richard.henderson@linaro.org
Headers	show Delivered-To: patch@linaro.org Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) client-ip=2001:4830:134:3::11; From: Richard Henderson <richard.henderson@linaro.org> To: qemu-devel@nongnu.org Date: Mon, 18 Dec 2017 09:17:32 -0800 Message-Id: <20171218171758.16964-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Subject: [Qemu-devel] [PATCH v7 00/26] tcg: generic vector operations Precedence: list Cc: peter.maydell@linaro.org Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" <qemu-devel-bounces+patch=linaro.org@nongnu.org>
Series	tcg: generic vector operations \| expand [v7,00/26] tcg: generic vector operations [v7,01/26] tcg: Add types and basic operations for host vectors [v7,02/26] tcg: Add generic vector expanders [v7,03/26] tcg: Allow multiple word entries into the constant pool [v7,04/26] target/arm: Align vector registers [v7,05/26] target/arm: Use vector infrastructure for aa64 add/sub/logic [v7,06/26] target/arm: Use vector infrastructure for aa64 mov/not/neg [v7,07/26] target/arm: Use vector infrastructure for aa64 dup/movi [v7,08/26] tcg/i386: Add vector operations [v7,09/26] tcg: Add tcg_expand_vec_op and tcg-target.opc.h [v7,10/26] tcg: Add generic vector ops for interleave [v7,11/26] target/arm: Use vector infrastructure for aa64 zip/uzp/trn/xtn [v7,12/26] tcg: Add generic vector ops for constant shifts [v7,13/26] target/arm: Use vector infrastructure for aa64 constant shifts [v7,14/26] tcg: Add generic vector ops for comparisons [v7,15/26] target/arm: Use vector infrastructure for aa64 compares [v7,16/26] tcg/i386: Add vector operations/expansions for shift/cmp/interleave [v7,17/26] tcg: Add generic vector ops for multiplication [v7,18/26] target/arm: Use vector infrastructure for aa64 multiplies [v7,19/26] tcg: Add generic vector ops for extension [v7,20/26] target/arm: Use vector infrastructure for aa64 widening shifts [v7,21/26] tcg/i386: Add vector operations/expansions for mul/extend [v7,22/26] tcg/aarch64: Add vector operations [v7,23/26] tcg/optimize: Handle vector opcodes during optimize [v7,24/26] tcg: Add support for 4 operand vector ops [v7,25/26] tcg: Add support for 5 operand vector ops [v7,26/26] tcg: Add generic helpers for saturating arithmetic

Message ID

20171218171758.16964-1-richard.henderson@linaro.org

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From: Richard Henderson <richard.henderson@linaro.org>
To: qemu-devel@nongnu.org
Date: Mon, 18 Dec 2017 09:17:32 -0800
Message-Id: <20171218171758.16964-1-richard.henderson@linaro.org>
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Subject: [Qemu-devel] [PATCH v7 00/26] tcg: generic vector operations
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Cc: peter.maydell@linaro.org
Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org
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Series

tcg: generic vector operations | expand

Message

Richard Henderson Dec. 18, 2017, 5:17 p.m. UTC

Minor changes since last time.
  * Two bugs fixed pointed out by Kirill.
  * Allow for 4 and 5 operand operations.


r~


Richard Henderson (26):
  tcg: Add types and basic operations for host vectors
  tcg: Add generic vector expanders
  tcg: Allow multiple word entries into the constant pool
  target/arm: Align vector registers
  target/arm: Use vector infrastructure for aa64 add/sub/logic
  target/arm: Use vector infrastructure for aa64 mov/not/neg
  target/arm: Use vector infrastructure for aa64 dup/movi
  tcg/i386: Add vector operations
  tcg: Add tcg_expand_vec_op and tcg-target.opc.h
  tcg: Add generic vector ops for interleave
  target/arm: Use vector infrastructure for aa64 zip/uzp/trn/xtn
  tcg: Add generic vector ops for constant shifts
  target/arm: Use vector infrastructure for aa64 constant shifts
  tcg: Add generic vector ops for comparisons
  target/arm: Use vector infrastructure for aa64 compares
  tcg/i386: Add vector operations/expansions for shift/cmp/interleave
  tcg: Add generic vector ops for multiplication
  target/arm: Use vector infrastructure for aa64 multiplies
  tcg: Add generic vector ops for extension
  target/arm: Use vector infrastructure for aa64 widening shifts
  tcg/i386: Add vector operations/expansions for mul/extend
  tcg/aarch64: Add vector operations
  tcg/optimize: Handle vector opcodes during optimize
  tcg: Add support for 4 operand vector ops
  tcg: Add support for 5 operand vector ops
  tcg: Add generic helpers for saturating arithmetic

 Makefile.target              |    4 +-
 accel/tcg/tcg-runtime.h      |  122 +++
 target/arm/cpu.h             |    2 +-
 tcg/aarch64/tcg-target.h     |   30 +-
 tcg/aarch64/tcg-target.opc.h |    3 +
 tcg/i386/tcg-target.h        |   46 +-
 tcg/i386/tcg-target.opc.h    |   11 +
 tcg/tcg-gvec-desc.h          |   49 +
 tcg/tcg-op-gvec.h            |  271 +++++
 tcg/tcg-op.h                 |   51 +
 tcg/tcg-opc.h                |   59 +
 tcg/tcg.h                    |   81 ++
 accel/tcg/tcg-runtime-gvec.c |  884 +++++++++++++++
 target/arm/translate-a64.c   | 1100 +++++++++++++------
 tcg/aarch64/tcg-target.inc.c |  674 +++++++++++-
 tcg/i386/tcg-target.inc.c    | 1325 ++++++++++++++++++++++-
 tcg/optimize.c               |  141 ++-
 tcg/tcg-op-gvec.c            | 2440 ++++++++++++++++++++++++++++++++++++++++++
 tcg/tcg-op-vec.c             |  566 ++++++++++
 tcg/tcg-pool.inc.c           |  115 +-
 tcg/tcg.c                    |  144 ++-
 accel/tcg/Makefile.objs      |    2 +-
 tcg/README                   |  148 +++
 23 files changed, 7734 insertions(+), 534 deletions(-)
 create mode 100644 tcg/aarch64/tcg-target.opc.h
 create mode 100644 tcg/i386/tcg-target.opc.h
 create mode 100644 tcg/tcg-gvec-desc.h
 create mode 100644 tcg/tcg-op-gvec.h
 create mode 100644 accel/tcg/tcg-runtime-gvec.c
 create mode 100644 tcg/tcg-op-gvec.c
 create mode 100644 tcg/tcg-op-vec.c

-- 
2.14.3