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[2001:4830:134:3::11]) by mx.google.com with ESMTPS id l45-v6si718374qtk.229.2018.10.05.10.59.56 for (version=TLS1 cipher=AES128-SHA bits=128/128); Fri, 05 Oct 2018 10:59:56 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) client-ip=2001:4830:134:3::11; Authentication-Results: mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=J7rx8NTs; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1]:36357 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1g8UOJ-0006pM-Mk for patch@linaro.org; Fri, 05 Oct 2018 13:59:55 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:35377) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1g8UIb-00011f-3e for qemu-devel@nongnu.org; Fri, 05 Oct 2018 13:54:01 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1g8UIX-00038Q-1R for qemu-devel@nongnu.org; Fri, 05 Oct 2018 13:54:00 -0400 Received: from mail-ot1-x335.google.com ([2607:f8b0:4864:20::335]:47081) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1g8UIW-000382-SK for qemu-devel@nongnu.org; Fri, 05 Oct 2018 13:53:56 -0400 Received: by mail-ot1-x335.google.com with SMTP id o21so13220823otb.13 for ; Fri, 05 Oct 2018 10:53:56 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=G+KJmKPjq6oD1iULzuDWht5C5W1A9j4IhVnVhDtdSsk=; b=J7rx8NTsr4ux53mkc83ItMzWijUmPtMy5m5p6InaEM/jInhhFWnQrYa08n0J9PpYz7 zAJMDxjWPXajnxVNQmVem5lktPEo5vhdxBgFq5ihHE4mNVTP6gypA+G+7Bix+8U4R8yv ve1seS1NzIrTHhxO3jJ9Uz/9vofuPxZm5pLhY= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=G+KJmKPjq6oD1iULzuDWht5C5W1A9j4IhVnVhDtdSsk=; b=PEzbgUNPk7f4xFByPi6aV2PoS/ZTKk0DhwTImEwyHE7DO9VzmcpLsHbZFfuoLO5hob G7X4Q4o9O0pyYVYL4cEmPsKuNemmsuR/L2ov78x/QEWXaqh7VZhCyle8d9LIveCGHikz eeOd4hH1RLkBv2sg5gW928LJf0ZSeeyEDJP3UsfslbjebUc66oKdajtmJExUAyJ92zBP whh3mgaqGXrMnoaneHvAxYi9uepBZ+zkB3DBHe+pcqztuC9cyf8D7/Sd6QteiFqJO9oB FhajpKBuOaEYLpBb+LPxYawqRuaRicVfXg8j0c4xwrJeK+Z43T46adftKN0uLGB0I8Dz lUJw== X-Gm-Message-State: ABuFfoh0djBRJFKwKzhztdTTyC/vuPaXziAq+AR+HIWq+0CKJ4LzSylM JMzf77b8KhWf/U/HzEHOCwowIrU8GeEbMw== X-Received: by 2002:a9d:2c8e:: with SMTP id p14mr7717082otb.346.1538762035649; Fri, 05 Oct 2018 10:53:55 -0700 (PDT) Received: from cloudburst.twiddle.net ([187.217.230.84]) by smtp.gmail.com with ESMTPSA id q10-v6sm2672278otg.31.2018.10.05.10.53.54 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Fri, 05 Oct 2018 10:53:54 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Date: Fri, 5 Oct 2018 12:53:35 -0500 Message-Id: <20181005175350.30752-1-richard.henderson@linaro.org> X-Mailer: git-send-email 2.17.1 MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::335 Subject: [Qemu-devel] [PATCH v3 00/15] target/arm: sve system mode patches X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" For v3, the only change is to patch 4, which is also the only patch without a reviewed-by tag. I now check for aa64 state before checking for sve length, and added a comment about why it is important to play with sve when transitioning into aa32 state. r~ Richard Henderson (15): target/arm: Define ID_AA64ZFR0_EL1 target/arm: Adjust sve_exception_el target/arm: Pass in current_el to fp and sve_exception_el target/arm: Handle SVE vector length changes in system mode target/arm: Adjust aarch64_cpu_dump_state for system mode SVE target/arm: Clear unused predicate bits for LD1RQ target/arm: Rewrite helper_sve_ld1*_r using pages target/arm: Rewrite helper_sve_ld[234]*_r target/arm: Rewrite helper_sve_st[1234]*_r target/arm: Split contiguous loads for endianness target/arm: Split contiguous stores for endianness target/arm: Rewrite vector gather loads target/arm: Rewrite vector gather stores target/arm: Rewrite vector gather first-fault loads target/arm: Pass TCGMemOpIdx to sve memory helpers target/arm/cpu.h | 8 + target/arm/helper-sve.h | 385 +++++-- target/arm/internals.h | 5 + target/arm/cpu64.c | 42 - target/arm/helper.c | 243 +++-- target/arm/op_helper.c | 1 + target/arm/sve_helper.c | 1961 ++++++++++++++++++++++++------------ target/arm/translate-a64.c | 8 +- target/arm/translate-sve.c | 670 ++++++++---- 9 files changed, 2273 insertions(+), 1050 deletions(-) -- 2.17.1