| Message ID | 20190214190603.25030-1-peter.maydell@linaro.org |
|---|---|
| Headers | show |
| Series | target-arm queue | expand |
Patchew URL: https://patchew.org/QEMU/20190214190603.25030-1-peter.maydell@linaro.org/
Hi,
This series seems to have some coding style problems. See output below for
more information:
Message-id: 20190214190603.25030-1-peter.maydell@linaro.org
Subject: [Qemu-devel] [PULL 00/27] target-arm queue
Type: series
=== TEST SCRIPT BEGIN ===
#!/bin/bash
git config --local diff.renamelimit 0
git config --local diff.renames True
git config --local diff.algorithm histogram
./scripts/checkpatch.pl --mailback base..
=== TEST SCRIPT END ===
Updating 3c8cf5a9c21ff8782164d1def7f44bd888713384
From https://github.com/patchew-project/qemu
0d3e41d5ef..0266c739ab master -> master
* [new tag] patchew/20190214190603.25030-1-peter.maydell@linaro.org -> patchew/20190214190603.25030-1-peter.maydell@linaro.org
Switched to a new branch 'test'
c903d16f69 gdbstub: Send a reply to the vKill packet.
f41dbe7001 target/arm: Add missing clear_tail calls
a3938310ec target/arm: Use vector operations for saturation
9b991d3ba4 target/arm: Split out FPSCR.QC to a vector field
268d1b9f5d target/arm: Fix set of bits kept in xregs[ARM_VFP_FPSCR]
f1d08942ee target/arm: Split out flags setting from vfp compares
91e223f0f1 target/arm: Fix arm_cpu_dump_state vs FPSCR
764d782f4d target/arm: Fix vfp_gdb_get/set_reg vs FPSCR
47067fd53b target/arm: Remove neon min/max helpers
05f1c9b528 target/arm: Use tcg integer min/max primitives for neon
1f1543646b target/arm: Use vector minmax expanders for aarch32
06f27fadf8 target/arm: Use vector minmax expanders for aarch64
fc2e976aa2 target/arm: Rely on optimization within tcg_gen_gvec_or
1afa20583c hw/arm/armsse: Fix miswiring of expansion IRQs
fdd25e9b24 hw/intc/armv7m_nvic: Allow byte accesses to SHPR1
1827768bd1 MAINTAINERS: Remove Peter Crosthwaite from various entries
991af7236f arm: Allow system registers for KVM guests to be changed by QEMU code
a9636655dd linux-user/elfload: enable HWCAP_CPUID for AArch64
5112145efe target/arm: expose remaining CPUID registers as RAZ
12fd99a4ba target/arm: expose MPIDR_EL1 to userspace
aff8cd32cc target/arm: expose CPUID registers to userspace
1ef1d6626a target/arm: relax permission checks for HWCAP_CPUID registers
ba75efcd06 target/arm: Restructure disas_fp_int_conv
a1f51e1111 target/arm: Force result size into dp after operation
50d5b46b34 target/arm: Fix int128_make128 lo, hi order in paired_cmpxchg64_be
847bae167b target/arm: Implement HACR_EL2
db698e8bd5 target/arm: Fix CRn to be 14 for PMEVTYPER/PMEVCNTR
=== OUTPUT BEGIN ===
1/27 Checking commit db698e8bd558 (target/arm: Fix CRn to be 14 for PMEVTYPER/PMEVCNTR)
2/27 Checking commit 847bae167b24 (target/arm: Implement HACR_EL2)
3/27 Checking commit 50d5b46b34cb (target/arm: Fix int128_make128 lo, hi order in paired_cmpxchg64_be)
4/27 Checking commit a1f51e11115a (target/arm: Force result size into dp after operation)
5/27 Checking commit ba75efcd0632 (target/arm: Restructure disas_fp_int_conv)
6/27 Checking commit 1ef1d6626a73 (target/arm: relax permission checks for HWCAP_CPUID registers)
7/27 Checking commit aff8cd32cc4a (target/arm: expose CPUID registers to userspace)
8/27 Checking commit 12fd99a4baf8 (target/arm: expose MPIDR_EL1 to userspace)
9/27 Checking commit 5112145efe84 (target/arm: expose remaining CPUID registers as RAZ)
10/27 Checking commit a9636655dd31 (linux-user/elfload: enable HWCAP_CPUID for AArch64)
11/27 Checking commit 991af7236fdf (arm: Allow system registers for KVM guests to be changed by QEMU code)
12/27 Checking commit 1827768bd11f (MAINTAINERS: Remove Peter Crosthwaite from various entries)
13/27 Checking commit fdd25e9b24c8 (hw/intc/armv7m_nvic: Allow byte accesses to SHPR1)
14/27 Checking commit 1afa20583c29 (hw/arm/armsse: Fix miswiring of expansion IRQs)
15/27 Checking commit fc2e976aa28e (target/arm: Rely on optimization within tcg_gen_gvec_or)
16/27 Checking commit 06f27fadf836 (target/arm: Use vector minmax expanders for aarch64)
17/27 Checking commit 1f1543646b22 (target/arm: Use vector minmax expanders for aarch32)
18/27 Checking commit 05f1c9b5283e (target/arm: Use tcg integer min/max primitives for neon)
19/27 Checking commit 47067fd53bc4 (target/arm: Remove neon min/max helpers)
20/27 Checking commit 764d782f4d64 (target/arm: Fix vfp_gdb_get/set_reg vs FPSCR)
ERROR: trailing statements should be on next line
#25: FILE: target/arm/helper.c:84:
+ case 1: stl_p(buf, vfp_get_fpscr(env)); return 4;
ERROR: trailing statements should be on next line
#34: FILE: target/arm/helper.c:110:
+ case 1: vfp_set_fpscr(env, ldl_p(buf)); return 4;
total: 2 errors, 0 warnings, 16 lines checked
Patch 20/27 has style problems, please review. If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
21/27 Checking commit 91e223f0f1af (target/arm: Fix arm_cpu_dump_state vs FPSCR)
22/27 Checking commit f1d08942ee79 (target/arm: Split out flags setting from vfp compares)
23/27 Checking commit 268d1b9f5d61 (target/arm: Fix set of bits kept in xregs[ARM_VFP_FPSCR])
24/27 Checking commit 9b991d3ba404 (target/arm: Split out FPSCR.QC to a vector field)
25/27 Checking commit a3938310ec20 (target/arm: Use vector operations for saturation)
ERROR: spaces required around that '*' (ctx:WxV)
#360: FILE: target/arm/vec_helper.c:774:
+ TYPEN *d = vd, *n = vn; TYPEM *m = vm; \
^
total: 1 errors, 0 warnings, 438 lines checked
Patch 25/27 has style problems, please review. If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
26/27 Checking commit f41dbe70013f (target/arm: Add missing clear_tail calls)
27/27 Checking commit c903d16f6993 (gdbstub: Send a reply to the vKill packet.)
=== OUTPUT END ===
Test command exited with code: 1
The full log is available at
http://patchew.org/logs/20190214190603.25030-1-peter.maydell@linaro.org/testing.checkpatch/?type=message.
---
Email generated automatically by Patchew [http://patchew.org/].
Please send your feedback to patchew-devel@redhat.com
Patchew URL: https://patchew.org/QEMU/20190214190603.25030-1-peter.maydell@linaro.org/
Hi,
This series seems to have some coding style problems. See output below for
more information:
Message-id: 20190214190603.25030-1-peter.maydell@linaro.org
Subject: [Qemu-devel] [PULL 00/27] target-arm queue
Type: series
=== TEST SCRIPT BEGIN ===
#!/bin/bash
git config --local diff.renamelimit 0
git config --local diff.renames True
git config --local diff.algorithm histogram
./scripts/checkpatch.pl --mailback base..
=== TEST SCRIPT END ===
Updating 3c8cf5a9c21ff8782164d1def7f44bd888713384
Switched to a new branch 'test'
fb39c2e90f gdbstub: Send a reply to the vKill packet.
86563bda9d target/arm: Add missing clear_tail calls
866f1958b4 target/arm: Use vector operations for saturation
7fadd905a7 target/arm: Split out FPSCR.QC to a vector field
3bbf4384f9 target/arm: Fix set of bits kept in xregs[ARM_VFP_FPSCR]
178fe16ac8 target/arm: Split out flags setting from vfp compares
1fb9548fec target/arm: Fix arm_cpu_dump_state vs FPSCR
c045bbe35f target/arm: Fix vfp_gdb_get/set_reg vs FPSCR
0bfb764ba7 target/arm: Remove neon min/max helpers
4a40d71633 target/arm: Use tcg integer min/max primitives for neon
9eaba50860 target/arm: Use vector minmax expanders for aarch32
e222548533 target/arm: Use vector minmax expanders for aarch64
e77230191f target/arm: Rely on optimization within tcg_gen_gvec_or
3f7cda73b2 hw/arm/armsse: Fix miswiring of expansion IRQs
d93ebe8185 hw/intc/armv7m_nvic: Allow byte accesses to SHPR1
cce31aab3d MAINTAINERS: Remove Peter Crosthwaite from various entries
9891e5f6c7 arm: Allow system registers for KVM guests to be changed by QEMU code
ab703f0d5a linux-user/elfload: enable HWCAP_CPUID for AArch64
b4301eab08 target/arm: expose remaining CPUID registers as RAZ
7abf3c8631 target/arm: expose MPIDR_EL1 to userspace
d17bc752d8 target/arm: expose CPUID registers to userspace
721d2c2056 target/arm: relax permission checks for HWCAP_CPUID registers
70d62fd729 target/arm: Restructure disas_fp_int_conv
907d999506 target/arm: Force result size into dp after operation
a20dcecfa6 target/arm: Fix int128_make128 lo, hi order in paired_cmpxchg64_be
d42d84b7b1 target/arm: Implement HACR_EL2
f1dfc8484b target/arm: Fix CRn to be 14 for PMEVTYPER/PMEVCNTR
=== OUTPUT BEGIN ===
1/27 Checking commit f1dfc8484bc4 (target/arm: Fix CRn to be 14 for PMEVTYPER/PMEVCNTR)
2/27 Checking commit d42d84b7b110 (target/arm: Implement HACR_EL2)
3/27 Checking commit a20dcecfa649 (target/arm: Fix int128_make128 lo, hi order in paired_cmpxchg64_be)
4/27 Checking commit 907d99950666 (target/arm: Force result size into dp after operation)
5/27 Checking commit 70d62fd72937 (target/arm: Restructure disas_fp_int_conv)
6/27 Checking commit 721d2c20567e (target/arm: relax permission checks for HWCAP_CPUID registers)
7/27 Checking commit d17bc752d844 (target/arm: expose CPUID registers to userspace)
8/27 Checking commit 7abf3c863143 (target/arm: expose MPIDR_EL1 to userspace)
9/27 Checking commit b4301eab085b (target/arm: expose remaining CPUID registers as RAZ)
10/27 Checking commit ab703f0d5a46 (linux-user/elfload: enable HWCAP_CPUID for AArch64)
11/27 Checking commit 9891e5f6c709 (arm: Allow system registers for KVM guests to be changed by QEMU code)
12/27 Checking commit cce31aab3d66 (MAINTAINERS: Remove Peter Crosthwaite from various entries)
13/27 Checking commit d93ebe8185a4 (hw/intc/armv7m_nvic: Allow byte accesses to SHPR1)
14/27 Checking commit 3f7cda73b20a (hw/arm/armsse: Fix miswiring of expansion IRQs)
15/27 Checking commit e77230191f43 (target/arm: Rely on optimization within tcg_gen_gvec_or)
16/27 Checking commit e222548533b0 (target/arm: Use vector minmax expanders for aarch64)
17/27 Checking commit 9eaba5086098 (target/arm: Use vector minmax expanders for aarch32)
18/27 Checking commit 4a40d7163314 (target/arm: Use tcg integer min/max primitives for neon)
19/27 Checking commit 0bfb764ba772 (target/arm: Remove neon min/max helpers)
20/27 Checking commit c045bbe35fd4 (target/arm: Fix vfp_gdb_get/set_reg vs FPSCR)
ERROR: trailing statements should be on next line
#25: FILE: target/arm/helper.c:84:
+ case 1: stl_p(buf, vfp_get_fpscr(env)); return 4;
ERROR: trailing statements should be on next line
#34: FILE: target/arm/helper.c:110:
+ case 1: vfp_set_fpscr(env, ldl_p(buf)); return 4;
total: 2 errors, 0 warnings, 16 lines checked
Patch 20/27 has style problems, please review. If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
21/27 Checking commit 1fb9548fec41 (target/arm: Fix arm_cpu_dump_state vs FPSCR)
22/27 Checking commit 178fe16ac872 (target/arm: Split out flags setting from vfp compares)
23/27 Checking commit 3bbf4384f995 (target/arm: Fix set of bits kept in xregs[ARM_VFP_FPSCR])
24/27 Checking commit 7fadd905a7f3 (target/arm: Split out FPSCR.QC to a vector field)
25/27 Checking commit 866f1958b4d7 (target/arm: Use vector operations for saturation)
ERROR: spaces required around that '*' (ctx:WxV)
#360: FILE: target/arm/vec_helper.c:774:
+ TYPEN *d = vd, *n = vn; TYPEM *m = vm; \
^
total: 1 errors, 0 warnings, 438 lines checked
Patch 25/27 has style problems, please review. If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
26/27 Checking commit 86563bda9da9 (target/arm: Add missing clear_tail calls)
27/27 Checking commit fb39c2e90f66 (gdbstub: Send a reply to the vKill packet.)
=== OUTPUT END ===
Test command exited with code: 1
The full log is available at
http://patchew.org/logs/20190214190603.25030-1-peter.maydell@linaro.org/testing.checkpatch/?type=message.
---
Email generated automatically by Patchew [http://patchew.org/].
Please send your feedback to patchew-devel@redhat.com
Patchew URL: https://patchew.org/QEMU/20190214190603.25030-1-peter.maydell@linaro.org/
Hi,
This series seems to have some coding style problems. See output below for
more information:
Message-id: 20190214190603.25030-1-peter.maydell@linaro.org
Subject: [Qemu-devel] [PULL 00/27] target-arm queue
Type: series
=== TEST SCRIPT BEGIN ===
#!/bin/bash
git config --local diff.renamelimit 0
git config --local diff.renames True
git config --local diff.algorithm histogram
./scripts/checkpatch.pl --mailback base..
=== TEST SCRIPT END ===
Updating 3c8cf5a9c21ff8782164d1def7f44bd888713384
From https://github.com/patchew-project/qemu
t [tag update] patchew/20190214190603.25030-1-peter.maydell@linaro.org -> patchew/20190214190603.25030-1-peter.maydell@linaro.org
Switched to a new branch 'test'
8b28bf8c02 gdbstub: Send a reply to the vKill packet.
35e9a92f59 target/arm: Add missing clear_tail calls
679145406a target/arm: Use vector operations for saturation
a14d6bfaf2 target/arm: Split out FPSCR.QC to a vector field
f8fbccbba5 target/arm: Fix set of bits kept in xregs[ARM_VFP_FPSCR]
ba0918dc3a target/arm: Split out flags setting from vfp compares
97f0d8db7d target/arm: Fix arm_cpu_dump_state vs FPSCR
fcc5258d65 target/arm: Fix vfp_gdb_get/set_reg vs FPSCR
496ebd96d8 target/arm: Remove neon min/max helpers
57606e781d target/arm: Use tcg integer min/max primitives for neon
fb20fb9747 target/arm: Use vector minmax expanders for aarch32
09fe9b2ce9 target/arm: Use vector minmax expanders for aarch64
76ee8fbab5 target/arm: Rely on optimization within tcg_gen_gvec_or
a9bf743839 hw/arm/armsse: Fix miswiring of expansion IRQs
a2989bb924 hw/intc/armv7m_nvic: Allow byte accesses to SHPR1
d58f7f8928 MAINTAINERS: Remove Peter Crosthwaite from various entries
0db6bcf0f7 arm: Allow system registers for KVM guests to be changed by QEMU code
cc4082ee0d linux-user/elfload: enable HWCAP_CPUID for AArch64
a317a40397 target/arm: expose remaining CPUID registers as RAZ
50b5ab0dc0 target/arm: expose MPIDR_EL1 to userspace
424e73b993 target/arm: expose CPUID registers to userspace
f8c3d064cd target/arm: relax permission checks for HWCAP_CPUID registers
944dfb207b target/arm: Restructure disas_fp_int_conv
770275cef8 target/arm: Force result size into dp after operation
86975d477f target/arm: Fix int128_make128 lo, hi order in paired_cmpxchg64_be
0fad7188ea target/arm: Implement HACR_EL2
df8c887922 target/arm: Fix CRn to be 14 for PMEVTYPER/PMEVCNTR
=== OUTPUT BEGIN ===
1/27 Checking commit df8c88792230 (target/arm: Fix CRn to be 14 for PMEVTYPER/PMEVCNTR)
2/27 Checking commit 0fad7188ea17 (target/arm: Implement HACR_EL2)
3/27 Checking commit 86975d477ff0 (target/arm: Fix int128_make128 lo, hi order in paired_cmpxchg64_be)
4/27 Checking commit 770275cef89b (target/arm: Force result size into dp after operation)
5/27 Checking commit 944dfb207b6b (target/arm: Restructure disas_fp_int_conv)
6/27 Checking commit f8c3d064cd92 (target/arm: relax permission checks for HWCAP_CPUID registers)
7/27 Checking commit 424e73b99329 (target/arm: expose CPUID registers to userspace)
8/27 Checking commit 50b5ab0dc071 (target/arm: expose MPIDR_EL1 to userspace)
9/27 Checking commit a317a4039735 (target/arm: expose remaining CPUID registers as RAZ)
10/27 Checking commit cc4082ee0d10 (linux-user/elfload: enable HWCAP_CPUID for AArch64)
11/27 Checking commit 0db6bcf0f7ac (arm: Allow system registers for KVM guests to be changed by QEMU code)
12/27 Checking commit d58f7f89287b (MAINTAINERS: Remove Peter Crosthwaite from various entries)
13/27 Checking commit a2989bb92474 (hw/intc/armv7m_nvic: Allow byte accesses to SHPR1)
14/27 Checking commit a9bf743839e7 (hw/arm/armsse: Fix miswiring of expansion IRQs)
15/27 Checking commit 76ee8fbab5cf (target/arm: Rely on optimization within tcg_gen_gvec_or)
16/27 Checking commit 09fe9b2ce988 (target/arm: Use vector minmax expanders for aarch64)
17/27 Checking commit fb20fb9747a0 (target/arm: Use vector minmax expanders for aarch32)
18/27 Checking commit 57606e781d78 (target/arm: Use tcg integer min/max primitives for neon)
19/27 Checking commit 496ebd96d8f5 (target/arm: Remove neon min/max helpers)
20/27 Checking commit fcc5258d65aa (target/arm: Fix vfp_gdb_get/set_reg vs FPSCR)
ERROR: trailing statements should be on next line
#25: FILE: target/arm/helper.c:84:
+ case 1: stl_p(buf, vfp_get_fpscr(env)); return 4;
ERROR: trailing statements should be on next line
#34: FILE: target/arm/helper.c:110:
+ case 1: vfp_set_fpscr(env, ldl_p(buf)); return 4;
total: 2 errors, 0 warnings, 16 lines checked
Patch 20/27 has style problems, please review. If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
21/27 Checking commit 97f0d8db7d84 (target/arm: Fix arm_cpu_dump_state vs FPSCR)
22/27 Checking commit ba0918dc3a40 (target/arm: Split out flags setting from vfp compares)
23/27 Checking commit f8fbccbba569 (target/arm: Fix set of bits kept in xregs[ARM_VFP_FPSCR])
24/27 Checking commit a14d6bfaf27b (target/arm: Split out FPSCR.QC to a vector field)
25/27 Checking commit 679145406ae5 (target/arm: Use vector operations for saturation)
ERROR: spaces required around that '*' (ctx:WxV)
#360: FILE: target/arm/vec_helper.c:774:
+ TYPEN *d = vd, *n = vn; TYPEM *m = vm; \
^
total: 1 errors, 0 warnings, 438 lines checked
Patch 25/27 has style problems, please review. If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
26/27 Checking commit 35e9a92f5916 (target/arm: Add missing clear_tail calls)
27/27 Checking commit 8b28bf8c02b6 (gdbstub: Send a reply to the vKill packet.)
=== OUTPUT END ===
Test command exited with code: 1
The full log is available at
http://patchew.org/logs/20190214190603.25030-1-peter.maydell@linaro.org/testing.checkpatch/?type=message.
---
Email generated automatically by Patchew [http://patchew.org/].
Please send your feedback to patchew-devel@redhat.com
Patchew URL: https://patchew.org/QEMU/20190214190603.25030-1-peter.maydell@linaro.org/
Hi,
This series seems to have some coding style problems. See output below for
more information:
Message-id: 20190214190603.25030-1-peter.maydell@linaro.org
Subject: [Qemu-devel] [PULL 00/27] target-arm queue
Type: series
=== TEST SCRIPT BEGIN ===
#!/bin/bash
git config --local diff.renamelimit 0
git config --local diff.renames True
git config --local diff.algorithm histogram
./scripts/checkpatch.pl --mailback base..
=== TEST SCRIPT END ===
Updating 3c8cf5a9c21ff8782164d1def7f44bd888713384
From https://github.com/patchew-project/qemu
t [tag update] patchew/20190214190603.25030-1-peter.maydell@linaro.org -> patchew/20190214190603.25030-1-peter.maydell@linaro.org
Switched to a new branch 'test'
4a5fa28330 gdbstub: Send a reply to the vKill packet.
377a1b0e65 target/arm: Add missing clear_tail calls
f7d3af4abb target/arm: Use vector operations for saturation
df8ca3278b target/arm: Split out FPSCR.QC to a vector field
09d6eda7b5 target/arm: Fix set of bits kept in xregs[ARM_VFP_FPSCR]
08ed43f236 target/arm: Split out flags setting from vfp compares
13d1fa231c target/arm: Fix arm_cpu_dump_state vs FPSCR
89c3c77cc7 target/arm: Fix vfp_gdb_get/set_reg vs FPSCR
9ef6297e49 target/arm: Remove neon min/max helpers
409e13e7c6 target/arm: Use tcg integer min/max primitives for neon
dbcd048d95 target/arm: Use vector minmax expanders for aarch32
35d58be2dc target/arm: Use vector minmax expanders for aarch64
ac2c4a327a target/arm: Rely on optimization within tcg_gen_gvec_or
081212958f hw/arm/armsse: Fix miswiring of expansion IRQs
425d5d76ea hw/intc/armv7m_nvic: Allow byte accesses to SHPR1
1b1ca68043 MAINTAINERS: Remove Peter Crosthwaite from various entries
d313b64e06 arm: Allow system registers for KVM guests to be changed by QEMU code
ad6e481428 linux-user/elfload: enable HWCAP_CPUID for AArch64
ec69944c2a target/arm: expose remaining CPUID registers as RAZ
59b0c47736 target/arm: expose MPIDR_EL1 to userspace
38948116f6 target/arm: expose CPUID registers to userspace
de5c25835f target/arm: relax permission checks for HWCAP_CPUID registers
f2d76c5e1d target/arm: Restructure disas_fp_int_conv
f71a727256 target/arm: Force result size into dp after operation
5a52d23be1 target/arm: Fix int128_make128 lo, hi order in paired_cmpxchg64_be
b7f2a14413 target/arm: Implement HACR_EL2
eb86b450b4 target/arm: Fix CRn to be 14 for PMEVTYPER/PMEVCNTR
=== OUTPUT BEGIN ===
1/27 Checking commit eb86b450b4d2 (target/arm: Fix CRn to be 14 for PMEVTYPER/PMEVCNTR)
2/27 Checking commit b7f2a1441331 (target/arm: Implement HACR_EL2)
3/27 Checking commit 5a52d23be1a7 (target/arm: Fix int128_make128 lo, hi order in paired_cmpxchg64_be)
4/27 Checking commit f71a72725699 (target/arm: Force result size into dp after operation)
5/27 Checking commit f2d76c5e1d0e (target/arm: Restructure disas_fp_int_conv)
6/27 Checking commit de5c25835ff7 (target/arm: relax permission checks for HWCAP_CPUID registers)
7/27 Checking commit 38948116f604 (target/arm: expose CPUID registers to userspace)
8/27 Checking commit 59b0c4773654 (target/arm: expose MPIDR_EL1 to userspace)
9/27 Checking commit ec69944c2adf (target/arm: expose remaining CPUID registers as RAZ)
10/27 Checking commit ad6e481428ed (linux-user/elfload: enable HWCAP_CPUID for AArch64)
11/27 Checking commit d313b64e0651 (arm: Allow system registers for KVM guests to be changed by QEMU code)
12/27 Checking commit 1b1ca680431d (MAINTAINERS: Remove Peter Crosthwaite from various entries)
13/27 Checking commit 425d5d76ea60 (hw/intc/armv7m_nvic: Allow byte accesses to SHPR1)
14/27 Checking commit 081212958fd9 (hw/arm/armsse: Fix miswiring of expansion IRQs)
15/27 Checking commit ac2c4a327a45 (target/arm: Rely on optimization within tcg_gen_gvec_or)
16/27 Checking commit 35d58be2dcb7 (target/arm: Use vector minmax expanders for aarch64)
17/27 Checking commit dbcd048d9559 (target/arm: Use vector minmax expanders for aarch32)
18/27 Checking commit 409e13e7c607 (target/arm: Use tcg integer min/max primitives for neon)
19/27 Checking commit 9ef6297e49d3 (target/arm: Remove neon min/max helpers)
20/27 Checking commit 89c3c77cc712 (target/arm: Fix vfp_gdb_get/set_reg vs FPSCR)
ERROR: trailing statements should be on next line
#25: FILE: target/arm/helper.c:84:
+ case 1: stl_p(buf, vfp_get_fpscr(env)); return 4;
ERROR: trailing statements should be on next line
#34: FILE: target/arm/helper.c:110:
+ case 1: vfp_set_fpscr(env, ldl_p(buf)); return 4;
total: 2 errors, 0 warnings, 16 lines checked
Patch 20/27 has style problems, please review. If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
21/27 Checking commit 13d1fa231c8e (target/arm: Fix arm_cpu_dump_state vs FPSCR)
22/27 Checking commit 08ed43f236ec (target/arm: Split out flags setting from vfp compares)
23/27 Checking commit 09d6eda7b5ab (target/arm: Fix set of bits kept in xregs[ARM_VFP_FPSCR])
24/27 Checking commit df8ca3278b2c (target/arm: Split out FPSCR.QC to a vector field)
25/27 Checking commit f7d3af4abb72 (target/arm: Use vector operations for saturation)
ERROR: spaces required around that '*' (ctx:WxV)
#360: FILE: target/arm/vec_helper.c:774:
+ TYPEN *d = vd, *n = vn; TYPEM *m = vm; \
^
total: 1 errors, 0 warnings, 438 lines checked
Patch 25/27 has style problems, please review. If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
26/27 Checking commit 377a1b0e655a (target/arm: Add missing clear_tail calls)
27/27 Checking commit 4a5fa2833065 (gdbstub: Send a reply to the vKill packet.)
=== OUTPUT END ===
Test command exited with code: 1
The full log is available at
http://patchew.org/logs/20190214190603.25030-1-peter.maydell@linaro.org/testing.checkpatch/?type=message.
---
Email generated automatically by Patchew [http://patchew.org/].
Please send your feedback to patchew-devel@redhat.com
Patchew URL: https://patchew.org/QEMU/20190214190603.25030-1-peter.maydell@linaro.org/
Hi,
This series seems to have some coding style problems. See output below for
more information:
Message-id: 20190214190603.25030-1-peter.maydell@linaro.org
Subject: [Qemu-devel] [PULL 00/27] target-arm queue
Type: series
=== TEST SCRIPT BEGIN ===
#!/bin/bash
git config --local diff.renamelimit 0
git config --local diff.renames True
git config --local diff.algorithm histogram
./scripts/checkpatch.pl --mailback base..
=== TEST SCRIPT END ===
Updating 3c8cf5a9c21ff8782164d1def7f44bd888713384
From https://github.com/patchew-project/qemu
t [tag update] patchew/20190214190603.25030-1-peter.maydell@linaro.org -> patchew/20190214190603.25030-1-peter.maydell@linaro.org
Switched to a new branch 'test'
acf570635b gdbstub: Send a reply to the vKill packet.
cfd8f55e95 target/arm: Add missing clear_tail calls
259bb867b8 target/arm: Use vector operations for saturation
6b04328ef7 target/arm: Split out FPSCR.QC to a vector field
de7292c5a8 target/arm: Fix set of bits kept in xregs[ARM_VFP_FPSCR]
999ec7bd2d target/arm: Split out flags setting from vfp compares
20031f4d81 target/arm: Fix arm_cpu_dump_state vs FPSCR
7f2ccbe2fc target/arm: Fix vfp_gdb_get/set_reg vs FPSCR
3652215042 target/arm: Remove neon min/max helpers
a2f9ae9d00 target/arm: Use tcg integer min/max primitives for neon
2a97616341 target/arm: Use vector minmax expanders for aarch32
0cbd8e1d73 target/arm: Use vector minmax expanders for aarch64
60dbc19c09 target/arm: Rely on optimization within tcg_gen_gvec_or
612e1a64f9 hw/arm/armsse: Fix miswiring of expansion IRQs
79033fb4ff hw/intc/armv7m_nvic: Allow byte accesses to SHPR1
b0353d09d8 MAINTAINERS: Remove Peter Crosthwaite from various entries
1f2b02b2cd arm: Allow system registers for KVM guests to be changed by QEMU code
06a5266ef7 linux-user/elfload: enable HWCAP_CPUID for AArch64
60eef60261 target/arm: expose remaining CPUID registers as RAZ
dfe0bf2269 target/arm: expose MPIDR_EL1 to userspace
027c283aef target/arm: expose CPUID registers to userspace
641715c1a5 target/arm: relax permission checks for HWCAP_CPUID registers
0fce875951 target/arm: Restructure disas_fp_int_conv
743fa18abf target/arm: Force result size into dp after operation
93602e2cd3 target/arm: Fix int128_make128 lo, hi order in paired_cmpxchg64_be
59084e04e5 target/arm: Implement HACR_EL2
7150f17967 target/arm: Fix CRn to be 14 for PMEVTYPER/PMEVCNTR
=== OUTPUT BEGIN ===
1/27 Checking commit 7150f17967aa (target/arm: Fix CRn to be 14 for PMEVTYPER/PMEVCNTR)
2/27 Checking commit 59084e04e5d6 (target/arm: Implement HACR_EL2)
3/27 Checking commit 93602e2cd3f5 (target/arm: Fix int128_make128 lo, hi order in paired_cmpxchg64_be)
4/27 Checking commit 743fa18abfb8 (target/arm: Force result size into dp after operation)
5/27 Checking commit 0fce87595153 (target/arm: Restructure disas_fp_int_conv)
6/27 Checking commit 641715c1a53d (target/arm: relax permission checks for HWCAP_CPUID registers)
7/27 Checking commit 027c283aef86 (target/arm: expose CPUID registers to userspace)
8/27 Checking commit dfe0bf226921 (target/arm: expose MPIDR_EL1 to userspace)
9/27 Checking commit 60eef60261b6 (target/arm: expose remaining CPUID registers as RAZ)
10/27 Checking commit 06a5266ef754 (linux-user/elfload: enable HWCAP_CPUID for AArch64)
11/27 Checking commit 1f2b02b2cd7a (arm: Allow system registers for KVM guests to be changed by QEMU code)
12/27 Checking commit b0353d09d85b (MAINTAINERS: Remove Peter Crosthwaite from various entries)
13/27 Checking commit 79033fb4ff44 (hw/intc/armv7m_nvic: Allow byte accesses to SHPR1)
14/27 Checking commit 612e1a64f9e9 (hw/arm/armsse: Fix miswiring of expansion IRQs)
15/27 Checking commit 60dbc19c096f (target/arm: Rely on optimization within tcg_gen_gvec_or)
16/27 Checking commit 0cbd8e1d7369 (target/arm: Use vector minmax expanders for aarch64)
17/27 Checking commit 2a976163412b (target/arm: Use vector minmax expanders for aarch32)
18/27 Checking commit a2f9ae9d00dc (target/arm: Use tcg integer min/max primitives for neon)
19/27 Checking commit 3652215042cd (target/arm: Remove neon min/max helpers)
20/27 Checking commit 7f2ccbe2fc14 (target/arm: Fix vfp_gdb_get/set_reg vs FPSCR)
ERROR: trailing statements should be on next line
#25: FILE: target/arm/helper.c:84:
+ case 1: stl_p(buf, vfp_get_fpscr(env)); return 4;
ERROR: trailing statements should be on next line
#34: FILE: target/arm/helper.c:110:
+ case 1: vfp_set_fpscr(env, ldl_p(buf)); return 4;
total: 2 errors, 0 warnings, 16 lines checked
Patch 20/27 has style problems, please review. If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
21/27 Checking commit 20031f4d81ce (target/arm: Fix arm_cpu_dump_state vs FPSCR)
22/27 Checking commit 999ec7bd2d81 (target/arm: Split out flags setting from vfp compares)
23/27 Checking commit de7292c5a8d3 (target/arm: Fix set of bits kept in xregs[ARM_VFP_FPSCR])
24/27 Checking commit 6b04328ef702 (target/arm: Split out FPSCR.QC to a vector field)
25/27 Checking commit 259bb867b8c7 (target/arm: Use vector operations for saturation)
ERROR: spaces required around that '*' (ctx:WxV)
#360: FILE: target/arm/vec_helper.c:774:
+ TYPEN *d = vd, *n = vn; TYPEM *m = vm; \
^
total: 1 errors, 0 warnings, 438 lines checked
Patch 25/27 has style problems, please review. If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
26/27 Checking commit cfd8f55e9599 (target/arm: Add missing clear_tail calls)
27/27 Checking commit acf570635b34 (gdbstub: Send a reply to the vKill packet.)
=== OUTPUT END ===
Test command exited with code: 1
The full log is available at
http://patchew.org/logs/20190214190603.25030-1-peter.maydell@linaro.org/testing.checkpatch/?type=message.
---
Email generated automatically by Patchew [http://patchew.org/].
Please send your feedback to patchew-devel@redhat.com
Patchew URL: https://patchew.org/QEMU/20190214190603.25030-1-peter.maydell@linaro.org/
Hi,
This series seems to have some coding style problems. See output below for
more information:
Message-id: 20190214190603.25030-1-peter.maydell@linaro.org
Subject: [Qemu-devel] [PULL 00/27] target-arm queue
Type: series
=== TEST SCRIPT BEGIN ===
#!/bin/bash
git config --local diff.renamelimit 0
git config --local diff.renames True
git config --local diff.algorithm histogram
./scripts/checkpatch.pl --mailback base..
=== TEST SCRIPT END ===
Updating 3c8cf5a9c21ff8782164d1def7f44bd888713384
From https://github.com/patchew-project/qemu
t [tag update] patchew/20190214190603.25030-1-peter.maydell@linaro.org -> patchew/20190214190603.25030-1-peter.maydell@linaro.org
* [new tag] patchew/20190214220453.15858-1-svens@stackframe.org -> patchew/20190214220453.15858-1-svens@stackframe.org
Switched to a new branch 'test'
107d0c1054 gdbstub: Send a reply to the vKill packet.
1cefa94d4c target/arm: Add missing clear_tail calls
2d7acfba65 target/arm: Use vector operations for saturation
4cacb6d477 target/arm: Split out FPSCR.QC to a vector field
af552d5a9a target/arm: Fix set of bits kept in xregs[ARM_VFP_FPSCR]
889e25cedd target/arm: Split out flags setting from vfp compares
08ed30fcbd target/arm: Fix arm_cpu_dump_state vs FPSCR
58c34834b4 target/arm: Fix vfp_gdb_get/set_reg vs FPSCR
37ba9384f4 target/arm: Remove neon min/max helpers
3fe3bcd56e target/arm: Use tcg integer min/max primitives for neon
7917081632 target/arm: Use vector minmax expanders for aarch32
7be5894710 target/arm: Use vector minmax expanders for aarch64
3dc77fca6e target/arm: Rely on optimization within tcg_gen_gvec_or
0aa85c83b5 hw/arm/armsse: Fix miswiring of expansion IRQs
a171b85781 hw/intc/armv7m_nvic: Allow byte accesses to SHPR1
535a7c3670 MAINTAINERS: Remove Peter Crosthwaite from various entries
824e72655d arm: Allow system registers for KVM guests to be changed by QEMU code
c4582c22e5 linux-user/elfload: enable HWCAP_CPUID for AArch64
835edbcab5 target/arm: expose remaining CPUID registers as RAZ
00813a218f target/arm: expose MPIDR_EL1 to userspace
2fad8a0685 target/arm: expose CPUID registers to userspace
876f185d5f target/arm: relax permission checks for HWCAP_CPUID registers
1a8296d2a7 target/arm: Restructure disas_fp_int_conv
9ef7368140 target/arm: Force result size into dp after operation
e6ffe03733 target/arm: Fix int128_make128 lo, hi order in paired_cmpxchg64_be
0588209db8 target/arm: Implement HACR_EL2
8be75be4ad target/arm: Fix CRn to be 14 for PMEVTYPER/PMEVCNTR
=== OUTPUT BEGIN ===
1/27 Checking commit 8be75be4ad21 (target/arm: Fix CRn to be 14 for PMEVTYPER/PMEVCNTR)
2/27 Checking commit 0588209db891 (target/arm: Implement HACR_EL2)
3/27 Checking commit e6ffe03733b4 (target/arm: Fix int128_make128 lo, hi order in paired_cmpxchg64_be)
4/27 Checking commit 9ef736814077 (target/arm: Force result size into dp after operation)
5/27 Checking commit 1a8296d2a731 (target/arm: Restructure disas_fp_int_conv)
6/27 Checking commit 876f185d5fde (target/arm: relax permission checks for HWCAP_CPUID registers)
7/27 Checking commit 2fad8a068527 (target/arm: expose CPUID registers to userspace)
8/27 Checking commit 00813a218f3d (target/arm: expose MPIDR_EL1 to userspace)
9/27 Checking commit 835edbcab59c (target/arm: expose remaining CPUID registers as RAZ)
10/27 Checking commit c4582c22e533 (linux-user/elfload: enable HWCAP_CPUID for AArch64)
11/27 Checking commit 824e72655d47 (arm: Allow system registers for KVM guests to be changed by QEMU code)
12/27 Checking commit 535a7c36704b (MAINTAINERS: Remove Peter Crosthwaite from various entries)
13/27 Checking commit a171b857817d (hw/intc/armv7m_nvic: Allow byte accesses to SHPR1)
14/27 Checking commit 0aa85c83b58c (hw/arm/armsse: Fix miswiring of expansion IRQs)
15/27 Checking commit 3dc77fca6e12 (target/arm: Rely on optimization within tcg_gen_gvec_or)
16/27 Checking commit 7be5894710ec (target/arm: Use vector minmax expanders for aarch64)
17/27 Checking commit 7917081632bd (target/arm: Use vector minmax expanders for aarch32)
18/27 Checking commit 3fe3bcd56e94 (target/arm: Use tcg integer min/max primitives for neon)
19/27 Checking commit 37ba9384f40b (target/arm: Remove neon min/max helpers)
20/27 Checking commit 58c34834b47f (target/arm: Fix vfp_gdb_get/set_reg vs FPSCR)
ERROR: trailing statements should be on next line
#25: FILE: target/arm/helper.c:84:
+ case 1: stl_p(buf, vfp_get_fpscr(env)); return 4;
ERROR: trailing statements should be on next line
#34: FILE: target/arm/helper.c:110:
+ case 1: vfp_set_fpscr(env, ldl_p(buf)); return 4;
total: 2 errors, 0 warnings, 16 lines checked
Patch 20/27 has style problems, please review. If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
21/27 Checking commit 08ed30fcbd5f (target/arm: Fix arm_cpu_dump_state vs FPSCR)
22/27 Checking commit 889e25cedd73 (target/arm: Split out flags setting from vfp compares)
23/27 Checking commit af552d5a9a15 (target/arm: Fix set of bits kept in xregs[ARM_VFP_FPSCR])
24/27 Checking commit 4cacb6d47706 (target/arm: Split out FPSCR.QC to a vector field)
25/27 Checking commit 2d7acfba6561 (target/arm: Use vector operations for saturation)
ERROR: spaces required around that '*' (ctx:WxV)
#360: FILE: target/arm/vec_helper.c:774:
+ TYPEN *d = vd, *n = vn; TYPEM *m = vm; \
^
total: 1 errors, 0 warnings, 438 lines checked
Patch 25/27 has style problems, please review. If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
26/27 Checking commit 1cefa94d4c1d (target/arm: Add missing clear_tail calls)
27/27 Checking commit 107d0c10546a (gdbstub: Send a reply to the vKill packet.)
=== OUTPUT END ===
Test command exited with code: 1
The full log is available at
http://patchew.org/logs/20190214190603.25030-1-peter.maydell@linaro.org/testing.checkpatch/?type=message.
---
Email generated automatically by Patchew [http://patchew.org/].
Please send your feedback to patchew-devel@redhat.com
Patchew URL: https://patchew.org/QEMU/20190214190603.25030-1-peter.maydell@linaro.org/
Hi,
This series seems to have some coding style problems. See output below for
more information:
Message-id: 20190214190603.25030-1-peter.maydell@linaro.org
Subject: [Qemu-devel] [PULL 00/27] target-arm queue
Type: series
=== TEST SCRIPT BEGIN ===
#!/bin/bash
git config --local diff.renamelimit 0
git config --local diff.renames True
git config --local diff.algorithm histogram
./scripts/checkpatch.pl --mailback base..
=== TEST SCRIPT END ===
Updating 3c8cf5a9c21ff8782164d1def7f44bd888713384
From https://github.com/patchew-project/qemu
t [tag update] patchew/20190214190603.25030-1-peter.maydell@linaro.org -> patchew/20190214190603.25030-1-peter.maydell@linaro.org
Switched to a new branch 'test'
1fcacb9030 gdbstub: Send a reply to the vKill packet.
facc45d026 target/arm: Add missing clear_tail calls
fe47ae1ac0 target/arm: Use vector operations for saturation
beb3acb4a2 target/arm: Split out FPSCR.QC to a vector field
8187800f5f target/arm: Fix set of bits kept in xregs[ARM_VFP_FPSCR]
61090e681c target/arm: Split out flags setting from vfp compares
753b33ef6a target/arm: Fix arm_cpu_dump_state vs FPSCR
a6ac25752e target/arm: Fix vfp_gdb_get/set_reg vs FPSCR
70ae1e5a51 target/arm: Remove neon min/max helpers
aa0575d473 target/arm: Use tcg integer min/max primitives for neon
00d818ea1d target/arm: Use vector minmax expanders for aarch32
7e76c6e511 target/arm: Use vector minmax expanders for aarch64
26a48e84cf target/arm: Rely on optimization within tcg_gen_gvec_or
17db94065e hw/arm/armsse: Fix miswiring of expansion IRQs
f5b0afe7e5 hw/intc/armv7m_nvic: Allow byte accesses to SHPR1
dafa19baa4 MAINTAINERS: Remove Peter Crosthwaite from various entries
3e133e44a1 arm: Allow system registers for KVM guests to be changed by QEMU code
f2cfb74b09 linux-user/elfload: enable HWCAP_CPUID for AArch64
ca0002eebc target/arm: expose remaining CPUID registers as RAZ
4b893eb212 target/arm: expose MPIDR_EL1 to userspace
9d5e5704e0 target/arm: expose CPUID registers to userspace
b1a6cabff4 target/arm: relax permission checks for HWCAP_CPUID registers
a252f2d3f9 target/arm: Restructure disas_fp_int_conv
095c71f97a target/arm: Force result size into dp after operation
dbb6c95fc5 target/arm: Fix int128_make128 lo, hi order in paired_cmpxchg64_be
0319bf2a5a target/arm: Implement HACR_EL2
1e79fd6dec target/arm: Fix CRn to be 14 for PMEVTYPER/PMEVCNTR
=== OUTPUT BEGIN ===
1/27 Checking commit 1e79fd6decaa (target/arm: Fix CRn to be 14 for PMEVTYPER/PMEVCNTR)
2/27 Checking commit 0319bf2a5af5 (target/arm: Implement HACR_EL2)
3/27 Checking commit dbb6c95fc539 (target/arm: Fix int128_make128 lo, hi order in paired_cmpxchg64_be)
4/27 Checking commit 095c71f97a76 (target/arm: Force result size into dp after operation)
5/27 Checking commit a252f2d3f9f7 (target/arm: Restructure disas_fp_int_conv)
6/27 Checking commit b1a6cabff49f (target/arm: relax permission checks for HWCAP_CPUID registers)
7/27 Checking commit 9d5e5704e04b (target/arm: expose CPUID registers to userspace)
8/27 Checking commit 4b893eb21287 (target/arm: expose MPIDR_EL1 to userspace)
9/27 Checking commit ca0002eebc43 (target/arm: expose remaining CPUID registers as RAZ)
10/27 Checking commit f2cfb74b0916 (linux-user/elfload: enable HWCAP_CPUID for AArch64)
11/27 Checking commit 3e133e44a1b8 (arm: Allow system registers for KVM guests to be changed by QEMU code)
12/27 Checking commit dafa19baa45b (MAINTAINERS: Remove Peter Crosthwaite from various entries)
13/27 Checking commit f5b0afe7e5f6 (hw/intc/armv7m_nvic: Allow byte accesses to SHPR1)
14/27 Checking commit 17db94065e2f (hw/arm/armsse: Fix miswiring of expansion IRQs)
15/27 Checking commit 26a48e84cf68 (target/arm: Rely on optimization within tcg_gen_gvec_or)
16/27 Checking commit 7e76c6e5113a (target/arm: Use vector minmax expanders for aarch64)
17/27 Checking commit 00d818ea1d8a (target/arm: Use vector minmax expanders for aarch32)
18/27 Checking commit aa0575d473a8 (target/arm: Use tcg integer min/max primitives for neon)
19/27 Checking commit 70ae1e5a51e0 (target/arm: Remove neon min/max helpers)
20/27 Checking commit a6ac25752edc (target/arm: Fix vfp_gdb_get/set_reg vs FPSCR)
ERROR: trailing statements should be on next line
#25: FILE: target/arm/helper.c:84:
+ case 1: stl_p(buf, vfp_get_fpscr(env)); return 4;
ERROR: trailing statements should be on next line
#34: FILE: target/arm/helper.c:110:
+ case 1: vfp_set_fpscr(env, ldl_p(buf)); return 4;
total: 2 errors, 0 warnings, 16 lines checked
Patch 20/27 has style problems, please review. If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
21/27 Checking commit 753b33ef6a9f (target/arm: Fix arm_cpu_dump_state vs FPSCR)
22/27 Checking commit 61090e681cb1 (target/arm: Split out flags setting from vfp compares)
23/27 Checking commit 8187800f5f67 (target/arm: Fix set of bits kept in xregs[ARM_VFP_FPSCR])
24/27 Checking commit beb3acb4a272 (target/arm: Split out FPSCR.QC to a vector field)
25/27 Checking commit fe47ae1ac0ef (target/arm: Use vector operations for saturation)
ERROR: spaces required around that '*' (ctx:WxV)
#360: FILE: target/arm/vec_helper.c:774:
+ TYPEN *d = vd, *n = vn; TYPEM *m = vm; \
^
total: 1 errors, 0 warnings, 438 lines checked
Patch 25/27 has style problems, please review. If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
26/27 Checking commit facc45d0266a (target/arm: Add missing clear_tail calls)
27/27 Checking commit 1fcacb90300d (gdbstub: Send a reply to the vKill packet.)
=== OUTPUT END ===
Test command exited with code: 1
The full log is available at
http://patchew.org/logs/20190214190603.25030-1-peter.maydell@linaro.org/testing.checkpatch/?type=message.
---
Email generated automatically by Patchew [http://patchew.org/].
Please send your feedback to patchew-devel@redhat.com
Patchew URL: https://patchew.org/QEMU/20190214190603.25030-1-peter.maydell@linaro.org/
Hi,
This series seems to have some coding style problems. See output below for
more information:
Message-id: 20190214190603.25030-1-peter.maydell@linaro.org
Subject: [Qemu-devel] [PULL 00/27] target-arm queue
Type: series
=== TEST SCRIPT BEGIN ===
#!/bin/bash
git config --local diff.renamelimit 0
git config --local diff.renames True
git config --local diff.algorithm histogram
./scripts/checkpatch.pl --mailback base..
=== TEST SCRIPT END ===
Updating 3c8cf5a9c21ff8782164d1def7f44bd888713384
From https://github.com/patchew-project/qemu
t [tag update] patchew/20190214190603.25030-1-peter.maydell@linaro.org -> patchew/20190214190603.25030-1-peter.maydell@linaro.org
Switched to a new branch 'test'
3fb84accb1 gdbstub: Send a reply to the vKill packet.
1b05bfa0b0 target/arm: Add missing clear_tail calls
330663235d target/arm: Use vector operations for saturation
585d8235c3 target/arm: Split out FPSCR.QC to a vector field
0a651b397b target/arm: Fix set of bits kept in xregs[ARM_VFP_FPSCR]
f1e2193373 target/arm: Split out flags setting from vfp compares
cc71f739ff target/arm: Fix arm_cpu_dump_state vs FPSCR
e5abdca842 target/arm: Fix vfp_gdb_get/set_reg vs FPSCR
71ab631c39 target/arm: Remove neon min/max helpers
d64f04762c target/arm: Use tcg integer min/max primitives for neon
565ffb8175 target/arm: Use vector minmax expanders for aarch32
f07a3327ae target/arm: Use vector minmax expanders for aarch64
8566cb485c target/arm: Rely on optimization within tcg_gen_gvec_or
a5516fece4 hw/arm/armsse: Fix miswiring of expansion IRQs
e7ac553c27 hw/intc/armv7m_nvic: Allow byte accesses to SHPR1
bcc7967dcb MAINTAINERS: Remove Peter Crosthwaite from various entries
f88d98d250 arm: Allow system registers for KVM guests to be changed by QEMU code
351c302ef0 linux-user/elfload: enable HWCAP_CPUID for AArch64
5927860dc7 target/arm: expose remaining CPUID registers as RAZ
1629af984d target/arm: expose MPIDR_EL1 to userspace
b9d5d582d0 target/arm: expose CPUID registers to userspace
44e3fc28e6 target/arm: relax permission checks for HWCAP_CPUID registers
705c2b3ae7 target/arm: Restructure disas_fp_int_conv
d249dc5f66 target/arm: Force result size into dp after operation
b7be3ad156 target/arm: Fix int128_make128 lo, hi order in paired_cmpxchg64_be
7f06ec4f82 target/arm: Implement HACR_EL2
8f1fa8a2d4 target/arm: Fix CRn to be 14 for PMEVTYPER/PMEVCNTR
=== OUTPUT BEGIN ===
1/27 Checking commit 8f1fa8a2d44d (target/arm: Fix CRn to be 14 for PMEVTYPER/PMEVCNTR)
2/27 Checking commit 7f06ec4f82fc (target/arm: Implement HACR_EL2)
3/27 Checking commit b7be3ad1569d (target/arm: Fix int128_make128 lo, hi order in paired_cmpxchg64_be)
4/27 Checking commit d249dc5f667b (target/arm: Force result size into dp after operation)
5/27 Checking commit 705c2b3ae778 (target/arm: Restructure disas_fp_int_conv)
6/27 Checking commit 44e3fc28e6b9 (target/arm: relax permission checks for HWCAP_CPUID registers)
7/27 Checking commit b9d5d582d0b8 (target/arm: expose CPUID registers to userspace)
8/27 Checking commit 1629af984d31 (target/arm: expose MPIDR_EL1 to userspace)
9/27 Checking commit 5927860dc734 (target/arm: expose remaining CPUID registers as RAZ)
10/27 Checking commit 351c302ef060 (linux-user/elfload: enable HWCAP_CPUID for AArch64)
11/27 Checking commit f88d98d2500b (arm: Allow system registers for KVM guests to be changed by QEMU code)
12/27 Checking commit bcc7967dcbce (MAINTAINERS: Remove Peter Crosthwaite from various entries)
13/27 Checking commit e7ac553c2731 (hw/intc/armv7m_nvic: Allow byte accesses to SHPR1)
14/27 Checking commit a5516fece4af (hw/arm/armsse: Fix miswiring of expansion IRQs)
15/27 Checking commit 8566cb485cc1 (target/arm: Rely on optimization within tcg_gen_gvec_or)
16/27 Checking commit f07a3327aeb2 (target/arm: Use vector minmax expanders for aarch64)
17/27 Checking commit 565ffb817594 (target/arm: Use vector minmax expanders for aarch32)
18/27 Checking commit d64f04762c4e (target/arm: Use tcg integer min/max primitives for neon)
19/27 Checking commit 71ab631c3993 (target/arm: Remove neon min/max helpers)
20/27 Checking commit e5abdca84207 (target/arm: Fix vfp_gdb_get/set_reg vs FPSCR)
ERROR: trailing statements should be on next line
#25: FILE: target/arm/helper.c:84:
+ case 1: stl_p(buf, vfp_get_fpscr(env)); return 4;
ERROR: trailing statements should be on next line
#34: FILE: target/arm/helper.c:110:
+ case 1: vfp_set_fpscr(env, ldl_p(buf)); return 4;
total: 2 errors, 0 warnings, 16 lines checked
Patch 20/27 has style problems, please review. If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
21/27 Checking commit cc71f739fff8 (target/arm: Fix arm_cpu_dump_state vs FPSCR)
22/27 Checking commit f1e2193373cd (target/arm: Split out flags setting from vfp compares)
23/27 Checking commit 0a651b397b27 (target/arm: Fix set of bits kept in xregs[ARM_VFP_FPSCR])
24/27 Checking commit 585d8235c31a (target/arm: Split out FPSCR.QC to a vector field)
25/27 Checking commit 330663235d62 (target/arm: Use vector operations for saturation)
ERROR: spaces required around that '*' (ctx:WxV)
#360: FILE: target/arm/vec_helper.c:774:
+ TYPEN *d = vd, *n = vn; TYPEM *m = vm; \
^
total: 1 errors, 0 warnings, 438 lines checked
Patch 25/27 has style problems, please review. If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
26/27 Checking commit 1b05bfa0b021 (target/arm: Add missing clear_tail calls)
27/27 Checking commit 3fb84accb10d (gdbstub: Send a reply to the vKill packet.)
=== OUTPUT END ===
Test command exited with code: 1
The full log is available at
http://patchew.org/logs/20190214190603.25030-1-peter.maydell@linaro.org/testing.checkpatch/?type=message.
---
Email generated automatically by Patchew [http://patchew.org/].
Please send your feedback to patchew-devel@redhat.com
Patchew URL: https://patchew.org/QEMU/20190214190603.25030-1-peter.maydell@linaro.org/
Hi,
This series seems to have some coding style problems. See output below for
more information:
Subject: [Qemu-devel] [PULL 00/27] target-arm queue
Message-id: 20190214190603.25030-1-peter.maydell@linaro.org
Type: series
=== TEST SCRIPT BEGIN ===
#!/bin/bash
git config --local diff.renamelimit 0
git config --local diff.renames True
git config --local diff.algorithm histogram
./scripts/checkpatch.pl --mailback base..
=== TEST SCRIPT END ===
Updating 3c8cf5a9c21ff8782164d1def7f44bd888713384
From https://github.com/patchew-project/qemu
0d3e41d..0266c73 master -> master
- [tag update] patchew/20190214051440.59167-1-aik@ozlabs.ru -> patchew/20190214051440.59167-1-aik@ozlabs.ru
- [tag update] patchew/20190214154053.15050-1-marcel.apfelbaum@gmail.com -> patchew/20190214154053.15050-1-marcel.apfelbaum@gmail.com
* [new tag] patchew/20190214190603.25030-1-peter.maydell@linaro.org -> patchew/20190214190603.25030-1-peter.maydell@linaro.org
* [new tag] patchew/20190214201939.494-1-philmd@redhat.com -> patchew/20190214201939.494-1-philmd@redhat.com
* [new tag] patchew/20190214220453.15858-1-svens@stackframe.org -> patchew/20190214220453.15858-1-svens@stackframe.org
Submodule 'capstone' (https://git.qemu.org/git/capstone.git) registered for path 'capstone'
Submodule 'dtc' (https://git.qemu.org/git/dtc.git) registered for path 'dtc'
Submodule 'roms/QemuMacDrivers' (https://git.qemu.org/git/QemuMacDrivers.git) registered for path 'roms/QemuMacDrivers'
Submodule 'roms/SLOF' (https://git.qemu.org/git/SLOF.git) registered for path 'roms/SLOF'
Submodule 'roms/ipxe' (https://git.qemu.org/git/ipxe.git) registered for path 'roms/ipxe'
Submodule 'roms/openbios' (https://git.qemu.org/git/openbios.git) registered for path 'roms/openbios'
Submodule 'roms/openhackware' (https://git.qemu.org/git/openhackware.git) registered for path 'roms/openhackware'
Submodule 'roms/qemu-palcode' (https://git.qemu.org/git/qemu-palcode.git) registered for path 'roms/qemu-palcode'
Submodule 'roms/seabios' (https://git.qemu.org/git/seabios.git/) registered for path 'roms/seabios'
Submodule 'roms/seabios-hppa' (https://github.com/hdeller/seabios-hppa.git) registered for path 'roms/seabios-hppa'
Submodule 'roms/sgabios' (https://git.qemu.org/git/sgabios.git) registered for path 'roms/sgabios'
Submodule 'roms/skiboot' (https://git.qemu.org/git/skiboot.git) registered for path 'roms/skiboot'
Submodule 'roms/u-boot' (https://git.qemu.org/git/u-boot.git) registered for path 'roms/u-boot'
Submodule 'roms/u-boot-sam460ex' (https://git.qemu.org/git/u-boot-sam460ex.git) registered for path 'roms/u-boot-sam460ex'
Submodule 'tests/fp/berkeley-softfloat-3' (https://github.com/cota/berkeley-softfloat-3) registered for path 'tests/fp/berkeley-softfloat-3'
Submodule 'tests/fp/berkeley-testfloat-3' (https://github.com/cota/berkeley-testfloat-3) registered for path 'tests/fp/berkeley-testfloat-3'
Submodule 'ui/keycodemapdb' (https://git.qemu.org/git/keycodemapdb.git) registered for path 'ui/keycodemapdb'
Cloning into 'capstone'...
Submodule path 'capstone': checked out '22ead3e0bfdb87516656453336160e0a37b066bf'
Cloning into 'dtc'...
Submodule path 'dtc': checked out '88f18909db731a627456f26d779445f84e449536'
Cloning into 'roms/QemuMacDrivers'...
Submodule path 'roms/QemuMacDrivers': checked out '90c488d5f4a407342247b9ea869df1c2d9c8e266'
Cloning into 'roms/SLOF'...
Submodule path 'roms/SLOF': checked out 'a5b428e1c1eae703bdd62a3f527223c291ee3fdc'
Cloning into 'roms/ipxe'...
Submodule path 'roms/ipxe': checked out 'de4565cbe76ea9f7913a01f331be3ee901bb6e17'
Cloning into 'roms/openbios'...
Submodule path 'roms/openbios': checked out '441a84d3a642a10b948369c63f32367e8ff6395b'
Cloning into 'roms/openhackware'...
Submodule path 'roms/openhackware': checked out 'c559da7c8eec5e45ef1f67978827af6f0b9546f5'
Cloning into 'roms/qemu-palcode'...
Submodule path 'roms/qemu-palcode': checked out '51c237d7e20d05100eacadee2f61abc17e6bc097'
Cloning into 'roms/seabios'...
Submodule path 'roms/seabios': checked out 'a698c8995ffb2838296ec284fe3c4ad33dfca307'
Cloning into 'roms/seabios-hppa'...
Submodule path 'roms/seabios-hppa': checked out '1ef99a01572c2581c30e16e6fe69e9ea2ef92ce0'
Cloning into 'roms/sgabios'...
Submodule path 'roms/sgabios': checked out 'cbaee52287e5f32373181cff50a00b6c4ac9015a'
Cloning into 'roms/skiboot'...
Submodule path 'roms/skiboot': checked out 'e0ee24c27a172bcf482f6f2bc905e6211c134bcc'
Cloning into 'roms/u-boot'...
Submodule path 'roms/u-boot': checked out 'd85ca029f257b53a96da6c2fb421e78a003a9943'
Cloning into 'roms/u-boot-sam460ex'...
Submodule path 'roms/u-boot-sam460ex': checked out '60b3916f33e617a815973c5a6df77055b2e3a588'
Cloning into 'tests/fp/berkeley-softfloat-3'...
Submodule path 'tests/fp/berkeley-softfloat-3': checked out 'b64af41c3276f97f0e181920400ee056b9c88037'
Cloning into 'tests/fp/berkeley-testfloat-3'...
Submodule path 'tests/fp/berkeley-testfloat-3': checked out '5a59dcec19327396a011a17fd924aed4fec416b3'
Cloning into 'ui/keycodemapdb'...
Submodule path 'ui/keycodemapdb': checked out '6b3d716e2b6472eb7189d3220552280ef3d832ce'
Switched to a new branch 'test'
3fb84ac gdbstub: Send a reply to the vKill packet.
1b05bfa target/arm: Add missing clear_tail calls
3306632 target/arm: Use vector operations for saturation
585d823 target/arm: Split out FPSCR.QC to a vector field
0a651b3 target/arm: Fix set of bits kept in xregs[ARM_VFP_FPSCR]
f1e2193 target/arm: Split out flags setting from vfp compares
cc71f73 target/arm: Fix arm_cpu_dump_state vs FPSCR
e5abdca target/arm: Fix vfp_gdb_get/set_reg vs FPSCR
71ab631 target/arm: Remove neon min/max helpers
d64f047 target/arm: Use tcg integer min/max primitives for neon
565ffb8 target/arm: Use vector minmax expanders for aarch32
f07a332 target/arm: Use vector minmax expanders for aarch64
8566cb4 target/arm: Rely on optimization within tcg_gen_gvec_or
a5516fe hw/arm/armsse: Fix miswiring of expansion IRQs
e7ac553 hw/intc/armv7m_nvic: Allow byte accesses to SHPR1
bcc7967 MAINTAINERS: Remove Peter Crosthwaite from various entries
f88d98d arm: Allow system registers for KVM guests to be changed by QEMU code
351c302 linux-user/elfload: enable HWCAP_CPUID for AArch64
5927860 target/arm: expose remaining CPUID registers as RAZ
1629af9 target/arm: expose MPIDR_EL1 to userspace
b9d5d58 target/arm: expose CPUID registers to userspace
44e3fc2 target/arm: relax permission checks for HWCAP_CPUID registers
705c2b3 target/arm: Restructure disas_fp_int_conv
d249dc5 target/arm: Force result size into dp after operation
b7be3ad target/arm: Fix int128_make128 lo, hi order in paired_cmpxchg64_be
7f06ec4f target/arm: Implement HACR_EL2
8f1fa8a target/arm: Fix CRn to be 14 for PMEVTYPER/PMEVCNTR
=== OUTPUT BEGIN ===
1/27 Checking commit 8f1fa8a2d44d (target/arm: Fix CRn to be 14 for PMEVTYPER/PMEVCNTR)
2/27 Checking commit 7f06ec4f82fc (target/arm: Implement HACR_EL2)
3/27 Checking commit b7be3ad1569d (target/arm: Fix int128_make128 lo, hi order in paired_cmpxchg64_be)
4/27 Checking commit d249dc5f667b (target/arm: Force result size into dp after operation)
5/27 Checking commit 705c2b3ae778 (target/arm: Restructure disas_fp_int_conv)
6/27 Checking commit 44e3fc28e6b9 (target/arm: relax permission checks for HWCAP_CPUID registers)
7/27 Checking commit b9d5d582d0b8 (target/arm: expose CPUID registers to userspace)
8/27 Checking commit 1629af984d31 (target/arm: expose MPIDR_EL1 to userspace)
9/27 Checking commit 5927860dc734 (target/arm: expose remaining CPUID registers as RAZ)
10/27 Checking commit 351c302ef060 (linux-user/elfload: enable HWCAP_CPUID for AArch64)
11/27 Checking commit f88d98d2500b (arm: Allow system registers for KVM guests to be changed by QEMU code)
12/27 Checking commit bcc7967dcbce (MAINTAINERS: Remove Peter Crosthwaite from various entries)
13/27 Checking commit e7ac553c2731 (hw/intc/armv7m_nvic: Allow byte accesses to SHPR1)
14/27 Checking commit a5516fece4af (hw/arm/armsse: Fix miswiring of expansion IRQs)
15/27 Checking commit 8566cb485cc1 (target/arm: Rely on optimization within tcg_gen_gvec_or)
16/27 Checking commit f07a3327aeb2 (target/arm: Use vector minmax expanders for aarch64)
17/27 Checking commit 565ffb817594 (target/arm: Use vector minmax expanders for aarch32)
18/27 Checking commit d64f04762c4e (target/arm: Use tcg integer min/max primitives for neon)
19/27 Checking commit 71ab631c3993 (target/arm: Remove neon min/max helpers)
20/27 Checking commit e5abdca84207 (target/arm: Fix vfp_gdb_get/set_reg vs FPSCR)
ERROR: trailing statements should be on next line
#25: FILE: target/arm/helper.c:84:
+ case 1: stl_p(buf, vfp_get_fpscr(env)); return 4;
ERROR: trailing statements should be on next line
#34: FILE: target/arm/helper.c:110:
+ case 1: vfp_set_fpscr(env, ldl_p(buf)); return 4;
total: 2 errors, 0 warnings, 16 lines checked
Patch 20/27 has style problems, please review. If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
21/27 Checking commit cc71f739fff8 (target/arm: Fix arm_cpu_dump_state vs FPSCR)
22/27 Checking commit f1e2193373cd (target/arm: Split out flags setting from vfp compares)
23/27 Checking commit 0a651b397b27 (target/arm: Fix set of bits kept in xregs[ARM_VFP_FPSCR])
24/27 Checking commit 585d8235c31a (target/arm: Split out FPSCR.QC to a vector field)
25/27 Checking commit 330663235d62 (target/arm: Use vector operations for saturation)
ERROR: spaces required around that '*' (ctx:WxV)
#360: FILE: target/arm/vec_helper.c:774:
+ TYPEN *d = vd, *n = vn; TYPEM *m = vm; \
^
total: 1 errors, 0 warnings, 438 lines checked
Patch 25/27 has style problems, please review. If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
26/27 Checking commit 1b05bfa0b021 (target/arm: Add missing clear_tail calls)
27/27 Checking commit 3fb84accb10d (gdbstub: Send a reply to the vKill packet.)
=== OUTPUT END ===
Test command exited with code: 1
The full log is available at
http://patchew.org/logs/20190214190603.25030-1-peter.maydell@linaro.org/testing.checkpatch/?type=message.
---
Email generated automatically by Patchew [http://patchew.org/].
Please send your feedback to patchew-devel@redhat.com
Patchew URL: https://patchew.org/QEMU/20190214190603.25030-1-peter.maydell@linaro.org/
Hi,
This series seems to have some coding style problems. See output below for
more information:
Message-id: 20190214190603.25030-1-peter.maydell@linaro.org
Subject: [Qemu-devel] [PULL 00/27] target-arm queue
Type: series
=== TEST SCRIPT BEGIN ===
#!/bin/bash
git config --local diff.renamelimit 0
git config --local diff.renames True
git config --local diff.algorithm histogram
./scripts/checkpatch.pl --mailback base..
=== TEST SCRIPT END ===
Updating 3c8cf5a9c21ff8782164d1def7f44bd888713384
From https://github.com/patchew-project/qemu
t [tag update] patchew/20190214190603.25030-1-peter.maydell@linaro.org -> patchew/20190214190603.25030-1-peter.maydell@linaro.org
Switched to a new branch 'test'
f74396d116 gdbstub: Send a reply to the vKill packet.
52c1857391 target/arm: Add missing clear_tail calls
2f1aef96ec target/arm: Use vector operations for saturation
80683e5bc1 target/arm: Split out FPSCR.QC to a vector field
5d1d26f9eb target/arm: Fix set of bits kept in xregs[ARM_VFP_FPSCR]
06fe48799d target/arm: Split out flags setting from vfp compares
d0ce62513e target/arm: Fix arm_cpu_dump_state vs FPSCR
f382917105 target/arm: Fix vfp_gdb_get/set_reg vs FPSCR
21c80ed9cd target/arm: Remove neon min/max helpers
822434eb26 target/arm: Use tcg integer min/max primitives for neon
ec47e8c916 target/arm: Use vector minmax expanders for aarch32
8e1c96f683 target/arm: Use vector minmax expanders for aarch64
5ce1275e65 target/arm: Rely on optimization within tcg_gen_gvec_or
7cf21d5648 hw/arm/armsse: Fix miswiring of expansion IRQs
fc4f4fbe1c hw/intc/armv7m_nvic: Allow byte accesses to SHPR1
df4e1ca71d MAINTAINERS: Remove Peter Crosthwaite from various entries
0818f544d6 arm: Allow system registers for KVM guests to be changed by QEMU code
29ae44a595 linux-user/elfload: enable HWCAP_CPUID for AArch64
f5eb2f7c57 target/arm: expose remaining CPUID registers as RAZ
ac0a14313e target/arm: expose MPIDR_EL1 to userspace
0263d9ab2d target/arm: expose CPUID registers to userspace
9b69c06e28 target/arm: relax permission checks for HWCAP_CPUID registers
d61628698a target/arm: Restructure disas_fp_int_conv
385be0d097 target/arm: Force result size into dp after operation
1cc6b8631d target/arm: Fix int128_make128 lo, hi order in paired_cmpxchg64_be
2d2b73dc4d target/arm: Implement HACR_EL2
86f75ddfdd target/arm: Fix CRn to be 14 for PMEVTYPER/PMEVCNTR
=== OUTPUT BEGIN ===
1/27 Checking commit 86f75ddfddfc (target/arm: Fix CRn to be 14 for PMEVTYPER/PMEVCNTR)
2/27 Checking commit 2d2b73dc4d6c (target/arm: Implement HACR_EL2)
3/27 Checking commit 1cc6b8631d42 (target/arm: Fix int128_make128 lo, hi order in paired_cmpxchg64_be)
4/27 Checking commit 385be0d0977a (target/arm: Force result size into dp after operation)
5/27 Checking commit d61628698a25 (target/arm: Restructure disas_fp_int_conv)
6/27 Checking commit 9b69c06e28d4 (target/arm: relax permission checks for HWCAP_CPUID registers)
7/27 Checking commit 0263d9ab2de9 (target/arm: expose CPUID registers to userspace)
8/27 Checking commit ac0a14313eb2 (target/arm: expose MPIDR_EL1 to userspace)
9/27 Checking commit f5eb2f7c5740 (target/arm: expose remaining CPUID registers as RAZ)
10/27 Checking commit 29ae44a5951b (linux-user/elfload: enable HWCAP_CPUID for AArch64)
11/27 Checking commit 0818f544d6cd (arm: Allow system registers for KVM guests to be changed by QEMU code)
12/27 Checking commit df4e1ca71de6 (MAINTAINERS: Remove Peter Crosthwaite from various entries)
13/27 Checking commit fc4f4fbe1c98 (hw/intc/armv7m_nvic: Allow byte accesses to SHPR1)
14/27 Checking commit 7cf21d564829 (hw/arm/armsse: Fix miswiring of expansion IRQs)
15/27 Checking commit 5ce1275e65ee (target/arm: Rely on optimization within tcg_gen_gvec_or)
16/27 Checking commit 8e1c96f68344 (target/arm: Use vector minmax expanders for aarch64)
17/27 Checking commit ec47e8c9169b (target/arm: Use vector minmax expanders for aarch32)
18/27 Checking commit 822434eb2677 (target/arm: Use tcg integer min/max primitives for neon)
19/27 Checking commit 21c80ed9cd6e (target/arm: Remove neon min/max helpers)
20/27 Checking commit f38291710529 (target/arm: Fix vfp_gdb_get/set_reg vs FPSCR)
ERROR: trailing statements should be on next line
#25: FILE: target/arm/helper.c:84:
+ case 1: stl_p(buf, vfp_get_fpscr(env)); return 4;
ERROR: trailing statements should be on next line
#34: FILE: target/arm/helper.c:110:
+ case 1: vfp_set_fpscr(env, ldl_p(buf)); return 4;
total: 2 errors, 0 warnings, 16 lines checked
Patch 20/27 has style problems, please review. If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
21/27 Checking commit d0ce62513eae (target/arm: Fix arm_cpu_dump_state vs FPSCR)
22/27 Checking commit 06fe48799dc0 (target/arm: Split out flags setting from vfp compares)
23/27 Checking commit 5d1d26f9eba9 (target/arm: Fix set of bits kept in xregs[ARM_VFP_FPSCR])
24/27 Checking commit 80683e5bc15a (target/arm: Split out FPSCR.QC to a vector field)
25/27 Checking commit 2f1aef96ec10 (target/arm: Use vector operations for saturation)
ERROR: spaces required around that '*' (ctx:WxV)
#360: FILE: target/arm/vec_helper.c:774:
+ TYPEN *d = vd, *n = vn; TYPEM *m = vm; \
^
total: 1 errors, 0 warnings, 438 lines checked
Patch 25/27 has style problems, please review. If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
26/27 Checking commit 52c1857391d8 (target/arm: Add missing clear_tail calls)
27/27 Checking commit f74396d1168a (gdbstub: Send a reply to the vKill packet.)
=== OUTPUT END ===
Test command exited with code: 1
The full log is available at
http://patchew.org/logs/20190214190603.25030-1-peter.maydell@linaro.org/testing.checkpatch/?type=message.
---
Email generated automatically by Patchew [http://patchew.org/].
Please send your feedback to patchew-devel@redhat.com
Patchew URL: https://patchew.org/QEMU/20190214190603.25030-1-peter.maydell@linaro.org/
Hi,
This series seems to have some coding style problems. See output below for
more information:
Subject: [Qemu-devel] [PULL 00/27] target-arm queue
Message-id: 20190214190603.25030-1-peter.maydell@linaro.org
Type: series
=== TEST SCRIPT BEGIN ===
#!/bin/bash
git config --local diff.renamelimit 0
git config --local diff.renames True
git config --local diff.algorithm histogram
./scripts/checkpatch.pl --mailback base..
=== TEST SCRIPT END ===
Updating 3c8cf5a9c21ff8782164d1def7f44bd888713384
From https://github.com/patchew-project/qemu
- [tag update] patchew/20190214190603.25030-1-peter.maydell@linaro.org -> patchew/20190214190603.25030-1-peter.maydell@linaro.org
Submodule 'capstone' (https://git.qemu.org/git/capstone.git) registered for path 'capstone'
Submodule 'dtc' (https://git.qemu.org/git/dtc.git) registered for path 'dtc'
Submodule 'roms/QemuMacDrivers' (https://git.qemu.org/git/QemuMacDrivers.git) registered for path 'roms/QemuMacDrivers'
Submodule 'roms/SLOF' (https://git.qemu.org/git/SLOF.git) registered for path 'roms/SLOF'
Submodule 'roms/ipxe' (https://git.qemu.org/git/ipxe.git) registered for path 'roms/ipxe'
Submodule 'roms/openbios' (https://git.qemu.org/git/openbios.git) registered for path 'roms/openbios'
Submodule 'roms/openhackware' (https://git.qemu.org/git/openhackware.git) registered for path 'roms/openhackware'
Submodule 'roms/qemu-palcode' (https://git.qemu.org/git/qemu-palcode.git) registered for path 'roms/qemu-palcode'
Submodule 'roms/seabios' (https://git.qemu.org/git/seabios.git/) registered for path 'roms/seabios'
Submodule 'roms/seabios-hppa' (https://github.com/hdeller/seabios-hppa.git) registered for path 'roms/seabios-hppa'
Submodule 'roms/sgabios' (https://git.qemu.org/git/sgabios.git) registered for path 'roms/sgabios'
Submodule 'roms/skiboot' (https://git.qemu.org/git/skiboot.git) registered for path 'roms/skiboot'
Submodule 'roms/u-boot' (https://git.qemu.org/git/u-boot.git) registered for path 'roms/u-boot'
Submodule 'roms/u-boot-sam460ex' (https://git.qemu.org/git/u-boot-sam460ex.git) registered for path 'roms/u-boot-sam460ex'
Submodule 'tests/fp/berkeley-softfloat-3' (https://github.com/cota/berkeley-softfloat-3) registered for path 'tests/fp/berkeley-softfloat-3'
Submodule 'tests/fp/berkeley-testfloat-3' (https://github.com/cota/berkeley-testfloat-3) registered for path 'tests/fp/berkeley-testfloat-3'
Submodule 'ui/keycodemapdb' (https://git.qemu.org/git/keycodemapdb.git) registered for path 'ui/keycodemapdb'
Cloning into 'capstone'...
Submodule path 'capstone': checked out '22ead3e0bfdb87516656453336160e0a37b066bf'
Cloning into 'dtc'...
Submodule path 'dtc': checked out '88f18909db731a627456f26d779445f84e449536'
Cloning into 'roms/QemuMacDrivers'...
Submodule path 'roms/QemuMacDrivers': checked out '90c488d5f4a407342247b9ea869df1c2d9c8e266'
Cloning into 'roms/SLOF'...
Submodule path 'roms/SLOF': checked out 'a5b428e1c1eae703bdd62a3f527223c291ee3fdc'
Cloning into 'roms/ipxe'...
Submodule path 'roms/ipxe': checked out 'de4565cbe76ea9f7913a01f331be3ee901bb6e17'
Cloning into 'roms/openbios'...
Submodule path 'roms/openbios': checked out '441a84d3a642a10b948369c63f32367e8ff6395b'
Cloning into 'roms/openhackware'...
Submodule path 'roms/openhackware': checked out 'c559da7c8eec5e45ef1f67978827af6f0b9546f5'
Cloning into 'roms/qemu-palcode'...
Submodule path 'roms/qemu-palcode': checked out '51c237d7e20d05100eacadee2f61abc17e6bc097'
Cloning into 'roms/seabios'...
Submodule path 'roms/seabios': checked out 'a698c8995ffb2838296ec284fe3c4ad33dfca307'
Cloning into 'roms/seabios-hppa'...
Submodule path 'roms/seabios-hppa': checked out '1ef99a01572c2581c30e16e6fe69e9ea2ef92ce0'
Cloning into 'roms/sgabios'...
Submodule path 'roms/sgabios': checked out 'cbaee52287e5f32373181cff50a00b6c4ac9015a'
Cloning into 'roms/skiboot'...
Submodule path 'roms/skiboot': checked out 'e0ee24c27a172bcf482f6f2bc905e6211c134bcc'
Cloning into 'roms/u-boot'...
Submodule path 'roms/u-boot': checked out 'd85ca029f257b53a96da6c2fb421e78a003a9943'
Cloning into 'roms/u-boot-sam460ex'...
Submodule path 'roms/u-boot-sam460ex': checked out '60b3916f33e617a815973c5a6df77055b2e3a588'
Cloning into 'tests/fp/berkeley-softfloat-3'...
Submodule path 'tests/fp/berkeley-softfloat-3': checked out 'b64af41c3276f97f0e181920400ee056b9c88037'
Cloning into 'tests/fp/berkeley-testfloat-3'...
Submodule path 'tests/fp/berkeley-testfloat-3': checked out '5a59dcec19327396a011a17fd924aed4fec416b3'
Cloning into 'ui/keycodemapdb'...
Submodule path 'ui/keycodemapdb': checked out '6b3d716e2b6472eb7189d3220552280ef3d832ce'
Switched to a new branch 'test'
f74396d gdbstub: Send a reply to the vKill packet.
52c1857 target/arm: Add missing clear_tail calls
2f1aef9 target/arm: Use vector operations for saturation
80683e5 target/arm: Split out FPSCR.QC to a vector field
5d1d26f target/arm: Fix set of bits kept in xregs[ARM_VFP_FPSCR]
06fe487 target/arm: Split out flags setting from vfp compares
d0ce625 target/arm: Fix arm_cpu_dump_state vs FPSCR
f382917 target/arm: Fix vfp_gdb_get/set_reg vs FPSCR
21c80ed target/arm: Remove neon min/max helpers
822434e target/arm: Use tcg integer min/max primitives for neon
ec47e8c target/arm: Use vector minmax expanders for aarch32
8e1c96f target/arm: Use vector minmax expanders for aarch64
5ce1275 target/arm: Rely on optimization within tcg_gen_gvec_or
7cf21d5 hw/arm/armsse: Fix miswiring of expansion IRQs
fc4f4fb hw/intc/armv7m_nvic: Allow byte accesses to SHPR1
df4e1ca MAINTAINERS: Remove Peter Crosthwaite from various entries
0818f54 arm: Allow system registers for KVM guests to be changed by QEMU code
29ae44a linux-user/elfload: enable HWCAP_CPUID for AArch64
f5eb2f7 target/arm: expose remaining CPUID registers as RAZ
ac0a143 target/arm: expose MPIDR_EL1 to userspace
0263d9a target/arm: expose CPUID registers to userspace
9b69c06 target/arm: relax permission checks for HWCAP_CPUID registers
d616286 target/arm: Restructure disas_fp_int_conv
385be0d target/arm: Force result size into dp after operation
1cc6b86 target/arm: Fix int128_make128 lo, hi order in paired_cmpxchg64_be
2d2b73d target/arm: Implement HACR_EL2
86f75dd target/arm: Fix CRn to be 14 for PMEVTYPER/PMEVCNTR
=== OUTPUT BEGIN ===
1/27 Checking commit 86f75ddfddfc (target/arm: Fix CRn to be 14 for PMEVTYPER/PMEVCNTR)
2/27 Checking commit 2d2b73dc4d6c (target/arm: Implement HACR_EL2)
3/27 Checking commit 1cc6b8631d42 (target/arm: Fix int128_make128 lo, hi order in paired_cmpxchg64_be)
4/27 Checking commit 385be0d0977a (target/arm: Force result size into dp after operation)
5/27 Checking commit d61628698a25 (target/arm: Restructure disas_fp_int_conv)
6/27 Checking commit 9b69c06e28d4 (target/arm: relax permission checks for HWCAP_CPUID registers)
7/27 Checking commit 0263d9ab2de9 (target/arm: expose CPUID registers to userspace)
8/27 Checking commit ac0a14313eb2 (target/arm: expose MPIDR_EL1 to userspace)
9/27 Checking commit f5eb2f7c5740 (target/arm: expose remaining CPUID registers as RAZ)
10/27 Checking commit 29ae44a5951b (linux-user/elfload: enable HWCAP_CPUID for AArch64)
11/27 Checking commit 0818f544d6cd (arm: Allow system registers for KVM guests to be changed by QEMU code)
12/27 Checking commit df4e1ca71de6 (MAINTAINERS: Remove Peter Crosthwaite from various entries)
13/27 Checking commit fc4f4fbe1c98 (hw/intc/armv7m_nvic: Allow byte accesses to SHPR1)
14/27 Checking commit 7cf21d564829 (hw/arm/armsse: Fix miswiring of expansion IRQs)
15/27 Checking commit 5ce1275e65ee (target/arm: Rely on optimization within tcg_gen_gvec_or)
16/27 Checking commit 8e1c96f68344 (target/arm: Use vector minmax expanders for aarch64)
17/27 Checking commit ec47e8c9169b (target/arm: Use vector minmax expanders for aarch32)
18/27 Checking commit 822434eb2677 (target/arm: Use tcg integer min/max primitives for neon)
19/27 Checking commit 21c80ed9cd6e (target/arm: Remove neon min/max helpers)
20/27 Checking commit f38291710529 (target/arm: Fix vfp_gdb_get/set_reg vs FPSCR)
ERROR: trailing statements should be on next line
#25: FILE: target/arm/helper.c:84:
+ case 1: stl_p(buf, vfp_get_fpscr(env)); return 4;
ERROR: trailing statements should be on next line
#34: FILE: target/arm/helper.c:110:
+ case 1: vfp_set_fpscr(env, ldl_p(buf)); return 4;
total: 2 errors, 0 warnings, 16 lines checked
Patch 20/27 has style problems, please review. If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
21/27 Checking commit d0ce62513eae (target/arm: Fix arm_cpu_dump_state vs FPSCR)
22/27 Checking commit 06fe48799dc0 (target/arm: Split out flags setting from vfp compares)
23/27 Checking commit 5d1d26f9eba9 (target/arm: Fix set of bits kept in xregs[ARM_VFP_FPSCR])
24/27 Checking commit 80683e5bc15a (target/arm: Split out FPSCR.QC to a vector field)
25/27 Checking commit 2f1aef96ec10 (target/arm: Use vector operations for saturation)
ERROR: spaces required around that '*' (ctx:WxV)
#360: FILE: target/arm/vec_helper.c:774:
+ TYPEN *d = vd, *n = vn; TYPEM *m = vm; \
^
total: 1 errors, 0 warnings, 438 lines checked
Patch 25/27 has style problems, please review. If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
26/27 Checking commit 52c1857391d8 (target/arm: Add missing clear_tail calls)
27/27 Checking commit f74396d1168a (gdbstub: Send a reply to the vKill packet.)
=== OUTPUT END ===
Test command exited with code: 1
The full log is available at
http://patchew.org/logs/20190214190603.25030-1-peter.maydell@linaro.org/testing.checkpatch/?type=message.
---
Email generated automatically by Patchew [http://patchew.org/].
Please send your feedback to patchew-devel@redhat.com
Patchew URL: https://patchew.org/QEMU/20190214190603.25030-1-peter.maydell@linaro.org/
Hi,
This series seems to have some coding style problems. See output below for
more information:
Message-id: 20190214190603.25030-1-peter.maydell@linaro.org
Subject: [Qemu-devel] [PULL 00/27] target-arm queue
Type: series
=== TEST SCRIPT BEGIN ===
#!/bin/bash
git config --local diff.renamelimit 0
git config --local diff.renames True
git config --local diff.algorithm histogram
./scripts/checkpatch.pl --mailback base..
=== TEST SCRIPT END ===
Updating 3c8cf5a9c21ff8782164d1def7f44bd888713384
Switched to a new branch 'test'
b22c3da64b gdbstub: Send a reply to the vKill packet.
db616b3cea target/arm: Add missing clear_tail calls
240db5cc11 target/arm: Use vector operations for saturation
88a9504b9f target/arm: Split out FPSCR.QC to a vector field
e9d315769a target/arm: Fix set of bits kept in xregs[ARM_VFP_FPSCR]
78d9813d1a target/arm: Split out flags setting from vfp compares
7addfd4039 target/arm: Fix arm_cpu_dump_state vs FPSCR
930c986b1b target/arm: Fix vfp_gdb_get/set_reg vs FPSCR
a034668e9b target/arm: Remove neon min/max helpers
bb77972f61 target/arm: Use tcg integer min/max primitives for neon
d4bcca5e91 target/arm: Use vector minmax expanders for aarch32
58c8e77c23 target/arm: Use vector minmax expanders for aarch64
c75e5516d5 target/arm: Rely on optimization within tcg_gen_gvec_or
a3de217232 hw/arm/armsse: Fix miswiring of expansion IRQs
de29583b07 hw/intc/armv7m_nvic: Allow byte accesses to SHPR1
8fb1a5bac0 MAINTAINERS: Remove Peter Crosthwaite from various entries
acc80866a5 arm: Allow system registers for KVM guests to be changed by QEMU code
05e851518b linux-user/elfload: enable HWCAP_CPUID for AArch64
1e0293cc26 target/arm: expose remaining CPUID registers as RAZ
0443bd4878 target/arm: expose MPIDR_EL1 to userspace
ad0122bcbf target/arm: expose CPUID registers to userspace
1cc2635c69 target/arm: relax permission checks for HWCAP_CPUID registers
592467aa65 target/arm: Restructure disas_fp_int_conv
af2989a366 target/arm: Force result size into dp after operation
f26458f2fa target/arm: Fix int128_make128 lo, hi order in paired_cmpxchg64_be
ee1b241af9 target/arm: Implement HACR_EL2
845bd274c6 target/arm: Fix CRn to be 14 for PMEVTYPER/PMEVCNTR
=== OUTPUT BEGIN ===
1/27 Checking commit 845bd274c624 (target/arm: Fix CRn to be 14 for PMEVTYPER/PMEVCNTR)
2/27 Checking commit ee1b241af96d (target/arm: Implement HACR_EL2)
3/27 Checking commit f26458f2fa7e (target/arm: Fix int128_make128 lo, hi order in paired_cmpxchg64_be)
4/27 Checking commit af2989a36697 (target/arm: Force result size into dp after operation)
5/27 Checking commit 592467aa6590 (target/arm: Restructure disas_fp_int_conv)
6/27 Checking commit 1cc2635c6964 (target/arm: relax permission checks for HWCAP_CPUID registers)
7/27 Checking commit ad0122bcbfcd (target/arm: expose CPUID registers to userspace)
8/27 Checking commit 0443bd48780a (target/arm: expose MPIDR_EL1 to userspace)
9/27 Checking commit 1e0293cc26e0 (target/arm: expose remaining CPUID registers as RAZ)
10/27 Checking commit 05e851518be8 (linux-user/elfload: enable HWCAP_CPUID for AArch64)
11/27 Checking commit acc80866a588 (arm: Allow system registers for KVM guests to be changed by QEMU code)
12/27 Checking commit 8fb1a5bac0c0 (MAINTAINERS: Remove Peter Crosthwaite from various entries)
13/27 Checking commit de29583b07df (hw/intc/armv7m_nvic: Allow byte accesses to SHPR1)
14/27 Checking commit a3de21723286 (hw/arm/armsse: Fix miswiring of expansion IRQs)
15/27 Checking commit c75e5516d5de (target/arm: Rely on optimization within tcg_gen_gvec_or)
16/27 Checking commit 58c8e77c23c0 (target/arm: Use vector minmax expanders for aarch64)
17/27 Checking commit d4bcca5e9117 (target/arm: Use vector minmax expanders for aarch32)
18/27 Checking commit bb77972f618b (target/arm: Use tcg integer min/max primitives for neon)
19/27 Checking commit a034668e9b5d (target/arm: Remove neon min/max helpers)
20/27 Checking commit 930c986b1b61 (target/arm: Fix vfp_gdb_get/set_reg vs FPSCR)
ERROR: trailing statements should be on next line
#25: FILE: target/arm/helper.c:84:
+ case 1: stl_p(buf, vfp_get_fpscr(env)); return 4;
ERROR: trailing statements should be on next line
#34: FILE: target/arm/helper.c:110:
+ case 1: vfp_set_fpscr(env, ldl_p(buf)); return 4;
total: 2 errors, 0 warnings, 16 lines checked
Patch 20/27 has style problems, please review. If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
21/27 Checking commit 7addfd403939 (target/arm: Fix arm_cpu_dump_state vs FPSCR)
22/27 Checking commit 78d9813d1a48 (target/arm: Split out flags setting from vfp compares)
23/27 Checking commit e9d315769a5c (target/arm: Fix set of bits kept in xregs[ARM_VFP_FPSCR])
24/27 Checking commit 88a9504b9f85 (target/arm: Split out FPSCR.QC to a vector field)
25/27 Checking commit 240db5cc1112 (target/arm: Use vector operations for saturation)
ERROR: spaces required around that '*' (ctx:WxV)
#360: FILE: target/arm/vec_helper.c:774:
+ TYPEN *d = vd, *n = vn; TYPEM *m = vm; \
^
total: 1 errors, 0 warnings, 438 lines checked
Patch 25/27 has style problems, please review. If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
26/27 Checking commit db616b3ceae7 (target/arm: Add missing clear_tail calls)
27/27 Checking commit b22c3da64b53 (gdbstub: Send a reply to the vKill packet.)
=== OUTPUT END ===
Test command exited with code: 1
The full log is available at
http://patchew.org/logs/20190214190603.25030-1-peter.maydell@linaro.org/testing.checkpatch/?type=message.
---
Email generated automatically by Patchew [http://patchew.org/].
Please send your feedback to patchew-devel@redhat.com
Patchew URL: https://patchew.org/QEMU/20190214190603.25030-1-peter.maydell@linaro.org/
Hi,
This series seems to have some coding style problems. See output below for
more information:
Message-id: 20190214190603.25030-1-peter.maydell@linaro.org
Subject: [Qemu-devel] [PULL 00/27] target-arm queue
Type: series
=== TEST SCRIPT BEGIN ===
#!/bin/bash
git config --local diff.renamelimit 0
git config --local diff.renames True
git config --local diff.algorithm histogram
./scripts/checkpatch.pl --mailback base..
=== TEST SCRIPT END ===
Updating 3c8cf5a9c21ff8782164d1def7f44bd888713384
From https://github.com/patchew-project/qemu
t [tag update] patchew/20190214190603.25030-1-peter.maydell@linaro.org -> patchew/20190214190603.25030-1-peter.maydell@linaro.org
Switched to a new branch 'test'
8fd00e6381 gdbstub: Send a reply to the vKill packet.
34aa54edfa target/arm: Add missing clear_tail calls
3846dbef44 target/arm: Use vector operations for saturation
781e41b075 target/arm: Split out FPSCR.QC to a vector field
95ef6915a6 target/arm: Fix set of bits kept in xregs[ARM_VFP_FPSCR]
d640c730a9 target/arm: Split out flags setting from vfp compares
a5563518a5 target/arm: Fix arm_cpu_dump_state vs FPSCR
6e9dcb58eb target/arm: Fix vfp_gdb_get/set_reg vs FPSCR
bd99640853 target/arm: Remove neon min/max helpers
524621238d target/arm: Use tcg integer min/max primitives for neon
28d1ed93b1 target/arm: Use vector minmax expanders for aarch32
f8354404a2 target/arm: Use vector minmax expanders for aarch64
2fc345aa78 target/arm: Rely on optimization within tcg_gen_gvec_or
5aafc658ed hw/arm/armsse: Fix miswiring of expansion IRQs
c85153c2d9 hw/intc/armv7m_nvic: Allow byte accesses to SHPR1
4ec0189e93 MAINTAINERS: Remove Peter Crosthwaite from various entries
45ab292867 arm: Allow system registers for KVM guests to be changed by QEMU code
3382e5fb3a linux-user/elfload: enable HWCAP_CPUID for AArch64
1d9bc813e5 target/arm: expose remaining CPUID registers as RAZ
ba7bf1bc03 target/arm: expose MPIDR_EL1 to userspace
9ee0c2aab3 target/arm: expose CPUID registers to userspace
a443302926 target/arm: relax permission checks for HWCAP_CPUID registers
f59f8c968a target/arm: Restructure disas_fp_int_conv
e9d6907528 target/arm: Force result size into dp after operation
aeaa89ad82 target/arm: Fix int128_make128 lo, hi order in paired_cmpxchg64_be
7124a830e4 target/arm: Implement HACR_EL2
88200603a8 target/arm: Fix CRn to be 14 for PMEVTYPER/PMEVCNTR
=== OUTPUT BEGIN ===
1/27 Checking commit 88200603a8cb (target/arm: Fix CRn to be 14 for PMEVTYPER/PMEVCNTR)
2/27 Checking commit 7124a830e497 (target/arm: Implement HACR_EL2)
3/27 Checking commit aeaa89ad8291 (target/arm: Fix int128_make128 lo, hi order in paired_cmpxchg64_be)
4/27 Checking commit e9d6907528aa (target/arm: Force result size into dp after operation)
5/27 Checking commit f59f8c968ae5 (target/arm: Restructure disas_fp_int_conv)
6/27 Checking commit a44330292615 (target/arm: relax permission checks for HWCAP_CPUID registers)
7/27 Checking commit 9ee0c2aab31c (target/arm: expose CPUID registers to userspace)
8/27 Checking commit ba7bf1bc03e1 (target/arm: expose MPIDR_EL1 to userspace)
9/27 Checking commit 1d9bc813e57b (target/arm: expose remaining CPUID registers as RAZ)
10/27 Checking commit 3382e5fb3a55 (linux-user/elfload: enable HWCAP_CPUID for AArch64)
11/27 Checking commit 45ab2928675e (arm: Allow system registers for KVM guests to be changed by QEMU code)
12/27 Checking commit 4ec0189e9352 (MAINTAINERS: Remove Peter Crosthwaite from various entries)
13/27 Checking commit c85153c2d903 (hw/intc/armv7m_nvic: Allow byte accesses to SHPR1)
14/27 Checking commit 5aafc658edab (hw/arm/armsse: Fix miswiring of expansion IRQs)
15/27 Checking commit 2fc345aa780c (target/arm: Rely on optimization within tcg_gen_gvec_or)
16/27 Checking commit f8354404a2f8 (target/arm: Use vector minmax expanders for aarch64)
17/27 Checking commit 28d1ed93b13a (target/arm: Use vector minmax expanders for aarch32)
18/27 Checking commit 524621238d29 (target/arm: Use tcg integer min/max primitives for neon)
19/27 Checking commit bd9964085387 (target/arm: Remove neon min/max helpers)
20/27 Checking commit 6e9dcb58eb81 (target/arm: Fix vfp_gdb_get/set_reg vs FPSCR)
ERROR: trailing statements should be on next line
#25: FILE: target/arm/helper.c:84:
+ case 1: stl_p(buf, vfp_get_fpscr(env)); return 4;
ERROR: trailing statements should be on next line
#34: FILE: target/arm/helper.c:110:
+ case 1: vfp_set_fpscr(env, ldl_p(buf)); return 4;
total: 2 errors, 0 warnings, 16 lines checked
Patch 20/27 has style problems, please review. If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
21/27 Checking commit a5563518a586 (target/arm: Fix arm_cpu_dump_state vs FPSCR)
22/27 Checking commit d640c730a965 (target/arm: Split out flags setting from vfp compares)
23/27 Checking commit 95ef6915a6d0 (target/arm: Fix set of bits kept in xregs[ARM_VFP_FPSCR])
24/27 Checking commit 781e41b075a0 (target/arm: Split out FPSCR.QC to a vector field)
25/27 Checking commit 3846dbef44da (target/arm: Use vector operations for saturation)
ERROR: spaces required around that '*' (ctx:WxV)
#360: FILE: target/arm/vec_helper.c:774:
+ TYPEN *d = vd, *n = vn; TYPEM *m = vm; \
^
total: 1 errors, 0 warnings, 438 lines checked
Patch 25/27 has style problems, please review. If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
26/27 Checking commit 34aa54edfa31 (target/arm: Add missing clear_tail calls)
27/27 Checking commit 8fd00e6381cf (gdbstub: Send a reply to the vKill packet.)
=== OUTPUT END ===
Test command exited with code: 1
The full log is available at
http://patchew.org/logs/20190214190603.25030-1-peter.maydell@linaro.org/testing.checkpatch/?type=message.
---
Email generated automatically by Patchew [http://patchew.org/].
Please send your feedback to patchew-devel@redhat.com
Patchew URL: https://patchew.org/QEMU/20190214190603.25030-1-peter.maydell@linaro.org/
Hi,
This series seems to have some coding style problems. See output below for
more information:
Subject: [Qemu-devel] [PULL 00/27] target-arm queue
Message-id: 20190214190603.25030-1-peter.maydell@linaro.org
Type: series
=== TEST SCRIPT BEGIN ===
#!/bin/bash
git config --local diff.renamelimit 0
git config --local diff.renames True
git config --local diff.algorithm histogram
./scripts/checkpatch.pl --mailback base..
=== TEST SCRIPT END ===
Updating 3c8cf5a9c21ff8782164d1def7f44bd888713384
From https://github.com/patchew-project/qemu
- [tag update] patchew/20190214102816.3393-1-peter.maydell@linaro.org -> patchew/20190214102816.3393-1-peter.maydell@linaro.org
- [tag update] patchew/20190214190603.25030-1-peter.maydell@linaro.org -> patchew/20190214190603.25030-1-peter.maydell@linaro.org
Submodule 'capstone' (https://git.qemu.org/git/capstone.git) registered for path 'capstone'
Submodule 'dtc' (https://git.qemu.org/git/dtc.git) registered for path 'dtc'
Submodule 'roms/QemuMacDrivers' (https://git.qemu.org/git/QemuMacDrivers.git) registered for path 'roms/QemuMacDrivers'
Submodule 'roms/SLOF' (https://git.qemu.org/git/SLOF.git) registered for path 'roms/SLOF'
Submodule 'roms/ipxe' (https://git.qemu.org/git/ipxe.git) registered for path 'roms/ipxe'
Submodule 'roms/openbios' (https://git.qemu.org/git/openbios.git) registered for path 'roms/openbios'
Submodule 'roms/openhackware' (https://git.qemu.org/git/openhackware.git) registered for path 'roms/openhackware'
Submodule 'roms/qemu-palcode' (https://git.qemu.org/git/qemu-palcode.git) registered for path 'roms/qemu-palcode'
Submodule 'roms/seabios' (https://git.qemu.org/git/seabios.git/) registered for path 'roms/seabios'
Submodule 'roms/seabios-hppa' (https://github.com/hdeller/seabios-hppa.git) registered for path 'roms/seabios-hppa'
Submodule 'roms/sgabios' (https://git.qemu.org/git/sgabios.git) registered for path 'roms/sgabios'
Submodule 'roms/skiboot' (https://git.qemu.org/git/skiboot.git) registered for path 'roms/skiboot'
Submodule 'roms/u-boot' (https://git.qemu.org/git/u-boot.git) registered for path 'roms/u-boot'
Submodule 'roms/u-boot-sam460ex' (https://git.qemu.org/git/u-boot-sam460ex.git) registered for path 'roms/u-boot-sam460ex'
Submodule 'tests/fp/berkeley-softfloat-3' (https://github.com/cota/berkeley-softfloat-3) registered for path 'tests/fp/berkeley-softfloat-3'
Submodule 'tests/fp/berkeley-testfloat-3' (https://github.com/cota/berkeley-testfloat-3) registered for path 'tests/fp/berkeley-testfloat-3'
Submodule 'ui/keycodemapdb' (https://git.qemu.org/git/keycodemapdb.git) registered for path 'ui/keycodemapdb'
Cloning into 'capstone'...
Submodule path 'capstone': checked out '22ead3e0bfdb87516656453336160e0a37b066bf'
Cloning into 'dtc'...
Submodule path 'dtc': checked out '88f18909db731a627456f26d779445f84e449536'
Cloning into 'roms/QemuMacDrivers'...
Submodule path 'roms/QemuMacDrivers': checked out '90c488d5f4a407342247b9ea869df1c2d9c8e266'
Cloning into 'roms/SLOF'...
Submodule path 'roms/SLOF': checked out 'a5b428e1c1eae703bdd62a3f527223c291ee3fdc'
Cloning into 'roms/ipxe'...
Submodule path 'roms/ipxe': checked out 'de4565cbe76ea9f7913a01f331be3ee901bb6e17'
Cloning into 'roms/openbios'...
Submodule path 'roms/openbios': checked out '441a84d3a642a10b948369c63f32367e8ff6395b'
Cloning into 'roms/openhackware'...
Submodule path 'roms/openhackware': checked out 'c559da7c8eec5e45ef1f67978827af6f0b9546f5'
Cloning into 'roms/qemu-palcode'...
Submodule path 'roms/qemu-palcode': checked out '51c237d7e20d05100eacadee2f61abc17e6bc097'
Cloning into 'roms/seabios'...
Submodule path 'roms/seabios': checked out 'a698c8995ffb2838296ec284fe3c4ad33dfca307'
Cloning into 'roms/seabios-hppa'...
Submodule path 'roms/seabios-hppa': checked out '1ef99a01572c2581c30e16e6fe69e9ea2ef92ce0'
Cloning into 'roms/sgabios'...
Submodule path 'roms/sgabios': checked out 'cbaee52287e5f32373181cff50a00b6c4ac9015a'
Cloning into 'roms/skiboot'...
Submodule path 'roms/skiboot': checked out 'e0ee24c27a172bcf482f6f2bc905e6211c134bcc'
Cloning into 'roms/u-boot'...
Submodule path 'roms/u-boot': checked out 'd85ca029f257b53a96da6c2fb421e78a003a9943'
Cloning into 'roms/u-boot-sam460ex'...
Submodule path 'roms/u-boot-sam460ex': checked out '60b3916f33e617a815973c5a6df77055b2e3a588'
Cloning into 'tests/fp/berkeley-softfloat-3'...
Submodule path 'tests/fp/berkeley-softfloat-3': checked out 'b64af41c3276f97f0e181920400ee056b9c88037'
Cloning into 'tests/fp/berkeley-testfloat-3'...
Submodule path 'tests/fp/berkeley-testfloat-3': checked out '5a59dcec19327396a011a17fd924aed4fec416b3'
Cloning into 'ui/keycodemapdb'...
Submodule path 'ui/keycodemapdb': checked out '6b3d716e2b6472eb7189d3220552280ef3d832ce'
Switched to a new branch 'test'
8fd00e6 gdbstub: Send a reply to the vKill packet.
34aa54e target/arm: Add missing clear_tail calls
3846dbe target/arm: Use vector operations for saturation
781e41b target/arm: Split out FPSCR.QC to a vector field
95ef691 target/arm: Fix set of bits kept in xregs[ARM_VFP_FPSCR]
d640c73 target/arm: Split out flags setting from vfp compares
a556351 target/arm: Fix arm_cpu_dump_state vs FPSCR
6e9dcb5 target/arm: Fix vfp_gdb_get/set_reg vs FPSCR
bd99640 target/arm: Remove neon min/max helpers
5246212 target/arm: Use tcg integer min/max primitives for neon
28d1ed9 target/arm: Use vector minmax expanders for aarch32
f835440 target/arm: Use vector minmax expanders for aarch64
2fc345a target/arm: Rely on optimization within tcg_gen_gvec_or
5aafc65 hw/arm/armsse: Fix miswiring of expansion IRQs
c85153c hw/intc/armv7m_nvic: Allow byte accesses to SHPR1
4ec0189 MAINTAINERS: Remove Peter Crosthwaite from various entries
45ab292 arm: Allow system registers for KVM guests to be changed by QEMU code
3382e5f linux-user/elfload: enable HWCAP_CPUID for AArch64
1d9bc81 target/arm: expose remaining CPUID registers as RAZ
ba7bf1b target/arm: expose MPIDR_EL1 to userspace
9ee0c2a target/arm: expose CPUID registers to userspace
a443302 target/arm: relax permission checks for HWCAP_CPUID registers
f59f8c9 target/arm: Restructure disas_fp_int_conv
e9d6907 target/arm: Force result size into dp after operation
aeaa89a target/arm: Fix int128_make128 lo, hi order in paired_cmpxchg64_be
7124a83 target/arm: Implement HACR_EL2
8820060 target/arm: Fix CRn to be 14 for PMEVTYPER/PMEVCNTR
=== OUTPUT BEGIN ===
1/27 Checking commit 88200603a8cb (target/arm: Fix CRn to be 14 for PMEVTYPER/PMEVCNTR)
2/27 Checking commit 7124a830e497 (target/arm: Implement HACR_EL2)
3/27 Checking commit aeaa89ad8291 (target/arm: Fix int128_make128 lo, hi order in paired_cmpxchg64_be)
4/27 Checking commit e9d6907528aa (target/arm: Force result size into dp after operation)
5/27 Checking commit f59f8c968ae5 (target/arm: Restructure disas_fp_int_conv)
6/27 Checking commit a44330292615 (target/arm: relax permission checks for HWCAP_CPUID registers)
7/27 Checking commit 9ee0c2aab31c (target/arm: expose CPUID registers to userspace)
8/27 Checking commit ba7bf1bc03e1 (target/arm: expose MPIDR_EL1 to userspace)
9/27 Checking commit 1d9bc813e57b (target/arm: expose remaining CPUID registers as RAZ)
10/27 Checking commit 3382e5fb3a55 (linux-user/elfload: enable HWCAP_CPUID for AArch64)
11/27 Checking commit 45ab2928675e (arm: Allow system registers for KVM guests to be changed by QEMU code)
12/27 Checking commit 4ec0189e9352 (MAINTAINERS: Remove Peter Crosthwaite from various entries)
13/27 Checking commit c85153c2d903 (hw/intc/armv7m_nvic: Allow byte accesses to SHPR1)
14/27 Checking commit 5aafc658edab (hw/arm/armsse: Fix miswiring of expansion IRQs)
15/27 Checking commit 2fc345aa780c (target/arm: Rely on optimization within tcg_gen_gvec_or)
16/27 Checking commit f8354404a2f8 (target/arm: Use vector minmax expanders for aarch64)
17/27 Checking commit 28d1ed93b13a (target/arm: Use vector minmax expanders for aarch32)
18/27 Checking commit 524621238d29 (target/arm: Use tcg integer min/max primitives for neon)
19/27 Checking commit bd9964085387 (target/arm: Remove neon min/max helpers)
20/27 Checking commit 6e9dcb58eb81 (target/arm: Fix vfp_gdb_get/set_reg vs FPSCR)
ERROR: trailing statements should be on next line
#25: FILE: target/arm/helper.c:84:
+ case 1: stl_p(buf, vfp_get_fpscr(env)); return 4;
ERROR: trailing statements should be on next line
#34: FILE: target/arm/helper.c:110:
+ case 1: vfp_set_fpscr(env, ldl_p(buf)); return 4;
total: 2 errors, 0 warnings, 16 lines checked
Patch 20/27 has style problems, please review. If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
21/27 Checking commit a5563518a586 (target/arm: Fix arm_cpu_dump_state vs FPSCR)
22/27 Checking commit d640c730a965 (target/arm: Split out flags setting from vfp compares)
23/27 Checking commit 95ef6915a6d0 (target/arm: Fix set of bits kept in xregs[ARM_VFP_FPSCR])
24/27 Checking commit 781e41b075a0 (target/arm: Split out FPSCR.QC to a vector field)
25/27 Checking commit 3846dbef44da (target/arm: Use vector operations for saturation)
ERROR: spaces required around that '*' (ctx:WxV)
#360: FILE: target/arm/vec_helper.c:774:
+ TYPEN *d = vd, *n = vn; TYPEM *m = vm; \
^
total: 1 errors, 0 warnings, 438 lines checked
Patch 25/27 has style problems, please review. If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
26/27 Checking commit 34aa54edfa31 (target/arm: Add missing clear_tail calls)
27/27 Checking commit 8fd00e6381cf (gdbstub: Send a reply to the vKill packet.)
=== OUTPUT END ===
Test command exited with code: 1
The full log is available at
http://patchew.org/logs/20190214190603.25030-1-peter.maydell@linaro.org/testing.checkpatch/?type=message.
---
Email generated automatically by Patchew [http://patchew.org/].
Please send your feedback to patchew-devel@redhat.com
Patchew URL: https://patchew.org/QEMU/20190214190603.25030-1-peter.maydell@linaro.org/
Hi,
This series seems to have some coding style problems. See output below for
more information:
Message-id: 20190214190603.25030-1-peter.maydell@linaro.org
Subject: [Qemu-devel] [PULL 00/27] target-arm queue
Type: series
=== TEST SCRIPT BEGIN ===
#!/bin/bash
git config --local diff.renamelimit 0
git config --local diff.renames True
git config --local diff.algorithm histogram
./scripts/checkpatch.pl --mailback base..
=== TEST SCRIPT END ===
Updating 3c8cf5a9c21ff8782164d1def7f44bd888713384
From https://github.com/patchew-project/qemu
t [tag update] patchew/20190214190603.25030-1-peter.maydell@linaro.org -> patchew/20190214190603.25030-1-peter.maydell@linaro.org
Switched to a new branch 'test'
6553235a72 gdbstub: Send a reply to the vKill packet.
c94c5655ee target/arm: Add missing clear_tail calls
026b9afc53 target/arm: Use vector operations for saturation
c075e4f90b target/arm: Split out FPSCR.QC to a vector field
682ec57ab2 target/arm: Fix set of bits kept in xregs[ARM_VFP_FPSCR]
8e880e02c6 target/arm: Split out flags setting from vfp compares
87c2a204a6 target/arm: Fix arm_cpu_dump_state vs FPSCR
0918b54044 target/arm: Fix vfp_gdb_get/set_reg vs FPSCR
2b68e10ae9 target/arm: Remove neon min/max helpers
6e628b4a95 target/arm: Use tcg integer min/max primitives for neon
b98c382660 target/arm: Use vector minmax expanders for aarch32
b5f88711f2 target/arm: Use vector minmax expanders for aarch64
bb7653f060 target/arm: Rely on optimization within tcg_gen_gvec_or
cddac7511c hw/arm/armsse: Fix miswiring of expansion IRQs
2a5cd585f1 hw/intc/armv7m_nvic: Allow byte accesses to SHPR1
83f6ca0a1e MAINTAINERS: Remove Peter Crosthwaite from various entries
f66e7b2488 arm: Allow system registers for KVM guests to be changed by QEMU code
8f129e350d linux-user/elfload: enable HWCAP_CPUID for AArch64
82b82f40c0 target/arm: expose remaining CPUID registers as RAZ
2632f88cee target/arm: expose MPIDR_EL1 to userspace
4430a67611 target/arm: expose CPUID registers to userspace
1ed25cbaba target/arm: relax permission checks for HWCAP_CPUID registers
705b021f00 target/arm: Restructure disas_fp_int_conv
8cb3bd05da target/arm: Force result size into dp after operation
579d84d2ea target/arm: Fix int128_make128 lo, hi order in paired_cmpxchg64_be
6544e760c4 target/arm: Implement HACR_EL2
75e724d729 target/arm: Fix CRn to be 14 for PMEVTYPER/PMEVCNTR
=== OUTPUT BEGIN ===
1/27 Checking commit 75e724d7297a (target/arm: Fix CRn to be 14 for PMEVTYPER/PMEVCNTR)
2/27 Checking commit 6544e760c431 (target/arm: Implement HACR_EL2)
3/27 Checking commit 579d84d2eaa8 (target/arm: Fix int128_make128 lo, hi order in paired_cmpxchg64_be)
4/27 Checking commit 8cb3bd05da03 (target/arm: Force result size into dp after operation)
5/27 Checking commit 705b021f0005 (target/arm: Restructure disas_fp_int_conv)
6/27 Checking commit 1ed25cbabab7 (target/arm: relax permission checks for HWCAP_CPUID registers)
7/27 Checking commit 4430a6761146 (target/arm: expose CPUID registers to userspace)
8/27 Checking commit 2632f88ceebd (target/arm: expose MPIDR_EL1 to userspace)
9/27 Checking commit 82b82f40c0c9 (target/arm: expose remaining CPUID registers as RAZ)
10/27 Checking commit 8f129e350d23 (linux-user/elfload: enable HWCAP_CPUID for AArch64)
11/27 Checking commit f66e7b248819 (arm: Allow system registers for KVM guests to be changed by QEMU code)
12/27 Checking commit 83f6ca0a1ebf (MAINTAINERS: Remove Peter Crosthwaite from various entries)
13/27 Checking commit 2a5cd585f1d3 (hw/intc/armv7m_nvic: Allow byte accesses to SHPR1)
14/27 Checking commit cddac7511c9e (hw/arm/armsse: Fix miswiring of expansion IRQs)
15/27 Checking commit bb7653f060ac (target/arm: Rely on optimization within tcg_gen_gvec_or)
16/27 Checking commit b5f88711f2a2 (target/arm: Use vector minmax expanders for aarch64)
17/27 Checking commit b98c382660f7 (target/arm: Use vector minmax expanders for aarch32)
18/27 Checking commit 6e628b4a95f8 (target/arm: Use tcg integer min/max primitives for neon)
19/27 Checking commit 2b68e10ae9c7 (target/arm: Remove neon min/max helpers)
20/27 Checking commit 0918b540445f (target/arm: Fix vfp_gdb_get/set_reg vs FPSCR)
ERROR: trailing statements should be on next line
#25: FILE: target/arm/helper.c:84:
+ case 1: stl_p(buf, vfp_get_fpscr(env)); return 4;
ERROR: trailing statements should be on next line
#34: FILE: target/arm/helper.c:110:
+ case 1: vfp_set_fpscr(env, ldl_p(buf)); return 4;
total: 2 errors, 0 warnings, 16 lines checked
Patch 20/27 has style problems, please review. If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
21/27 Checking commit 87c2a204a651 (target/arm: Fix arm_cpu_dump_state vs FPSCR)
22/27 Checking commit 8e880e02c632 (target/arm: Split out flags setting from vfp compares)
23/27 Checking commit 682ec57ab2cf (target/arm: Fix set of bits kept in xregs[ARM_VFP_FPSCR])
24/27 Checking commit c075e4f90bb4 (target/arm: Split out FPSCR.QC to a vector field)
25/27 Checking commit 026b9afc537c (target/arm: Use vector operations for saturation)
ERROR: spaces required around that '*' (ctx:WxV)
#360: FILE: target/arm/vec_helper.c:774:
+ TYPEN *d = vd, *n = vn; TYPEM *m = vm; \
^
total: 1 errors, 0 warnings, 438 lines checked
Patch 25/27 has style problems, please review. If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
26/27 Checking commit c94c5655eef4 (target/arm: Add missing clear_tail calls)
27/27 Checking commit 6553235a7219 (gdbstub: Send a reply to the vKill packet.)
=== OUTPUT END ===
Test command exited with code: 1
The full log is available at
http://patchew.org/logs/20190214190603.25030-1-peter.maydell@linaro.org/testing.checkpatch/?type=message.
---
Email generated automatically by Patchew [http://patchew.org/].
Please send your feedback to patchew-devel@redhat.com
Patchew URL: https://patchew.org/QEMU/20190214190603.25030-1-peter.maydell@linaro.org/
Hi,
This series seems to have some coding style problems. See output below for
more information:
Subject: [Qemu-devel] [PULL 00/27] target-arm queue
Message-id: 20190214190603.25030-1-peter.maydell@linaro.org
Type: series
=== TEST SCRIPT BEGIN ===
#!/bin/bash
git config --local diff.renamelimit 0
git config --local diff.renames True
git config --local diff.algorithm histogram
./scripts/checkpatch.pl --mailback base..
=== TEST SCRIPT END ===
Updating 3c8cf5a9c21ff8782164d1def7f44bd888713384
From https://github.com/patchew-project/qemu
- [tag update] patchew/20190214190603.25030-1-peter.maydell@linaro.org -> patchew/20190214190603.25030-1-peter.maydell@linaro.org
Submodule 'capstone' (https://git.qemu.org/git/capstone.git) registered for path 'capstone'
Submodule 'dtc' (https://git.qemu.org/git/dtc.git) registered for path 'dtc'
Submodule 'roms/QemuMacDrivers' (https://git.qemu.org/git/QemuMacDrivers.git) registered for path 'roms/QemuMacDrivers'
Submodule 'roms/SLOF' (https://git.qemu.org/git/SLOF.git) registered for path 'roms/SLOF'
Submodule 'roms/ipxe' (https://git.qemu.org/git/ipxe.git) registered for path 'roms/ipxe'
Submodule 'roms/openbios' (https://git.qemu.org/git/openbios.git) registered for path 'roms/openbios'
Submodule 'roms/openhackware' (https://git.qemu.org/git/openhackware.git) registered for path 'roms/openhackware'
Submodule 'roms/qemu-palcode' (https://git.qemu.org/git/qemu-palcode.git) registered for path 'roms/qemu-palcode'
Submodule 'roms/seabios' (https://git.qemu.org/git/seabios.git/) registered for path 'roms/seabios'
Submodule 'roms/seabios-hppa' (https://github.com/hdeller/seabios-hppa.git) registered for path 'roms/seabios-hppa'
Submodule 'roms/sgabios' (https://git.qemu.org/git/sgabios.git) registered for path 'roms/sgabios'
Submodule 'roms/skiboot' (https://git.qemu.org/git/skiboot.git) registered for path 'roms/skiboot'
Submodule 'roms/u-boot' (https://git.qemu.org/git/u-boot.git) registered for path 'roms/u-boot'
Submodule 'roms/u-boot-sam460ex' (https://git.qemu.org/git/u-boot-sam460ex.git) registered for path 'roms/u-boot-sam460ex'
Submodule 'tests/fp/berkeley-softfloat-3' (https://github.com/cota/berkeley-softfloat-3) registered for path 'tests/fp/berkeley-softfloat-3'
Submodule 'tests/fp/berkeley-testfloat-3' (https://github.com/cota/berkeley-testfloat-3) registered for path 'tests/fp/berkeley-testfloat-3'
Submodule 'ui/keycodemapdb' (https://git.qemu.org/git/keycodemapdb.git) registered for path 'ui/keycodemapdb'
Cloning into 'capstone'...
Submodule path 'capstone': checked out '22ead3e0bfdb87516656453336160e0a37b066bf'
Cloning into 'dtc'...
Submodule path 'dtc': checked out '88f18909db731a627456f26d779445f84e449536'
Cloning into 'roms/QemuMacDrivers'...
Submodule path 'roms/QemuMacDrivers': checked out '90c488d5f4a407342247b9ea869df1c2d9c8e266'
Cloning into 'roms/SLOF'...
Submodule path 'roms/SLOF': checked out 'a5b428e1c1eae703bdd62a3f527223c291ee3fdc'
Cloning into 'roms/ipxe'...
Submodule path 'roms/ipxe': checked out 'de4565cbe76ea9f7913a01f331be3ee901bb6e17'
Cloning into 'roms/openbios'...
Submodule path 'roms/openbios': checked out '441a84d3a642a10b948369c63f32367e8ff6395b'
Cloning into 'roms/openhackware'...
Submodule path 'roms/openhackware': checked out 'c559da7c8eec5e45ef1f67978827af6f0b9546f5'
Cloning into 'roms/qemu-palcode'...
Submodule path 'roms/qemu-palcode': checked out '51c237d7e20d05100eacadee2f61abc17e6bc097'
Cloning into 'roms/seabios'...
Submodule path 'roms/seabios': checked out 'a698c8995ffb2838296ec284fe3c4ad33dfca307'
Cloning into 'roms/seabios-hppa'...
Submodule path 'roms/seabios-hppa': checked out '1ef99a01572c2581c30e16e6fe69e9ea2ef92ce0'
Cloning into 'roms/sgabios'...
Submodule path 'roms/sgabios': checked out 'cbaee52287e5f32373181cff50a00b6c4ac9015a'
Cloning into 'roms/skiboot'...
Submodule path 'roms/skiboot': checked out 'e0ee24c27a172bcf482f6f2bc905e6211c134bcc'
Cloning into 'roms/u-boot'...
Submodule path 'roms/u-boot': checked out 'd85ca029f257b53a96da6c2fb421e78a003a9943'
Cloning into 'roms/u-boot-sam460ex'...
Submodule path 'roms/u-boot-sam460ex': checked out '60b3916f33e617a815973c5a6df77055b2e3a588'
Cloning into 'tests/fp/berkeley-softfloat-3'...
Submodule path 'tests/fp/berkeley-softfloat-3': checked out 'b64af41c3276f97f0e181920400ee056b9c88037'
Cloning into 'tests/fp/berkeley-testfloat-3'...
Submodule path 'tests/fp/berkeley-testfloat-3': checked out '5a59dcec19327396a011a17fd924aed4fec416b3'
Cloning into 'ui/keycodemapdb'...
Submodule path 'ui/keycodemapdb': checked out '6b3d716e2b6472eb7189d3220552280ef3d832ce'
Switched to a new branch 'test'
6553235 gdbstub: Send a reply to the vKill packet.
c94c565 target/arm: Add missing clear_tail calls
026b9af target/arm: Use vector operations for saturation
c075e4f target/arm: Split out FPSCR.QC to a vector field
682ec57 target/arm: Fix set of bits kept in xregs[ARM_VFP_FPSCR]
8e880e0 target/arm: Split out flags setting from vfp compares
87c2a20 target/arm: Fix arm_cpu_dump_state vs FPSCR
0918b54 target/arm: Fix vfp_gdb_get/set_reg vs FPSCR
2b68e10 target/arm: Remove neon min/max helpers
6e628b4 target/arm: Use tcg integer min/max primitives for neon
b98c382 target/arm: Use vector minmax expanders for aarch32
b5f8871 target/arm: Use vector minmax expanders for aarch64
bb7653f target/arm: Rely on optimization within tcg_gen_gvec_or
cddac75 hw/arm/armsse: Fix miswiring of expansion IRQs
2a5cd58 hw/intc/armv7m_nvic: Allow byte accesses to SHPR1
83f6ca0 MAINTAINERS: Remove Peter Crosthwaite from various entries
f66e7b2 arm: Allow system registers for KVM guests to be changed by QEMU code
8f129e3 linux-user/elfload: enable HWCAP_CPUID for AArch64
82b82f4 target/arm: expose remaining CPUID registers as RAZ
2632f88 target/arm: expose MPIDR_EL1 to userspace
4430a67 target/arm: expose CPUID registers to userspace
1ed25cb target/arm: relax permission checks for HWCAP_CPUID registers
705b021 target/arm: Restructure disas_fp_int_conv
8cb3bd0 target/arm: Force result size into dp after operation
579d84d target/arm: Fix int128_make128 lo, hi order in paired_cmpxchg64_be
6544e76 target/arm: Implement HACR_EL2
75e724d target/arm: Fix CRn to be 14 for PMEVTYPER/PMEVCNTR
=== OUTPUT BEGIN ===
1/27 Checking commit 75e724d7297a (target/arm: Fix CRn to be 14 for PMEVTYPER/PMEVCNTR)
2/27 Checking commit 6544e760c431 (target/arm: Implement HACR_EL2)
3/27 Checking commit 579d84d2eaa8 (target/arm: Fix int128_make128 lo, hi order in paired_cmpxchg64_be)
4/27 Checking commit 8cb3bd05da03 (target/arm: Force result size into dp after operation)
5/27 Checking commit 705b021f0005 (target/arm: Restructure disas_fp_int_conv)
6/27 Checking commit 1ed25cbabab7 (target/arm: relax permission checks for HWCAP_CPUID registers)
7/27 Checking commit 4430a6761146 (target/arm: expose CPUID registers to userspace)
8/27 Checking commit 2632f88ceebd (target/arm: expose MPIDR_EL1 to userspace)
9/27 Checking commit 82b82f40c0c9 (target/arm: expose remaining CPUID registers as RAZ)
10/27 Checking commit 8f129e350d23 (linux-user/elfload: enable HWCAP_CPUID for AArch64)
11/27 Checking commit f66e7b248819 (arm: Allow system registers for KVM guests to be changed by QEMU code)
12/27 Checking commit 83f6ca0a1ebf (MAINTAINERS: Remove Peter Crosthwaite from various entries)
13/27 Checking commit 2a5cd585f1d3 (hw/intc/armv7m_nvic: Allow byte accesses to SHPR1)
14/27 Checking commit cddac7511c9e (hw/arm/armsse: Fix miswiring of expansion IRQs)
15/27 Checking commit bb7653f060ac (target/arm: Rely on optimization within tcg_gen_gvec_or)
16/27 Checking commit b5f88711f2a2 (target/arm: Use vector minmax expanders for aarch64)
17/27 Checking commit b98c382660f7 (target/arm: Use vector minmax expanders for aarch32)
18/27 Checking commit 6e628b4a95f8 (target/arm: Use tcg integer min/max primitives for neon)
19/27 Checking commit 2b68e10ae9c7 (target/arm: Remove neon min/max helpers)
20/27 Checking commit 0918b540445f (target/arm: Fix vfp_gdb_get/set_reg vs FPSCR)
ERROR: trailing statements should be on next line
#25: FILE: target/arm/helper.c:84:
+ case 1: stl_p(buf, vfp_get_fpscr(env)); return 4;
ERROR: trailing statements should be on next line
#34: FILE: target/arm/helper.c:110:
+ case 1: vfp_set_fpscr(env, ldl_p(buf)); return 4;
total: 2 errors, 0 warnings, 16 lines checked
Patch 20/27 has style problems, please review. If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
21/27 Checking commit 87c2a204a651 (target/arm: Fix arm_cpu_dump_state vs FPSCR)
22/27 Checking commit 8e880e02c632 (target/arm: Split out flags setting from vfp compares)
23/27 Checking commit 682ec57ab2cf (target/arm: Fix set of bits kept in xregs[ARM_VFP_FPSCR])
24/27 Checking commit c075e4f90bb4 (target/arm: Split out FPSCR.QC to a vector field)
25/27 Checking commit 026b9afc537c (target/arm: Use vector operations for saturation)
ERROR: spaces required around that '*' (ctx:WxV)
#360: FILE: target/arm/vec_helper.c:774:
+ TYPEN *d = vd, *n = vn; TYPEM *m = vm; \
^
total: 1 errors, 0 warnings, 438 lines checked
Patch 25/27 has style problems, please review. If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
26/27 Checking commit c94c5655eef4 (target/arm: Add missing clear_tail calls)
27/27 Checking commit 6553235a7219 (gdbstub: Send a reply to the vKill packet.)
=== OUTPUT END ===
Test command exited with code: 1
The full log is available at
http://patchew.org/logs/20190214190603.25030-1-peter.maydell@linaro.org/testing.checkpatch/?type=message.
---
Email generated automatically by Patchew [http://patchew.org/].
Please send your feedback to patchew-devel@redhat.com
Patchew URL: https://patchew.org/QEMU/20190214190603.25030-1-peter.maydell@linaro.org/
Hi,
This series seems to have some coding style problems. See output below for
more information:
Message-id: 20190214190603.25030-1-peter.maydell@linaro.org
Subject: [Qemu-devel] [PULL 00/27] target-arm queue
Type: series
=== TEST SCRIPT BEGIN ===
#!/bin/bash
git config --local diff.renamelimit 0
git config --local diff.renames True
git config --local diff.algorithm histogram
./scripts/checkpatch.pl --mailback base..
=== TEST SCRIPT END ===
Updating 3c8cf5a9c21ff8782164d1def7f44bd888713384
From https://github.com/patchew-project/qemu
t [tag update] patchew/20190214190603.25030-1-peter.maydell@linaro.org -> patchew/20190214190603.25030-1-peter.maydell@linaro.org
Switched to a new branch 'test'
73ac529141 gdbstub: Send a reply to the vKill packet.
4b247465c1 target/arm: Add missing clear_tail calls
89be70063e target/arm: Use vector operations for saturation
e77ac93de2 target/arm: Split out FPSCR.QC to a vector field
c22864f292 target/arm: Fix set of bits kept in xregs[ARM_VFP_FPSCR]
ff918185bd target/arm: Split out flags setting from vfp compares
11f919937a target/arm: Fix arm_cpu_dump_state vs FPSCR
dd99a43005 target/arm: Fix vfp_gdb_get/set_reg vs FPSCR
e004fed65e target/arm: Remove neon min/max helpers
8f4545ca63 target/arm: Use tcg integer min/max primitives for neon
ab9ebe5a3d target/arm: Use vector minmax expanders for aarch32
72d6045bf1 target/arm: Use vector minmax expanders for aarch64
a7e7d40b7b target/arm: Rely on optimization within tcg_gen_gvec_or
990b62b71d hw/arm/armsse: Fix miswiring of expansion IRQs
ea4ce7fac8 hw/intc/armv7m_nvic: Allow byte accesses to SHPR1
40282cba68 MAINTAINERS: Remove Peter Crosthwaite from various entries
530553605c arm: Allow system registers for KVM guests to be changed by QEMU code
cf4f6b485e linux-user/elfload: enable HWCAP_CPUID for AArch64
c38db4cedc target/arm: expose remaining CPUID registers as RAZ
bc98ce37e8 target/arm: expose MPIDR_EL1 to userspace
5b3cbe3a2c target/arm: expose CPUID registers to userspace
3cbbe863dd target/arm: relax permission checks for HWCAP_CPUID registers
9054387819 target/arm: Restructure disas_fp_int_conv
72c798db01 target/arm: Force result size into dp after operation
9b1c8067b0 target/arm: Fix int128_make128 lo, hi order in paired_cmpxchg64_be
c2f33f799d target/arm: Implement HACR_EL2
5d803e29a6 target/arm: Fix CRn to be 14 for PMEVTYPER/PMEVCNTR
=== OUTPUT BEGIN ===
1/27 Checking commit 5d803e29a608 (target/arm: Fix CRn to be 14 for PMEVTYPER/PMEVCNTR)
2/27 Checking commit c2f33f799db1 (target/arm: Implement HACR_EL2)
3/27 Checking commit 9b1c8067b058 (target/arm: Fix int128_make128 lo, hi order in paired_cmpxchg64_be)
4/27 Checking commit 72c798db0186 (target/arm: Force result size into dp after operation)
5/27 Checking commit 905438781946 (target/arm: Restructure disas_fp_int_conv)
6/27 Checking commit 3cbbe863ddc4 (target/arm: relax permission checks for HWCAP_CPUID registers)
7/27 Checking commit 5b3cbe3a2cb1 (target/arm: expose CPUID registers to userspace)
8/27 Checking commit bc98ce37e86a (target/arm: expose MPIDR_EL1 to userspace)
9/27 Checking commit c38db4cedc34 (target/arm: expose remaining CPUID registers as RAZ)
10/27 Checking commit cf4f6b485e7d (linux-user/elfload: enable HWCAP_CPUID for AArch64)
11/27 Checking commit 530553605c71 (arm: Allow system registers for KVM guests to be changed by QEMU code)
12/27 Checking commit 40282cba687a (MAINTAINERS: Remove Peter Crosthwaite from various entries)
13/27 Checking commit ea4ce7fac88a (hw/intc/armv7m_nvic: Allow byte accesses to SHPR1)
14/27 Checking commit 990b62b71dd4 (hw/arm/armsse: Fix miswiring of expansion IRQs)
15/27 Checking commit a7e7d40b7b98 (target/arm: Rely on optimization within tcg_gen_gvec_or)
16/27 Checking commit 72d6045bf127 (target/arm: Use vector minmax expanders for aarch64)
17/27 Checking commit ab9ebe5a3d40 (target/arm: Use vector minmax expanders for aarch32)
18/27 Checking commit 8f4545ca6381 (target/arm: Use tcg integer min/max primitives for neon)
19/27 Checking commit e004fed65e8b (target/arm: Remove neon min/max helpers)
20/27 Checking commit dd99a430053c (target/arm: Fix vfp_gdb_get/set_reg vs FPSCR)
ERROR: trailing statements should be on next line
#25: FILE: target/arm/helper.c:84:
+ case 1: stl_p(buf, vfp_get_fpscr(env)); return 4;
ERROR: trailing statements should be on next line
#34: FILE: target/arm/helper.c:110:
+ case 1: vfp_set_fpscr(env, ldl_p(buf)); return 4;
total: 2 errors, 0 warnings, 16 lines checked
Patch 20/27 has style problems, please review. If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
21/27 Checking commit 11f919937a85 (target/arm: Fix arm_cpu_dump_state vs FPSCR)
22/27 Checking commit ff918185bd76 (target/arm: Split out flags setting from vfp compares)
23/27 Checking commit c22864f2927f (target/arm: Fix set of bits kept in xregs[ARM_VFP_FPSCR])
24/27 Checking commit e77ac93de248 (target/arm: Split out FPSCR.QC to a vector field)
25/27 Checking commit 89be70063eac (target/arm: Use vector operations for saturation)
ERROR: spaces required around that '*' (ctx:WxV)
#360: FILE: target/arm/vec_helper.c:774:
+ TYPEN *d = vd, *n = vn; TYPEM *m = vm; \
^
total: 1 errors, 0 warnings, 438 lines checked
Patch 25/27 has style problems, please review. If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
26/27 Checking commit 4b247465c1e0 (target/arm: Add missing clear_tail calls)
27/27 Checking commit 73ac529141df (gdbstub: Send a reply to the vKill packet.)
=== OUTPUT END ===
Test command exited with code: 1
The full log is available at
http://patchew.org/logs/20190214190603.25030-1-peter.maydell@linaro.org/testing.checkpatch/?type=message.
---
Email generated automatically by Patchew [http://patchew.org/].
Please send your feedback to patchew-devel@redhat.com
Patchew URL: https://patchew.org/QEMU/20190214190603.25030-1-peter.maydell@linaro.org/
Hi,
This series seems to have some coding style problems. See output below for
more information:
Message-id: 20190214190603.25030-1-peter.maydell@linaro.org
Subject: [Qemu-devel] [PULL 00/27] target-arm queue
Type: series
=== TEST SCRIPT BEGIN ===
#!/bin/bash
git config --local diff.renamelimit 0
git config --local diff.renames True
git config --local diff.algorithm histogram
./scripts/checkpatch.pl --mailback base..
=== TEST SCRIPT END ===
Updating 3c8cf5a9c21ff8782164d1def7f44bd888713384
From https://github.com/patchew-project/qemu
t [tag update] patchew/20190214190603.25030-1-peter.maydell@linaro.org -> patchew/20190214190603.25030-1-peter.maydell@linaro.org
Switched to a new branch 'test'
11ea4f3150 gdbstub: Send a reply to the vKill packet.
be0c840de4 target/arm: Add missing clear_tail calls
23ca71bf65 target/arm: Use vector operations for saturation
32960e7603 target/arm: Split out FPSCR.QC to a vector field
1145bf059b target/arm: Fix set of bits kept in xregs[ARM_VFP_FPSCR]
754737362f target/arm: Split out flags setting from vfp compares
9eae8889db target/arm: Fix arm_cpu_dump_state vs FPSCR
0ce5d35ee2 target/arm: Fix vfp_gdb_get/set_reg vs FPSCR
02666e516f target/arm: Remove neon min/max helpers
4d27e98f16 target/arm: Use tcg integer min/max primitives for neon
8e31e0c833 target/arm: Use vector minmax expanders for aarch32
be6d1d7c04 target/arm: Use vector minmax expanders for aarch64
9c42a28eca target/arm: Rely on optimization within tcg_gen_gvec_or
df0e032414 hw/arm/armsse: Fix miswiring of expansion IRQs
84a7951b4a hw/intc/armv7m_nvic: Allow byte accesses to SHPR1
514aa8eda1 MAINTAINERS: Remove Peter Crosthwaite from various entries
b9286febf7 arm: Allow system registers for KVM guests to be changed by QEMU code
7f9135d2ce linux-user/elfload: enable HWCAP_CPUID for AArch64
9fd22cfa69 target/arm: expose remaining CPUID registers as RAZ
9c0d85264b target/arm: expose MPIDR_EL1 to userspace
fb5effe844 target/arm: expose CPUID registers to userspace
ebebfe1ea5 target/arm: relax permission checks for HWCAP_CPUID registers
6ba2008b2f target/arm: Restructure disas_fp_int_conv
dfa0134d29 target/arm: Force result size into dp after operation
035fc662c1 target/arm: Fix int128_make128 lo, hi order in paired_cmpxchg64_be
bd1643769b target/arm: Implement HACR_EL2
5d9278ba69 target/arm: Fix CRn to be 14 for PMEVTYPER/PMEVCNTR
=== OUTPUT BEGIN ===
1/27 Checking commit 5d9278ba6904 (target/arm: Fix CRn to be 14 for PMEVTYPER/PMEVCNTR)
2/27 Checking commit bd1643769bf4 (target/arm: Implement HACR_EL2)
3/27 Checking commit 035fc662c10f (target/arm: Fix int128_make128 lo, hi order in paired_cmpxchg64_be)
4/27 Checking commit dfa0134d2938 (target/arm: Force result size into dp after operation)
5/27 Checking commit 6ba2008b2f9f (target/arm: Restructure disas_fp_int_conv)
6/27 Checking commit ebebfe1ea53d (target/arm: relax permission checks for HWCAP_CPUID registers)
7/27 Checking commit fb5effe8444a (target/arm: expose CPUID registers to userspace)
8/27 Checking commit 9c0d85264bd2 (target/arm: expose MPIDR_EL1 to userspace)
9/27 Checking commit 9fd22cfa696b (target/arm: expose remaining CPUID registers as RAZ)
10/27 Checking commit 7f9135d2ce3c (linux-user/elfload: enable HWCAP_CPUID for AArch64)
11/27 Checking commit b9286febf73f (arm: Allow system registers for KVM guests to be changed by QEMU code)
12/27 Checking commit 514aa8eda196 (MAINTAINERS: Remove Peter Crosthwaite from various entries)
13/27 Checking commit 84a7951b4a75 (hw/intc/armv7m_nvic: Allow byte accesses to SHPR1)
14/27 Checking commit df0e032414fb (hw/arm/armsse: Fix miswiring of expansion IRQs)
15/27 Checking commit 9c42a28eca48 (target/arm: Rely on optimization within tcg_gen_gvec_or)
16/27 Checking commit be6d1d7c044b (target/arm: Use vector minmax expanders for aarch64)
17/27 Checking commit 8e31e0c83344 (target/arm: Use vector minmax expanders for aarch32)
18/27 Checking commit 4d27e98f164d (target/arm: Use tcg integer min/max primitives for neon)
19/27 Checking commit 02666e516fbe (target/arm: Remove neon min/max helpers)
20/27 Checking commit 0ce5d35ee28b (target/arm: Fix vfp_gdb_get/set_reg vs FPSCR)
ERROR: trailing statements should be on next line
#25: FILE: target/arm/helper.c:84:
+ case 1: stl_p(buf, vfp_get_fpscr(env)); return 4;
ERROR: trailing statements should be on next line
#34: FILE: target/arm/helper.c:110:
+ case 1: vfp_set_fpscr(env, ldl_p(buf)); return 4;
total: 2 errors, 0 warnings, 16 lines checked
Patch 20/27 has style problems, please review. If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
21/27 Checking commit 9eae8889dbe3 (target/arm: Fix arm_cpu_dump_state vs FPSCR)
22/27 Checking commit 754737362f1b (target/arm: Split out flags setting from vfp compares)
23/27 Checking commit 1145bf059b88 (target/arm: Fix set of bits kept in xregs[ARM_VFP_FPSCR])
24/27 Checking commit 32960e760343 (target/arm: Split out FPSCR.QC to a vector field)
25/27 Checking commit 23ca71bf6538 (target/arm: Use vector operations for saturation)
ERROR: spaces required around that '*' (ctx:WxV)
#360: FILE: target/arm/vec_helper.c:774:
+ TYPEN *d = vd, *n = vn; TYPEM *m = vm; \
^
total: 1 errors, 0 warnings, 438 lines checked
Patch 25/27 has style problems, please review. If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
26/27 Checking commit be0c840de44a (target/arm: Add missing clear_tail calls)
27/27 Checking commit 11ea4f315038 (gdbstub: Send a reply to the vKill packet.)
=== OUTPUT END ===
Test command exited with code: 1
The full log is available at
http://patchew.org/logs/20190214190603.25030-1-peter.maydell@linaro.org/testing.checkpatch/?type=message.
---
Email generated automatically by Patchew [http://patchew.org/].
Please send your feedback to patchew-devel@redhat.com
Patchew URL: https://patchew.org/QEMU/20190214190603.25030-1-peter.maydell@linaro.org/
Hi,
This series seems to have some coding style problems. See output below for
more information:
Message-id: 20190214190603.25030-1-peter.maydell@linaro.org
Subject: [Qemu-devel] [PULL 00/27] target-arm queue
Type: series
=== TEST SCRIPT BEGIN ===
#!/bin/bash
git config --local diff.renamelimit 0
git config --local diff.renames True
git config --local diff.algorithm histogram
./scripts/checkpatch.pl --mailback base..
=== TEST SCRIPT END ===
Updating 3c8cf5a9c21ff8782164d1def7f44bd888713384
From https://github.com/patchew-project/qemu
t [tag update] patchew/20190214190603.25030-1-peter.maydell@linaro.org -> patchew/20190214190603.25030-1-peter.maydell@linaro.org
Switched to a new branch 'test'
1e820f425d gdbstub: Send a reply to the vKill packet.
4b56c889a3 target/arm: Add missing clear_tail calls
e1438456d4 target/arm: Use vector operations for saturation
a14a04e6bd target/arm: Split out FPSCR.QC to a vector field
b9fc85bc9f target/arm: Fix set of bits kept in xregs[ARM_VFP_FPSCR]
29d6aa1c6b target/arm: Split out flags setting from vfp compares
13dc2aabab target/arm: Fix arm_cpu_dump_state vs FPSCR
bc2c229b10 target/arm: Fix vfp_gdb_get/set_reg vs FPSCR
e53cd7d0b7 target/arm: Remove neon min/max helpers
bf7d4d099b target/arm: Use tcg integer min/max primitives for neon
c592edc6dd target/arm: Use vector minmax expanders for aarch32
cb8987e56a target/arm: Use vector minmax expanders for aarch64
f6edfc4342 target/arm: Rely on optimization within tcg_gen_gvec_or
45a5069fad hw/arm/armsse: Fix miswiring of expansion IRQs
eabbdbb6db hw/intc/armv7m_nvic: Allow byte accesses to SHPR1
8f90489124 MAINTAINERS: Remove Peter Crosthwaite from various entries
43cd666a9e arm: Allow system registers for KVM guests to be changed by QEMU code
14ff7ecc19 linux-user/elfload: enable HWCAP_CPUID for AArch64
a3ad95ffd5 target/arm: expose remaining CPUID registers as RAZ
a72a7f23da target/arm: expose MPIDR_EL1 to userspace
5cff3370be target/arm: expose CPUID registers to userspace
56a00d6429 target/arm: relax permission checks for HWCAP_CPUID registers
4d6cbb28c5 target/arm: Restructure disas_fp_int_conv
3a6c8150ed target/arm: Force result size into dp after operation
58d010bbd1 target/arm: Fix int128_make128 lo, hi order in paired_cmpxchg64_be
07c45234c3 target/arm: Implement HACR_EL2
4c11ba7a47 target/arm: Fix CRn to be 14 for PMEVTYPER/PMEVCNTR
=== OUTPUT BEGIN ===
1/27 Checking commit 4c11ba7a474f (target/arm: Fix CRn to be 14 for PMEVTYPER/PMEVCNTR)
2/27 Checking commit 07c45234c380 (target/arm: Implement HACR_EL2)
3/27 Checking commit 58d010bbd1a4 (target/arm: Fix int128_make128 lo, hi order in paired_cmpxchg64_be)
4/27 Checking commit 3a6c8150ed4a (target/arm: Force result size into dp after operation)
5/27 Checking commit 4d6cbb28c5ba (target/arm: Restructure disas_fp_int_conv)
6/27 Checking commit 56a00d6429b0 (target/arm: relax permission checks for HWCAP_CPUID registers)
7/27 Checking commit 5cff3370be15 (target/arm: expose CPUID registers to userspace)
8/27 Checking commit a72a7f23daec (target/arm: expose MPIDR_EL1 to userspace)
9/27 Checking commit a3ad95ffd508 (target/arm: expose remaining CPUID registers as RAZ)
10/27 Checking commit 14ff7ecc19f0 (linux-user/elfload: enable HWCAP_CPUID for AArch64)
11/27 Checking commit 43cd666a9ee0 (arm: Allow system registers for KVM guests to be changed by QEMU code)
12/27 Checking commit 8f9048912404 (MAINTAINERS: Remove Peter Crosthwaite from various entries)
13/27 Checking commit eabbdbb6db70 (hw/intc/armv7m_nvic: Allow byte accesses to SHPR1)
14/27 Checking commit 45a5069fad23 (hw/arm/armsse: Fix miswiring of expansion IRQs)
15/27 Checking commit f6edfc43420c (target/arm: Rely on optimization within tcg_gen_gvec_or)
16/27 Checking commit cb8987e56aae (target/arm: Use vector minmax expanders for aarch64)
17/27 Checking commit c592edc6dd12 (target/arm: Use vector minmax expanders for aarch32)
18/27 Checking commit bf7d4d099b2c (target/arm: Use tcg integer min/max primitives for neon)
19/27 Checking commit e53cd7d0b768 (target/arm: Remove neon min/max helpers)
20/27 Checking commit bc2c229b10ce (target/arm: Fix vfp_gdb_get/set_reg vs FPSCR)
ERROR: trailing statements should be on next line
#25: FILE: target/arm/helper.c:84:
+ case 1: stl_p(buf, vfp_get_fpscr(env)); return 4;
ERROR: trailing statements should be on next line
#34: FILE: target/arm/helper.c:110:
+ case 1: vfp_set_fpscr(env, ldl_p(buf)); return 4;
total: 2 errors, 0 warnings, 16 lines checked
Patch 20/27 has style problems, please review. If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
21/27 Checking commit 13dc2aabab5f (target/arm: Fix arm_cpu_dump_state vs FPSCR)
22/27 Checking commit 29d6aa1c6b90 (target/arm: Split out flags setting from vfp compares)
23/27 Checking commit b9fc85bc9f7a (target/arm: Fix set of bits kept in xregs[ARM_VFP_FPSCR])
24/27 Checking commit a14a04e6bde9 (target/arm: Split out FPSCR.QC to a vector field)
25/27 Checking commit e1438456d444 (target/arm: Use vector operations for saturation)
ERROR: spaces required around that '*' (ctx:WxV)
#360: FILE: target/arm/vec_helper.c:774:
+ TYPEN *d = vd, *n = vn; TYPEM *m = vm; \
^
total: 1 errors, 0 warnings, 438 lines checked
Patch 25/27 has style problems, please review. If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
26/27 Checking commit 4b56c889a3e1 (target/arm: Add missing clear_tail calls)
27/27 Checking commit 1e820f425d28 (gdbstub: Send a reply to the vKill packet.)
=== OUTPUT END ===
Test command exited with code: 1
The full log is available at
http://patchew.org/logs/20190214190603.25030-1-peter.maydell@linaro.org/testing.checkpatch/?type=message.
---
Email generated automatically by Patchew [http://patchew.org/].
Please send your feedback to patchew-devel@redhat.com
Patchew URL: https://patchew.org/QEMU/20190214190603.25030-1-peter.maydell@linaro.org/
Hi,
This series seems to have some coding style problems. See output below for
more information:
Subject: [Qemu-devel] [PULL 00/27] target-arm queue
Message-id: 20190214190603.25030-1-peter.maydell@linaro.org
Type: series
=== TEST SCRIPT BEGIN ===
#!/bin/bash
git config --local diff.renamelimit 0
git config --local diff.renames True
git config --local diff.algorithm histogram
./scripts/checkpatch.pl --mailback base..
=== TEST SCRIPT END ===
Updating 3c8cf5a9c21ff8782164d1def7f44bd888713384
From https://github.com/patchew-project/qemu
- [tag update] patchew/20190214190603.25030-1-peter.maydell@linaro.org -> patchew/20190214190603.25030-1-peter.maydell@linaro.org
Submodule 'capstone' (https://git.qemu.org/git/capstone.git) registered for path 'capstone'
Submodule 'dtc' (https://git.qemu.org/git/dtc.git) registered for path 'dtc'
Submodule 'roms/QemuMacDrivers' (https://git.qemu.org/git/QemuMacDrivers.git) registered for path 'roms/QemuMacDrivers'
Submodule 'roms/SLOF' (https://git.qemu.org/git/SLOF.git) registered for path 'roms/SLOF'
Submodule 'roms/ipxe' (https://git.qemu.org/git/ipxe.git) registered for path 'roms/ipxe'
Submodule 'roms/openbios' (https://git.qemu.org/git/openbios.git) registered for path 'roms/openbios'
Submodule 'roms/openhackware' (https://git.qemu.org/git/openhackware.git) registered for path 'roms/openhackware'
Submodule 'roms/qemu-palcode' (https://git.qemu.org/git/qemu-palcode.git) registered for path 'roms/qemu-palcode'
Submodule 'roms/seabios' (https://git.qemu.org/git/seabios.git/) registered for path 'roms/seabios'
Submodule 'roms/seabios-hppa' (https://github.com/hdeller/seabios-hppa.git) registered for path 'roms/seabios-hppa'
Submodule 'roms/sgabios' (https://git.qemu.org/git/sgabios.git) registered for path 'roms/sgabios'
Submodule 'roms/skiboot' (https://git.qemu.org/git/skiboot.git) registered for path 'roms/skiboot'
Submodule 'roms/u-boot' (https://git.qemu.org/git/u-boot.git) registered for path 'roms/u-boot'
Submodule 'roms/u-boot-sam460ex' (https://git.qemu.org/git/u-boot-sam460ex.git) registered for path 'roms/u-boot-sam460ex'
Submodule 'tests/fp/berkeley-softfloat-3' (https://github.com/cota/berkeley-softfloat-3) registered for path 'tests/fp/berkeley-softfloat-3'
Submodule 'tests/fp/berkeley-testfloat-3' (https://github.com/cota/berkeley-testfloat-3) registered for path 'tests/fp/berkeley-testfloat-3'
Submodule 'ui/keycodemapdb' (https://git.qemu.org/git/keycodemapdb.git) registered for path 'ui/keycodemapdb'
Cloning into 'capstone'...
Submodule path 'capstone': checked out '22ead3e0bfdb87516656453336160e0a37b066bf'
Cloning into 'dtc'...
Submodule path 'dtc': checked out '88f18909db731a627456f26d779445f84e449536'
Cloning into 'roms/QemuMacDrivers'...
Submodule path 'roms/QemuMacDrivers': checked out '90c488d5f4a407342247b9ea869df1c2d9c8e266'
Cloning into 'roms/SLOF'...
Submodule path 'roms/SLOF': checked out 'a5b428e1c1eae703bdd62a3f527223c291ee3fdc'
Cloning into 'roms/ipxe'...
Submodule path 'roms/ipxe': checked out 'de4565cbe76ea9f7913a01f331be3ee901bb6e17'
Cloning into 'roms/openbios'...
Submodule path 'roms/openbios': checked out '441a84d3a642a10b948369c63f32367e8ff6395b'
Cloning into 'roms/openhackware'...
Submodule path 'roms/openhackware': checked out 'c559da7c8eec5e45ef1f67978827af6f0b9546f5'
Cloning into 'roms/qemu-palcode'...
Submodule path 'roms/qemu-palcode': checked out '51c237d7e20d05100eacadee2f61abc17e6bc097'
Cloning into 'roms/seabios'...
Submodule path 'roms/seabios': checked out 'a698c8995ffb2838296ec284fe3c4ad33dfca307'
Cloning into 'roms/seabios-hppa'...
Submodule path 'roms/seabios-hppa': checked out '1ef99a01572c2581c30e16e6fe69e9ea2ef92ce0'
Cloning into 'roms/sgabios'...
Submodule path 'roms/sgabios': checked out 'cbaee52287e5f32373181cff50a00b6c4ac9015a'
Cloning into 'roms/skiboot'...
Submodule path 'roms/skiboot': checked out 'e0ee24c27a172bcf482f6f2bc905e6211c134bcc'
Cloning into 'roms/u-boot'...
Submodule path 'roms/u-boot': checked out 'd85ca029f257b53a96da6c2fb421e78a003a9943'
Cloning into 'roms/u-boot-sam460ex'...
Submodule path 'roms/u-boot-sam460ex': checked out '60b3916f33e617a815973c5a6df77055b2e3a588'
Cloning into 'tests/fp/berkeley-softfloat-3'...
Submodule path 'tests/fp/berkeley-softfloat-3': checked out 'b64af41c3276f97f0e181920400ee056b9c88037'
Cloning into 'tests/fp/berkeley-testfloat-3'...
Submodule path 'tests/fp/berkeley-testfloat-3': checked out '5a59dcec19327396a011a17fd924aed4fec416b3'
Cloning into 'ui/keycodemapdb'...
Submodule path 'ui/keycodemapdb': checked out '6b3d716e2b6472eb7189d3220552280ef3d832ce'
Switched to a new branch 'test'
1e820f4 gdbstub: Send a reply to the vKill packet.
4b56c88 target/arm: Add missing clear_tail calls
e143845 target/arm: Use vector operations for saturation
a14a04e target/arm: Split out FPSCR.QC to a vector field
b9fc85b target/arm: Fix set of bits kept in xregs[ARM_VFP_FPSCR]
29d6aa1 target/arm: Split out flags setting from vfp compares
13dc2aa target/arm: Fix arm_cpu_dump_state vs FPSCR
bc2c229 target/arm: Fix vfp_gdb_get/set_reg vs FPSCR
e53cd7d target/arm: Remove neon min/max helpers
bf7d4d0 target/arm: Use tcg integer min/max primitives for neon
c592edc target/arm: Use vector minmax expanders for aarch32
cb8987e target/arm: Use vector minmax expanders for aarch64
f6edfc4 target/arm: Rely on optimization within tcg_gen_gvec_or
45a5069 hw/arm/armsse: Fix miswiring of expansion IRQs
eabbdbb hw/intc/armv7m_nvic: Allow byte accesses to SHPR1
8f90489 MAINTAINERS: Remove Peter Crosthwaite from various entries
43cd666 arm: Allow system registers for KVM guests to be changed by QEMU code
14ff7ec linux-user/elfload: enable HWCAP_CPUID for AArch64
a3ad95f target/arm: expose remaining CPUID registers as RAZ
a72a7f2 target/arm: expose MPIDR_EL1 to userspace
5cff337 target/arm: expose CPUID registers to userspace
56a00d6 target/arm: relax permission checks for HWCAP_CPUID registers
4d6cbb2 target/arm: Restructure disas_fp_int_conv
3a6c815 target/arm: Force result size into dp after operation
58d010b target/arm: Fix int128_make128 lo, hi order in paired_cmpxchg64_be
07c4523 target/arm: Implement HACR_EL2
4c11ba7 target/arm: Fix CRn to be 14 for PMEVTYPER/PMEVCNTR
=== OUTPUT BEGIN ===
1/27 Checking commit 4c11ba7a474f (target/arm: Fix CRn to be 14 for PMEVTYPER/PMEVCNTR)
2/27 Checking commit 07c45234c380 (target/arm: Implement HACR_EL2)
3/27 Checking commit 58d010bbd1a4 (target/arm: Fix int128_make128 lo, hi order in paired_cmpxchg64_be)
4/27 Checking commit 3a6c8150ed4a (target/arm: Force result size into dp after operation)
5/27 Checking commit 4d6cbb28c5ba (target/arm: Restructure disas_fp_int_conv)
6/27 Checking commit 56a00d6429b0 (target/arm: relax permission checks for HWCAP_CPUID registers)
7/27 Checking commit 5cff3370be15 (target/arm: expose CPUID registers to userspace)
8/27 Checking commit a72a7f23daec (target/arm: expose MPIDR_EL1 to userspace)
9/27 Checking commit a3ad95ffd508 (target/arm: expose remaining CPUID registers as RAZ)
10/27 Checking commit 14ff7ecc19f0 (linux-user/elfload: enable HWCAP_CPUID for AArch64)
11/27 Checking commit 43cd666a9ee0 (arm: Allow system registers for KVM guests to be changed by QEMU code)
12/27 Checking commit 8f9048912404 (MAINTAINERS: Remove Peter Crosthwaite from various entries)
13/27 Checking commit eabbdbb6db70 (hw/intc/armv7m_nvic: Allow byte accesses to SHPR1)
14/27 Checking commit 45a5069fad23 (hw/arm/armsse: Fix miswiring of expansion IRQs)
15/27 Checking commit f6edfc43420c (target/arm: Rely on optimization within tcg_gen_gvec_or)
16/27 Checking commit cb8987e56aae (target/arm: Use vector minmax expanders for aarch64)
17/27 Checking commit c592edc6dd12 (target/arm: Use vector minmax expanders for aarch32)
18/27 Checking commit bf7d4d099b2c (target/arm: Use tcg integer min/max primitives for neon)
19/27 Checking commit e53cd7d0b768 (target/arm: Remove neon min/max helpers)
20/27 Checking commit bc2c229b10ce (target/arm: Fix vfp_gdb_get/set_reg vs FPSCR)
ERROR: trailing statements should be on next line
#25: FILE: target/arm/helper.c:84:
+ case 1: stl_p(buf, vfp_get_fpscr(env)); return 4;
ERROR: trailing statements should be on next line
#34: FILE: target/arm/helper.c:110:
+ case 1: vfp_set_fpscr(env, ldl_p(buf)); return 4;
total: 2 errors, 0 warnings, 16 lines checked
Patch 20/27 has style problems, please review. If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
21/27 Checking commit 13dc2aabab5f (target/arm: Fix arm_cpu_dump_state vs FPSCR)
22/27 Checking commit 29d6aa1c6b90 (target/arm: Split out flags setting from vfp compares)
23/27 Checking commit b9fc85bc9f7a (target/arm: Fix set of bits kept in xregs[ARM_VFP_FPSCR])
24/27 Checking commit a14a04e6bde9 (target/arm: Split out FPSCR.QC to a vector field)
25/27 Checking commit e1438456d444 (target/arm: Use vector operations for saturation)
ERROR: spaces required around that '*' (ctx:WxV)
#360: FILE: target/arm/vec_helper.c:774:
+ TYPEN *d = vd, *n = vn; TYPEM *m = vm; \
^
total: 1 errors, 0 warnings, 438 lines checked
Patch 25/27 has style problems, please review. If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
26/27 Checking commit 4b56c889a3e1 (target/arm: Add missing clear_tail calls)
27/27 Checking commit 1e820f425d28 (gdbstub: Send a reply to the vKill packet.)
=== OUTPUT END ===
Test command exited with code: 1
The full log is available at
http://patchew.org/logs/20190214190603.25030-1-peter.maydell@linaro.org/testing.checkpatch/?type=message.
---
Email generated automatically by Patchew [http://patchew.org/].
Please send your feedback to patchew-devel@redhat.com
Patchew URL: https://patchew.org/QEMU/20190214190603.25030-1-peter.maydell@linaro.org/
Hi,
This series seems to have some coding style problems. See output below for
more information:
Message-id: 20190214190603.25030-1-peter.maydell@linaro.org
Subject: [Qemu-devel] [PULL 00/27] target-arm queue
Type: series
=== TEST SCRIPT BEGIN ===
#!/bin/bash
git config --local diff.renamelimit 0
git config --local diff.renames True
git config --local diff.algorithm histogram
./scripts/checkpatch.pl --mailback base..
=== TEST SCRIPT END ===
Updating 3c8cf5a9c21ff8782164d1def7f44bd888713384
From https://github.com/patchew-project/qemu
t [tag update] patchew/20190214190603.25030-1-peter.maydell@linaro.org -> patchew/20190214190603.25030-1-peter.maydell@linaro.org
Switched to a new branch 'test'
6035ee1d0b gdbstub: Send a reply to the vKill packet.
6abc10e3cf target/arm: Add missing clear_tail calls
3b446a483a target/arm: Use vector operations for saturation
5ae122d95f target/arm: Split out FPSCR.QC to a vector field
dcf4734824 target/arm: Fix set of bits kept in xregs[ARM_VFP_FPSCR]
93f672cd3e target/arm: Split out flags setting from vfp compares
a4923fb2a2 target/arm: Fix arm_cpu_dump_state vs FPSCR
59b60a009c target/arm: Fix vfp_gdb_get/set_reg vs FPSCR
2d72031bc3 target/arm: Remove neon min/max helpers
0dc3071aa6 target/arm: Use tcg integer min/max primitives for neon
12249be0d4 target/arm: Use vector minmax expanders for aarch32
210b86c4d0 target/arm: Use vector minmax expanders for aarch64
ec442a042e target/arm: Rely on optimization within tcg_gen_gvec_or
ec303c3244 hw/arm/armsse: Fix miswiring of expansion IRQs
8a6530ed11 hw/intc/armv7m_nvic: Allow byte accesses to SHPR1
375c511d5e MAINTAINERS: Remove Peter Crosthwaite from various entries
2a062aa5d8 arm: Allow system registers for KVM guests to be changed by QEMU code
fde061cf2a linux-user/elfload: enable HWCAP_CPUID for AArch64
345f47dc8b target/arm: expose remaining CPUID registers as RAZ
b96e5b9001 target/arm: expose MPIDR_EL1 to userspace
06c582053e target/arm: expose CPUID registers to userspace
8aeda9f436 target/arm: relax permission checks for HWCAP_CPUID registers
e3ceeef98a target/arm: Restructure disas_fp_int_conv
49958fb0df target/arm: Force result size into dp after operation
fc1287b91f target/arm: Fix int128_make128 lo, hi order in paired_cmpxchg64_be
fa29b1076a target/arm: Implement HACR_EL2
95fcc314e3 target/arm: Fix CRn to be 14 for PMEVTYPER/PMEVCNTR
=== OUTPUT BEGIN ===
1/27 Checking commit 95fcc314e34d (target/arm: Fix CRn to be 14 for PMEVTYPER/PMEVCNTR)
2/27 Checking commit fa29b1076a08 (target/arm: Implement HACR_EL2)
3/27 Checking commit fc1287b91f25 (target/arm: Fix int128_make128 lo, hi order in paired_cmpxchg64_be)
4/27 Checking commit 49958fb0df5d (target/arm: Force result size into dp after operation)
5/27 Checking commit e3ceeef98ab2 (target/arm: Restructure disas_fp_int_conv)
6/27 Checking commit 8aeda9f436db (target/arm: relax permission checks for HWCAP_CPUID registers)
7/27 Checking commit 06c582053ec6 (target/arm: expose CPUID registers to userspace)
8/27 Checking commit b96e5b900130 (target/arm: expose MPIDR_EL1 to userspace)
9/27 Checking commit 345f47dc8bac (target/arm: expose remaining CPUID registers as RAZ)
10/27 Checking commit fde061cf2ae3 (linux-user/elfload: enable HWCAP_CPUID for AArch64)
11/27 Checking commit 2a062aa5d85a (arm: Allow system registers for KVM guests to be changed by QEMU code)
12/27 Checking commit 375c511d5ef0 (MAINTAINERS: Remove Peter Crosthwaite from various entries)
13/27 Checking commit 8a6530ed11d6 (hw/intc/armv7m_nvic: Allow byte accesses to SHPR1)
14/27 Checking commit ec303c324426 (hw/arm/armsse: Fix miswiring of expansion IRQs)
15/27 Checking commit ec442a042e1b (target/arm: Rely on optimization within tcg_gen_gvec_or)
16/27 Checking commit 210b86c4d0a5 (target/arm: Use vector minmax expanders for aarch64)
17/27 Checking commit 12249be0d48f (target/arm: Use vector minmax expanders for aarch32)
18/27 Checking commit 0dc3071aa652 (target/arm: Use tcg integer min/max primitives for neon)
19/27 Checking commit 2d72031bc357 (target/arm: Remove neon min/max helpers)
20/27 Checking commit 59b60a009c37 (target/arm: Fix vfp_gdb_get/set_reg vs FPSCR)
ERROR: trailing statements should be on next line
#25: FILE: target/arm/helper.c:84:
+ case 1: stl_p(buf, vfp_get_fpscr(env)); return 4;
ERROR: trailing statements should be on next line
#34: FILE: target/arm/helper.c:110:
+ case 1: vfp_set_fpscr(env, ldl_p(buf)); return 4;
total: 2 errors, 0 warnings, 16 lines checked
Patch 20/27 has style problems, please review. If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
21/27 Checking commit a4923fb2a25e (target/arm: Fix arm_cpu_dump_state vs FPSCR)
22/27 Checking commit 93f672cd3e36 (target/arm: Split out flags setting from vfp compares)
23/27 Checking commit dcf4734824cb (target/arm: Fix set of bits kept in xregs[ARM_VFP_FPSCR])
24/27 Checking commit 5ae122d95fb6 (target/arm: Split out FPSCR.QC to a vector field)
25/27 Checking commit 3b446a483a40 (target/arm: Use vector operations for saturation)
ERROR: spaces required around that '*' (ctx:WxV)
#360: FILE: target/arm/vec_helper.c:774:
+ TYPEN *d = vd, *n = vn; TYPEM *m = vm; \
^
total: 1 errors, 0 warnings, 438 lines checked
Patch 25/27 has style problems, please review. If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
26/27 Checking commit 6abc10e3cfa5 (target/arm: Add missing clear_tail calls)
27/27 Checking commit 6035ee1d0be8 (gdbstub: Send a reply to the vKill packet.)
=== OUTPUT END ===
Test command exited with code: 1
The full log is available at
http://patchew.org/logs/20190214190603.25030-1-peter.maydell@linaro.org/testing.checkpatch/?type=message.
---
Email generated automatically by Patchew [http://patchew.org/].
Please send your feedback to patchew-devel@redhat.com
Patchew URL: https://patchew.org/QEMU/20190214190603.25030-1-peter.maydell@linaro.org/
Hi,
This series seems to have some coding style problems. See output below for
more information:
Message-id: 20190214190603.25030-1-peter.maydell@linaro.org
Subject: [Qemu-devel] [PULL 00/27] target-arm queue
Type: series
=== TEST SCRIPT BEGIN ===
#!/bin/bash
git config --local diff.renamelimit 0
git config --local diff.renames True
git config --local diff.algorithm histogram
./scripts/checkpatch.pl --mailback base..
=== TEST SCRIPT END ===
Updating 3c8cf5a9c21ff8782164d1def7f44bd888713384
From https://github.com/patchew-project/qemu
t [tag update] patchew/20190214190603.25030-1-peter.maydell@linaro.org -> patchew/20190214190603.25030-1-peter.maydell@linaro.org
Switched to a new branch 'test'
79f823dd50 gdbstub: Send a reply to the vKill packet.
54055c690e target/arm: Add missing clear_tail calls
256e4557f2 target/arm: Use vector operations for saturation
dac47f6b64 target/arm: Split out FPSCR.QC to a vector field
dffbd3cd1b target/arm: Fix set of bits kept in xregs[ARM_VFP_FPSCR]
003ad968a8 target/arm: Split out flags setting from vfp compares
8e2cdb45d1 target/arm: Fix arm_cpu_dump_state vs FPSCR
c6859c1a84 target/arm: Fix vfp_gdb_get/set_reg vs FPSCR
6a0a150b2d target/arm: Remove neon min/max helpers
ced3d5e3d9 target/arm: Use tcg integer min/max primitives for neon
0f1a572c84 target/arm: Use vector minmax expanders for aarch32
66e0205bc3 target/arm: Use vector minmax expanders for aarch64
2ce0e8773f target/arm: Rely on optimization within tcg_gen_gvec_or
6bd399ef3d hw/arm/armsse: Fix miswiring of expansion IRQs
ee3a0f2e15 hw/intc/armv7m_nvic: Allow byte accesses to SHPR1
f2bd89cfd3 MAINTAINERS: Remove Peter Crosthwaite from various entries
0d2f803513 arm: Allow system registers for KVM guests to be changed by QEMU code
8d7c1af9f3 linux-user/elfload: enable HWCAP_CPUID for AArch64
87d553b62c target/arm: expose remaining CPUID registers as RAZ
2296abadfb target/arm: expose MPIDR_EL1 to userspace
682347fb9e target/arm: expose CPUID registers to userspace
61e1e876ae target/arm: relax permission checks for HWCAP_CPUID registers
a03d01166b target/arm: Restructure disas_fp_int_conv
49c75fb14d target/arm: Force result size into dp after operation
b311548ce5 target/arm: Fix int128_make128 lo, hi order in paired_cmpxchg64_be
6d9154655f target/arm: Implement HACR_EL2
b6a2f6e7d0 target/arm: Fix CRn to be 14 for PMEVTYPER/PMEVCNTR
=== OUTPUT BEGIN ===
1/27 Checking commit b6a2f6e7d009 (target/arm: Fix CRn to be 14 for PMEVTYPER/PMEVCNTR)
2/27 Checking commit 6d9154655f8f (target/arm: Implement HACR_EL2)
3/27 Checking commit b311548ce515 (target/arm: Fix int128_make128 lo, hi order in paired_cmpxchg64_be)
4/27 Checking commit 49c75fb14d08 (target/arm: Force result size into dp after operation)
5/27 Checking commit a03d01166b02 (target/arm: Restructure disas_fp_int_conv)
6/27 Checking commit 61e1e876ae47 (target/arm: relax permission checks for HWCAP_CPUID registers)
7/27 Checking commit 682347fb9e39 (target/arm: expose CPUID registers to userspace)
8/27 Checking commit 2296abadfb9a (target/arm: expose MPIDR_EL1 to userspace)
9/27 Checking commit 87d553b62c30 (target/arm: expose remaining CPUID registers as RAZ)
10/27 Checking commit 8d7c1af9f3f9 (linux-user/elfload: enable HWCAP_CPUID for AArch64)
11/27 Checking commit 0d2f8035130d (arm: Allow system registers for KVM guests to be changed by QEMU code)
12/27 Checking commit f2bd89cfd3fb (MAINTAINERS: Remove Peter Crosthwaite from various entries)
13/27 Checking commit ee3a0f2e1566 (hw/intc/armv7m_nvic: Allow byte accesses to SHPR1)
14/27 Checking commit 6bd399ef3d57 (hw/arm/armsse: Fix miswiring of expansion IRQs)
15/27 Checking commit 2ce0e8773f22 (target/arm: Rely on optimization within tcg_gen_gvec_or)
16/27 Checking commit 66e0205bc37e (target/arm: Use vector minmax expanders for aarch64)
17/27 Checking commit 0f1a572c8401 (target/arm: Use vector minmax expanders for aarch32)
18/27 Checking commit ced3d5e3d9eb (target/arm: Use tcg integer min/max primitives for neon)
19/27 Checking commit 6a0a150b2da5 (target/arm: Remove neon min/max helpers)
20/27 Checking commit c6859c1a849d (target/arm: Fix vfp_gdb_get/set_reg vs FPSCR)
ERROR: trailing statements should be on next line
#25: FILE: target/arm/helper.c:84:
+ case 1: stl_p(buf, vfp_get_fpscr(env)); return 4;
ERROR: trailing statements should be on next line
#34: FILE: target/arm/helper.c:110:
+ case 1: vfp_set_fpscr(env, ldl_p(buf)); return 4;
total: 2 errors, 0 warnings, 16 lines checked
Patch 20/27 has style problems, please review. If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
21/27 Checking commit 8e2cdb45d186 (target/arm: Fix arm_cpu_dump_state vs FPSCR)
22/27 Checking commit 003ad968a808 (target/arm: Split out flags setting from vfp compares)
23/27 Checking commit dffbd3cd1b4d (target/arm: Fix set of bits kept in xregs[ARM_VFP_FPSCR])
24/27 Checking commit dac47f6b645f (target/arm: Split out FPSCR.QC to a vector field)
25/27 Checking commit 256e4557f2e8 (target/arm: Use vector operations for saturation)
ERROR: spaces required around that '*' (ctx:WxV)
#360: FILE: target/arm/vec_helper.c:774:
+ TYPEN *d = vd, *n = vn; TYPEM *m = vm; \
^
total: 1 errors, 0 warnings, 438 lines checked
Patch 25/27 has style problems, please review. If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
26/27 Checking commit 54055c690e1f (target/arm: Add missing clear_tail calls)
27/27 Checking commit 79f823dd5021 (gdbstub: Send a reply to the vKill packet.)
=== OUTPUT END ===
Test command exited with code: 1
The full log is available at
http://patchew.org/logs/20190214190603.25030-1-peter.maydell@linaro.org/testing.checkpatch/?type=message.
---
Email generated automatically by Patchew [http://patchew.org/].
Please send your feedback to patchew-devel@redhat.com
The following changes since commit 0d3e41d5efd638a0c5682f6813b26448c3c51624: Merge remote-tracking branch 'remotes/vivier2/tags/trivial-branch-pull-request' into staging (2019-02-14 17:42:25 +0000) are available in the Git repository at: https://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20190214 for you to fetch changes up to 497bc12b1b374ecd62903bf062229bd93f8924af: gdbstub: Send a reply to the vKill packet. (2019-02-14 18:45:49 +0000) ---------------------------------------------------------------- target-arm queue: * gdbstub: Send a reply to the vKill packet * Improve codegen for neon min/max and saturating arithmetic * Fix a bug in clearing FPSCR exception status bits * hw/arm/armsse: Fix miswiring of expansion IRQs * hw/intc/armv7m_nvic: Allow byte accesses to SHPR1 * MAINTAINERS: Remove Peter Crosthwaite from various entries * arm: Allow system registers for KVM guests to be changed by QEMU code * linux-user: support HWCAP_CPUID which exposes ID registers to user code * Fix bug in 128-bit cmpxchg for BE Arm guests * Implement (no-op) HACR_EL2 * Fix CRn to be 14 for PMEVTYPER/PMEVCNTR ---------------------------------------------------------------- Aaron Lindsay OS (1): target/arm: Fix CRn to be 14 for PMEVTYPER/PMEVCNTR Alex Bennée (5): target/arm: relax permission checks for HWCAP_CPUID registers target/arm: expose CPUID registers to userspace target/arm: expose MPIDR_EL1 to userspace target/arm: expose remaining CPUID registers as RAZ linux-user/elfload: enable HWCAP_CPUID for AArch64 Catherine Ho (1): target/arm: Fix int128_make128 lo, hi order in paired_cmpxchg64_be Peter Maydell (5): target/arm: Implement HACR_EL2 arm: Allow system registers for KVM guests to be changed by QEMU code MAINTAINERS: Remove Peter Crosthwaite from various entries hw/intc/armv7m_nvic: Allow byte accesses to SHPR1 hw/arm/armsse: Fix miswiring of expansion IRQs Richard Henderson (14): target/arm: Force result size into dp after operation target/arm: Restructure disas_fp_int_conv target/arm: Rely on optimization within tcg_gen_gvec_or target/arm: Use vector minmax expanders for aarch64 target/arm: Use vector minmax expanders for aarch32 target/arm: Use tcg integer min/max primitives for neon target/arm: Remove neon min/max helpers target/arm: Fix vfp_gdb_get/set_reg vs FPSCR target/arm: Fix arm_cpu_dump_state vs FPSCR target/arm: Split out flags setting from vfp compares target/arm: Fix set of bits kept in xregs[ARM_VFP_FPSCR] target/arm: Split out FPSCR.QC to a vector field target/arm: Use vector operations for saturation target/arm: Add missing clear_tail calls Sandra Loosemore (1): gdbstub: Send a reply to the vKill packet. target/arm/cpu.h | 50 ++++++++- target/arm/helper.h | 45 +++++--- target/arm/translate.h | 4 + gdbstub.c | 1 + hw/arm/armsse.c | 2 +- hw/intc/armv7m_nvic.c | 4 +- linux-user/elfload.c | 1 + target/arm/helper-a64.c | 4 +- target/arm/helper.c | 228 ++++++++++++++++++++++++++++++++-------- target/arm/kvm32.c | 20 +--- target/arm/kvm64.c | 2 + target/arm/machine.c | 2 +- target/arm/neon_helper.c | 14 +-- target/arm/translate-a64.c | 171 +++++++++++++++--------------- target/arm/translate-sve.c | 6 +- target/arm/translate.c | 251 ++++++++++++++++++++++++++++++++++----------- target/arm/vec_helper.c | 134 +++++++++++++++++++++++- MAINTAINERS | 4 - 18 files changed, 687 insertions(+), 256 deletions(-)