From patchwork Fri Aug 28 14:18:13 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 248510 Delivered-To: patch@linaro.org Received: by 2002:a92:5b9c:0:0:0:0:0 with SMTP id c28csp1122999ilg; Fri, 28 Aug 2020 07:20:16 -0700 (PDT) X-Google-Smtp-Source: ABdhPJzmgOHNtBTutnPBKlDHZM2dSjH2piVnzYWBlVKgKSAQucsN0Npl2Bx8yN4NfvIZVTVkmNhj X-Received: by 2002:a67:8c89:: with SMTP id o131mr1145967vsd.41.1598624416164; Fri, 28 Aug 2020 07:20:16 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1598624416; cv=none; d=google.com; s=arc-20160816; b=wFFgauKrdnIOZSDwOXSA1uy0XUOt2RzzjBSKuo+pRBvp4wbzmeV2bdCF73Y6Vegwwj S+HOfT/+hBALnyliFNpOgeila1bzLsiWGWbazICJ9D2+OPUaQGRinpXGU1BsFz1kdkxh f5W8DIg3oKK7wKhb4KgBts7SuOs6mTHVYH9UlVizUlyS6suhunhE5nV2fPv1LoCks7Zf VydQD2Sz2iv5b7TUP21m/+uCLNPOO337EpJ3zYF/TWne/1w+dJ0ZyF3faF2Rocfg3EGh FgLS3k0doF+0nxWEpg+5hZRnsZo/xTTPbEPT/THp+uFllaHFIZ9pbhU1zgU1CF78xzUf W+nQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:message-id:date:subject:to:from:dkim-signature; bh=KWXiiLPamFSccIBlH9C38JtqLfc5JncB46HJfEEr/R0=; b=Tc2k+L1q7jTaKtWdrz2klZUmRq3CwjQcv6vycINmXpxdk4cuWxt5C0Pp+xAdF1CA9D xlRNAcdr3g70vYDJhAAmr0PC01VtgN/nCf4ABxCMLnJQyeZgMUQQymNaoYS9D2SyW0Yo Xs8MbMKy2Fkn9qfwN2sebwrO2gcCHMRiLDt6MwtwlVSDg5UvB84V0fDHJIcHnIo1HoEX I3c3eS8TDRVjdtkg0ng9V1A3CBvOrfpdsur0Qsz5e5TEKPcs/Q879wccnJsIQy/IjRgg PNXmIav09xA8IunncEsfUPaJISvegQQks5U5rZEllpV2HzuezPoOxSfnPBLW6zmxRQAn jWsQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=PW3sdElr; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id 107si219970uag.158.2020.08.28.07.20.16 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Fri, 28 Aug 2020 07:20:16 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=PW3sdElr; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1]:47982 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1kBfEl-0007qZ-Es for patch@linaro.org; Fri, 28 Aug 2020 10:20:15 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:50752) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1kBfE8-0007of-Og for qemu-devel@nongnu.org; Fri, 28 Aug 2020 10:19:36 -0400 Received: from mail-pf1-x430.google.com ([2607:f8b0:4864:20::430]:38387) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1kBfE5-00050x-Sm for qemu-devel@nongnu.org; Fri, 28 Aug 2020 10:19:36 -0400 Received: by mail-pf1-x430.google.com with SMTP id d22so737542pfn.5 for ; Fri, 28 Aug 2020 07:19:33 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=KWXiiLPamFSccIBlH9C38JtqLfc5JncB46HJfEEr/R0=; b=PW3sdElrR1hmm59q/c7P8ewtEj4Mpej7pQiBsyeJ8GyH2D6MyFj1HFOPAdzBlm5siI wdWxb81EYSjO6KXsy/EmiZvPAlLin9po/184F4x8ayUztzKeAvbjEx6twTR7qc8S3Vrs /6zt3VJ+OiGgXUZ8ml9r+6hfc4WE/z5uUjvl9qfoekI28uEOiJk9Vfzt0MyVNVhA6M7a wyfFF9KUaT7O9M8H71K2Ub+Pdzbatdpcc9sbvPtCLaavojAvxkcxd0QBL0j0dHuLe6Ma p58acV9cAoYg4dLYlHe+Hr4m5jrhRRth2DjlL85ZlFQnvKdeIMZedbFr40oR7eN5QfMI nZyw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=KWXiiLPamFSccIBlH9C38JtqLfc5JncB46HJfEEr/R0=; b=DOr1STDS/bGg0uSwR46XNDzk1LFPYlM7GkPko5IWzeaLWPV4qUK+mb6m7/3rgND+X6 vDdcOMErSUMR/LHCUrChFximyT+UN++xu1VhSL2pDGd3pDcjTdaQdbwZAtntx32yOezK 7dqFaDqWr04AgZk/qzLN9LkICMzzAtBQnU8XHjUgHiN4XJ1praHIokeqqRs5qGjkyFW5 O/OPv4REqnrUlmZpedMVzVRX5B+5c/6pc07Adg7vjxyv/ULehwOf/204TWHJDL1Sj5JF IHwPal4uWy+7I3w2ij/AvCSDWFqQRLF0YDJcP9Vhn1oTatOZhhDgISCcaH+1fu/8D2F5 8wWA== X-Gm-Message-State: AOAM533nb4GMZiazsagpMbVK0JQlK3YmskwjVU/txng53G4fIjkpjoT+ xTKHhtq3W0A7wzCvyPqj5uJr5r2L9zwTYA== X-Received: by 2002:a65:568b:: with SMTP id v11mr1406823pgs.396.1598624371303; Fri, 28 Aug 2020 07:19:31 -0700 (PDT) Received: from localhost.localdomain ([71.212.141.89]) by smtp.gmail.com with ESMTPSA id j3sm1403080pjw.23.2020.08.28.07.19.30 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 28 Aug 2020 07:19:30 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v2 00/76] target/microblaze improvements Date: Fri, 28 Aug 2020 07:18:13 -0700 Message-Id: <20200828141929.77854-1-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::430; envelope-from=richard.henderson@linaro.org; helo=mail-pf1-x430.google.com X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. That's all we know. X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: edgar.iglesias@xilinx.com Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Thanks for all the testing and review, Edgar. Changes in v2: * Restored opcode_0_illegal handling. * Dropped problematic imm/delay slot tb extension. * Dropped tcg_gen_lookup_and_goto_ptr for now. * Added fix for mb_cpu_transaction_failed. * Removed microblaze-decode.h with old decoder. * Removed abort_at_next_insn with old decoder. * Fixed mbar. * Fixed put. r~ Richard Henderson (76): tests/tcg: Add microblaze to arches filter tests/tcg: Do not require FE_TOWARDZERO tests/tcg: Do not require FE_* exception bits target/microblaze: Tidy gdbstub target/microblaze: Split out PC from env->sregs target/microblaze: Split out MSR from env->sregs target/microblaze: Split out EAR from env->sregs target/microblaze: Split out ESR from env->sregs target/microblaze: Split out FSR from env->sregs target/microblaze: Split out BTR from env->sregs target/microblaze: Split out EDR from env->sregs target/microblaze: Split the cpu_SR array target/microblaze: Fix width of PC and BTARGET target/microblaze: Fix width of MSR target/microblaze: Fix width of ESR target/microblaze: Fix width of FSR target/microblaze: Fix width of BTR target/microblaze: Fix width of EDR target/microblaze: Remove cpu_ear target/microblaze: Tidy raising of exceptions target/microblaze: Mark raise_exception as noreturn target/microblaze: Remove helper_debug and env->debug target/microblaze: Rename env_* tcg variables to cpu_* target/microblaze: Tidy mb_tcg_init target/microblaze: Split out MSR[C] to its own variable target/microblaze: Use DISAS_NORETURN target/microblaze: Check singlestep_enabled in gen_goto_tb target/microblaze: Convert to DisasContextBase target/microblaze: Convert to translator_loop target/microblaze: Remove SIM_COMPAT target/microblaze: Remove DISAS_GNU target/microblaze: Remove empty D macros target/microblaze: Remove LOG_DIS target/microblaze: Ensure imm constant is always available target/microblaze: Add decodetree infrastructure target/microblaze: Convert dec_add to decodetree target/microblaze: Convert dec_sub to decodetree target/microblaze: Implement cmp and cmpu inline target/microblaze: Convert dec_pattern to decodetree target/microblaze: Convert dec_and, dec_or, dec_xor to decodetree target/microblaze: Convert dec_mul to decodetree target/microblaze: Convert dec_div to decodetree target/microblaze: Unwind properly when raising divide-by-zero target/microblaze: Convert dec_bit to decodetree target/microblaze: Convert dec_barrel to decodetree target/microblaze: Convert dec_imm to decodetree target/microblaze: Convert dec_fpu to decodetree target/microblaze: Fix cpu unwind for fpu exceptions target/microblaze: Mark fpu helpers TCG_CALL_NO_WG target/microblaze: Replace MSR_EE_FLAG with MSR_EE target/microblaze: Cache mem_index in DisasContext target/microblaze: Fix cpu unwind for stackprot target/microblaze: Convert dec_load and dec_store to decodetree target/microblaze: Assert no overlap in flags making up tb_flags target/microblaze: Move bimm to BIMM_FLAG target/microblaze: Fix no-op mb_cpu_transaction_failed target/microblaze: Store "current" iflags in insn_start tcg: Add tcg_get_insn_start_param target/microblaze: Use cc->do_unaligned_access target/microblaze: Replace clear_imm with tb_flags_to_set target/microblaze: Replace delayed_branch with tb_flags_to_set target/microblaze: Tidy mb_cpu_dump_state target/microblaze: Convert brk and brki to decodetree target/microblaze: Convert mbar to decodetree target/microblaze: Reorganize branching target/microblaze: Convert dec_br to decodetree target/microblaze: Convert dec_bcc to decodetree target/microblaze: Convert dec_rts to decodetree target/microblaze: Tidy do_rti, do_rtb, do_rte target/microblaze: Convert msrclr, msrset to decodetree target/microblaze: Convert dec_msr to decodetree target/microblaze: Convert dec_stream to decodetree target/microblaze: Remove last of old decoder target/microblaze: Remove cpu_R[0] target/microblaze: Add flags markup to some helpers target/microblaze: Reduce linux-user address space to 32-bit include/tcg/tcg.h | 15 + target/microblaze/cpu-param.h | 15 + target/microblaze/cpu.h | 67 +- target/microblaze/helper.h | 49 +- target/microblaze/microblaze-decode.h | 59 - tests/tcg/multiarch/float_helpers.h | 17 + target/microblaze/insns.decode | 256 ++ linux-user/elfload.c | 9 +- linux-user/microblaze/cpu_loop.c | 26 +- linux-user/microblaze/signal.c | 8 +- target/microblaze/cpu.c | 9 +- target/microblaze/gdbstub.c | 193 +- target/microblaze/helper.c | 164 +- target/microblaze/mmu.c | 4 +- target/microblaze/op_helper.c | 194 +- target/microblaze/translate.c | 3223 +++++++++++++------------ tests/tcg/multiarch/float_convs.c | 2 + tests/tcg/multiarch/float_madds.c | 2 + target/microblaze/meson.build | 3 + tests/tcg/configure.sh | 2 +- 20 files changed, 2292 insertions(+), 2025 deletions(-) delete mode 100644 target/microblaze/microblaze-decode.h create mode 100644 target/microblaze/insns.decode -- 2.25.1 Reviewed-by: Edgar E. Iglesias Tested-by: Edgar E. Iglesias