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[v2,00/10] softfloat: Implement float128_muladd

Message ID 20200925152047.709901-1-richard.henderson@linaro.org
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Series softfloat: Implement float128_muladd | expand

Message

Richard Henderson Sept. 25, 2020, 3:20 p.m. UTC
Plus assorted cleanups, passes tests/fp/fp-test.

Changes in v2:
  * Add UInt256 type (david)
  * Rewrite and inline shift256RightJamming.  This keeps the whole
    UInt256 in registers, avoiding long sequences of loads and stores.
  * Add x86_64 assembly for double shifts.  I don't know why the
    compiler can't recognize this pattern, but swapping values in
    and out of %cl (the only register in the base isa that can
    hold a variable shift) is really ugly.
  * Add ppc64 assembly.


r~


Richard Henderson (10):
  softfloat: Use mulu64 for mul64To128
  softfloat: Use int128.h for some operations
  softfloat: Tidy a * b + inf return
  softfloat: Add float_cmask and constants
  softfloat: Inline pick_nan_muladd into its caller
  softfloat: Implement float128_muladd
  softfloat: Use x86_64 assembly for {add,sub}{192,256}
  softfloat: Use x86_64 assembly for sh[rl]_double
  softfloat: Use aarch64 assembly for {add,sub}{192,256}
  softfloat: Use ppc64 assembly for {add,sub}{192,256}

 include/fpu/softfloat-macros.h | 109 +++---
 include/fpu/softfloat.h        |   2 +
 fpu/softfloat.c                | 620 ++++++++++++++++++++++++++++++---
 tests/fp/fp-test.c             |   2 +-
 tests/fp/wrap.c.inc            |  12 +
 5 files changed, 652 insertions(+), 93 deletions(-)

Comments

Richard Henderson Oct. 15, 2020, 5:23 p.m. UTC | #1
Ping.

On 9/25/20 8:20 AM, Richard Henderson wrote:
> Plus assorted cleanups, passes tests/fp/fp-test.

> 

> Changes in v2:

>   * Add UInt256 type (david)

>   * Rewrite and inline shift256RightJamming.  This keeps the whole

>     UInt256 in registers, avoiding long sequences of loads and stores.

>   * Add x86_64 assembly for double shifts.  I don't know why the

>     compiler can't recognize this pattern, but swapping values in

>     and out of %cl (the only register in the base isa that can

>     hold a variable shift) is really ugly.

>   * Add ppc64 assembly.

> 

> 

> r~

> 

> 

> Richard Henderson (10):

>   softfloat: Use mulu64 for mul64To128

>   softfloat: Use int128.h for some operations

>   softfloat: Tidy a * b + inf return

>   softfloat: Add float_cmask and constants

>   softfloat: Inline pick_nan_muladd into its caller

>   softfloat: Implement float128_muladd

>   softfloat: Use x86_64 assembly for {add,sub}{192,256}

>   softfloat: Use x86_64 assembly for sh[rl]_double

>   softfloat: Use aarch64 assembly for {add,sub}{192,256}

>   softfloat: Use ppc64 assembly for {add,sub}{192,256}

> 

>  include/fpu/softfloat-macros.h | 109 +++---

>  include/fpu/softfloat.h        |   2 +

>  fpu/softfloat.c                | 620 ++++++++++++++++++++++++++++++---

>  tests/fp/fp-test.c             |   2 +-

>  tests/fp/wrap.c.inc            |  12 +

>  5 files changed, 652 insertions(+), 93 deletions(-)

>