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[81.2.115.148]) by smtp.gmail.com with ESMTPSA id l11sm12200010wrt.23.2021.02.05.09.00.20 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 05 Feb 2021 09:00:21 -0800 (PST) From: Peter Maydell To: qemu-arm@nongnu.org, qemu-devel@nongnu.org Subject: [PATCH 00/24] hw/arm: New board model mps3-an524 Date: Fri, 5 Feb 2021 16:59:55 +0000 Message-Id: <20210205170019.25319-1-peter.maydell@linaro.org> X-Mailer: git-send-email 2.20.1 MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::42d; envelope-from=peter.maydell@linaro.org; helo=mail-wr1-x42d.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" This patchseries implements a new board model in the mps2/mps3 family, based on Application Note AN524: https://developer.arm.com/documentation/dai0524/latest/ Like the other MPS models, this board is an FPGA image; the AN524 image is based on the SSE-200, like the mps2-an521, but it is for the MPS3 board rather than the MPS2+. The major differences are QSPI flash and USB (which we don't model), and support for 2GB of RAM (which we do). Since the MPS3 is very similar to the MPS2, I've implemented mps3-an524 as a subclass of TYPE_MPS2TZ_MACHINE, sharing most of the code with mps2-an505 and mps2-an521. The motivation for this model is two-fold: * Linaro's Zephyr team would like it, so they can test their code targeting the MPS3 on QEMU * It's a useful stepping-stone towards a future MPS family model which uses the SSE-300 and Cortex-M55. All the "make various bits of mps2-tz.c be driven by per-board data structures rather than hardcoding them" changes will be needed for that future board model. This way they can be code-reviewed now, rather than making the future patchseries even bigger (it will be pretty large even so, because of all the "implement SSE-300 model" patches). This model can run the parts of the AN524 selftest image that would be expected to work, i.e. the ones that don't rely on things QEMU doesn't implement. (The selftest is part of the AN524 download so it's behind a EULA click-through and we can't put it into an acceptance test. We might be able to get something based on Zephyr or Arm TFM.) thanks -- PMM Peter Maydell (24): hw/arm/mps2-tz: Make SYSCLK frequency board-specific hw/misc/mps2-scc: Support configurable number of OSCCLK values hw/arm/mps2-tz: Correct the OSCCLK settings for mps2-an505 and mps2-an511 hw/arm/mps2-tz: Make the OSCCLK settings be configurable per-board hw/misc/mps2-fpgaio: Make number of LEDs configurable by board hw/misc/mps2-fpgaio: Support SWITCH register hw/arm/mps2-tz: Make FPGAIO switch and LED config per-board hw/arm/mps2-tz: Condition IRQ splitting on number of CPUs, not board type hw/arm/mps2-tz: Make number of IRQs board-specific hw/misc/mps2-scc: Implement CFG_REG5 and CFG_REG6 for MPS3 AN524 hw/arm/mps2-tz: Correct wrong interrupt numbers for DMA and SPI hw/arm/mps2-tz: Allow PPCPortInfo structures to specify device interrupts hw/arm/mps2-tz: Move device IRQ info to data structures hw/arm/mps2-tz: Size the uart-irq-orgate based on the number of UARTs hw/arm/mps2-tz: Allow boards to have different PPCInfo data hw/arm/mps2-tz: Make RAM arrangement board-specific hw/arm/mps2-tz: Set MachineClass default_ram info from RAMInfo data hw/arm/mps2-tz: Support ROMs as well as RAMs hw/arm/mps2-tz: Get armv7m_load_kernel() size argument from RAMInfo hw/arm/mps2-tz: Add new mps3-an524 board hw/arm/mps2-tz: Stub out USB controller for mps3-an524 hw/arm/mps2-tz: Provide PL031 RTC on mps3-an524 docs/system/arm/mps2.rst: Document the new mps3-an524 board hw/arm/mps2: Update old infocenter.arm.com URLs docs/system/arm/mps2.rst | 24 +- include/hw/arm/armsse.h | 4 +- include/hw/misc/armsse-cpuid.h | 2 +- include/hw/misc/armsse-mhu.h | 2 +- include/hw/misc/iotkit-secctl.h | 2 +- include/hw/misc/iotkit-sysctl.h | 2 +- include/hw/misc/iotkit-sysinfo.h | 2 +- include/hw/misc/mps2-fpgaio.h | 8 +- include/hw/misc/mps2-scc.h | 10 +- hw/arm/mps2-tz.c | 629 +++++++++++++++++++++++++------ hw/arm/mps2.c | 5 + hw/misc/armsse-cpuid.c | 2 +- hw/misc/armsse-mhu.c | 2 +- hw/misc/iotkit-sysctl.c | 2 +- hw/misc/iotkit-sysinfo.c | 2 +- hw/misc/mps2-fpgaio.c | 43 ++- hw/misc/mps2-scc.c | 93 ++++- 17 files changed, 677 insertions(+), 157 deletions(-) -- 2.20.1