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[174.21.70.228]) by smtp.gmail.com with ESMTPSA id a129sm2422599pfa.118.2021.06.04.13.12.10 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 04 Jun 2021 13:12:10 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PULL 00/15] tcg patch queue Date: Fri, 4 Jun 2021 13:11:55 -0700 Message-Id: <20210604201210.920136-1-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::42b; envelope-from=richard.henderson@linaro.org; helo=mail-pf1-x42b.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" The following changes since commit 1cbd2d914939ee6028e9688d4ba859a528c28405: Merge remote-tracking branch 'remotes/jasowang/tags/net-pull-request' into staging (2021-06-04 13:38:49 +0100) are available in the Git repository at: https://gitlab.com/rth7680/qemu.git tags/pull-tcg-20210604 for you to fetch changes up to 0006039e29b9e6118beab300146f7c4931f7a217: tcg/arm: Implement TCG_TARGET_HAS_rotv_vec (2021-06-04 11:50:11 -0700) ---------------------------------------------------------------- Host vector support for arm neon. ---------------------------------------------------------------- Richard Henderson (15): tcg: Change parameters for tcg_target_const_match tcg/arm: Add host vector framework tcg/arm: Implement tcg_out_ld/st for vector types tcg/arm: Implement tcg_out_mov for vector types tcg/arm: Implement tcg_out_dup*_vec tcg/arm: Implement minimal vector operations tcg/arm: Implement andc, orc, abs, neg, not vector operations tcg/arm: Implement TCG_TARGET_HAS_shi_vec tcg/arm: Implement TCG_TARGET_HAS_mul_vec tcg/arm: Implement TCG_TARGET_HAS_sat_vec tcg/arm: Implement TCG_TARGET_HAS_minmax_vec tcg/arm: Implement TCG_TARGET_HAS_bitsel_vec tcg/arm: Implement TCG_TARGET_HAS_shv_vec tcg/arm: Implement TCG_TARGET_HAS_roti_vec tcg/arm: Implement TCG_TARGET_HAS_rotv_vec tcg/arm/tcg-target-con-set.h | 10 + tcg/arm/tcg-target-con-str.h | 3 + tcg/arm/tcg-target.h | 52 ++- tcg/arm/tcg-target.opc.h | 16 + tcg/tcg.c | 5 +- tcg/aarch64/tcg-target.c.inc | 5 +- tcg/arm/tcg-target.c.inc | 956 +++++++++++++++++++++++++++++++++++++++++-- tcg/i386/tcg-target.c.inc | 4 +- tcg/mips/tcg-target.c.inc | 5 +- tcg/ppc/tcg-target.c.inc | 4 +- tcg/riscv/tcg-target.c.inc | 4 +- tcg/s390/tcg-target.c.inc | 5 +- tcg/sparc/tcg-target.c.inc | 5 +- tcg/tci/tcg-target.c.inc | 6 +- 14 files changed, 1001 insertions(+), 79 deletions(-) create mode 100644 tcg/arm/tcg-target.opc.h