From patchwork Mon Jul 3 18:31:29 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 698720 Delivered-To: patch@linaro.org Received: by 2002:adf:fcc5:0:0:0:0:0 with SMTP id f5csp1890329wrs; Mon, 3 Jul 2023 11:32:39 -0700 (PDT) X-Google-Smtp-Source: APBJJlHz9EJbgwCe6DxICh7Yn0PZzj/P2lJCZVrP4swdRjrynVoWepohB7+dkji2c0/ClCiFNqKG X-Received: by 2002:a67:e8cc:0:b0:443:5981:72ad with SMTP id y12-20020a67e8cc000000b00443598172admr5651686vsn.24.1688409159280; Mon, 03 Jul 2023 11:32:39 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1688409159; cv=none; d=google.com; s=arc-20160816; b=Co8yQuq1gsqY2w/U85COudcMO1UPkHgGUDnxzDnvpWWxNYBjvxKPZWb+WdCKjFFTX9 extP+/Al1RsAAQA1zcGay88ePerkJFrh8ah1JdhF8SvilwAa/eBK6NY8coF2DkwcrQcG SYa6Zt6t/Z0qR5WYqqc7GPm4VEvoXDKFrD4E7HP4C/l2QYrsOIzRYA6ITvmDY9Pl1Hf4 VwZQqLVcvGJN5M9sSj76s9szEvuylXqOqG5AXzcIPCM/f4NiNZ/IvE+lLybJAaY8mzYR 5CiicYrRipnDVFy4HqTDSwxo5JtJS1xJOXhKnOGr9GHhkFInwPcBDmMWAuD0U30/R8zU dvGA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:message-id:date:subject:cc:to:from:dkim-signature; bh=MnDJGuJyd7hy6IfHuJQpgiX6kirrk5oLgIqP4WgR1ls=; fh=vvMppja281vKOzNTqm/8B9R+cnANR9RxW7IMPTmCJ4Q=; b=KEcOT8/aF8Un1sRZJv/fTqekvO+sy3wG4jo1vIxh2g8rS5gTugtXWGhjFMDpvo+nzr 8AIbHTdiV5+TSzDq8iKsMGrtSdlMlWHf3H9qT1gufqcUyjmVRD1920oEQM9Ac/z9p0pm 5I7ESdE5jUi3eOqoGYYNbTeBf7ewuSkmRlQI7cdkyFYYIBqPrQ98MBC6P/my0gkDzdFg w+EQ3vPAYrrQJy81xuQlljAN3R0i0zuGZeRp2IddSDxPqlCiVFL3GCUo7ktX29tiCvn6 v2uKZaAIex2AlAiGNq6uIT3hXNqNTckZchO8yMBQZaEJA/bb4JLid07oi6YAzcpD71WT OfMQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=gEm4cpDr; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id w7-20020a05620a444700b00765554c0d3fsi8455807qkp.625.2023.07.03.11.32.39 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Mon, 03 Jul 2023 11:32:39 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=gEm4cpDr; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1qGOL9-0007aG-JB; Mon, 03 Jul 2023 14:31:59 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1qGOL5-0007Z7-Sh for qemu-devel@nongnu.org; Mon, 03 Jul 2023 14:31:55 -0400 Received: from mail-wr1-x432.google.com ([2a00:1450:4864:20::432]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1qGOL1-000073-Sk for qemu-devel@nongnu.org; Mon, 03 Jul 2023 14:31:55 -0400 Received: by mail-wr1-x432.google.com with SMTP id ffacd0b85a97d-313e742a787so4091617f8f.1 for ; Mon, 03 Jul 2023 11:31:50 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1688409109; x=1691001109; h=content-transfer-encoding:mime-version:message-id:date:subject:cc :to:from:from:to:cc:subject:date:message-id:reply-to; bh=MnDJGuJyd7hy6IfHuJQpgiX6kirrk5oLgIqP4WgR1ls=; b=gEm4cpDrD3c1t4Nku/wH3DSWqoJYBY8rXsG6uve0H6hqmkTAHZilGfKJR8tLCp98RO W2PfW/L52q9exJkigW9f8M3dXkoHTwH4iiZVbTLi7gaC1r4mXQDF5dbWTzWlEFkFx7xP dI/2v8X8dMzLVCJ8vC2nNon2r+AICrhf9DwTDEElP1I/qBoYtGULXDNtU8RzJ03eCCbv PLMpJZGU5hkNmVg1ffcmTKb8Go8arRbJUYOgKn7a7r++IvgEFmMQ/AJ12Urp0wXCFCYg 2Fs6BPstdIauuoLAeh16rokGJ0CElfOhkHh9MiJv1C64n4ipcTlrAILbWL/wLwfjQyqM //8Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1688409109; x=1691001109; h=content-transfer-encoding:mime-version:message-id:date:subject:cc :to:from:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; bh=MnDJGuJyd7hy6IfHuJQpgiX6kirrk5oLgIqP4WgR1ls=; b=jqs5zc4BvJwRrg8ZRt2iqjlO0mgeW9ZOo1NaTYHVrdhYJDCkSJUihOS5/HG1Ahk+5I svyAc0QntaTvY2giV7G9lAMtmMRL3vmRm29eM+Fz7jiec4XtAm5AgHLjuWnxc5wSgcP5 uTrngiDxW4yNbWbHl3CpdGe/qy1wC4ht/HVKtHwD9WKh50LgRY+rABmoQWtvSI4U+zVO pRehXpnEHVMGLLCaiqLhSLNI5AF/7z6H18uAAdgyAuPt3TU7OCL0f89yOUxON7iYyPws Z6BSXNIYGnx2ng9RVJ7UlH+irNyXKQ0D7JKgJb0MlYCP/XYj1ogakgoxN+9JYKSM+6Ke IEcg== X-Gm-Message-State: AC+VfDyosslQGBpQe6ED1AKDp4enHeUOhOXMrUg6+lwLHUu+lA0r2XxO I91Tbbva8m7FZhLQMWKyRvasepTVQYitTZKW9ZFfNg== X-Received: by 2002:adf:e3c9:0:b0:313:ef28:d3d6 with SMTP id k9-20020adfe3c9000000b00313ef28d3d6mr14384299wrm.6.1688409108711; Mon, 03 Jul 2023 11:31:48 -0700 (PDT) Received: from localhost.localdomain ([176.176.178.91]) by smtp.gmail.com with ESMTPSA id y17-20020a1c4b11000000b003f9b24cf881sm30498831wma.16.2023.07.03.11.31.46 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Mon, 03 Jul 2023 11:31:48 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Palmer Dabbelt , Paolo Bonzini , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Thomas Huth , Beraldo Leal , Wainer dos Santos Moschetta , Alistair Francis , Daniel Henrique Barboza , kvm@vger.kernel.org, qemu-riscv@nongnu.org, Bin Meng , =?utf-8?q?Alex_Be?= =?utf-8?q?nn=C3=A9e?= , Weiwei Li , Liu Zhiwei Subject: [PATCH v2 00/16] target/riscv: Allow building without TCG (KVM-only so far) Date: Mon, 3 Jul 2023 20:31:29 +0200 Message-Id: <20230703183145.24779-1-philmd@linaro.org> X-Mailer: git-send-email 2.38.1 MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::432; envelope-from=philmd@linaro.org; helo=mail-wr1-x432.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org v2: Rebased on alistair23/riscv-to-apply.next Patch #1-#5 reviewed. Philippe Mathieu-Daudé (16): target/riscv: Remove unuseful KVM stubs target/riscv: Remove unused 'instmap.h' header in translate.c target/riscv: Restrict sysemu specific header to user emulation target/riscv: Restrict 'rv128' machine to TCG accelerator target/riscv: Move sysemu-specific files to target/riscv/sysemu/ target/riscv: Restrict riscv_cpu_do_interrupt() to sysemu target/riscv: Move TCG-specific files to target/riscv/tcg/ target/riscv: Move TCG-specific cpu_get_tb_cpu_state() to tcg/cpu.c target/riscv: Expose some 'trigger' prototypes from debug.c target/riscv: Extract TCG-specific code from debug.c target/riscv: Move sysemu-specific debug files to target/riscv/sysemu/ target/riscv: Expose riscv_cpu_pending_to_irq() from cpu_helper.c target/riscv: Move TCG/sysemu-specific code to tcg/sysemu/cpu_helper.c target/riscv: Move sysemu-specific code to sysemu/cpu_helper.c target/riscv: Restrict TCG-specific prototype declarations gitlab-ci.d/crossbuilds: Add KVM riscv64 cross-build jobs target/riscv/cpu.h | 27 +- target/riscv/internals.h | 4 + target/riscv/{ => sysemu}/debug.h | 6 + target/riscv/{ => sysemu}/instmap.h | 0 target/riscv/{ => sysemu}/kvm_riscv.h | 0 target/riscv/{ => sysemu}/pmp.h | 0 target/riscv/{ => sysemu}/pmu.h | 0 target/riscv/{ => sysemu}/time_helper.h | 0 target/riscv/{ => tcg}/XVentanaCondOps.decode | 0 target/riscv/{ => tcg}/insn16.decode | 0 target/riscv/{ => tcg}/insn32.decode | 0 target/riscv/{ => tcg}/xthead.decode | 0 hw/riscv/virt.c | 2 +- target/riscv/cpu.c | 33 +- target/riscv/cpu_helper.c | 1692 +---------------- target/riscv/csr.c | 6 +- target/riscv/{ => sysemu}/arch_dump.c | 0 target/riscv/sysemu/cpu_helper.c | 863 +++++++++ target/riscv/{ => sysemu}/debug.c | 153 +- target/riscv/{ => sysemu}/kvm-stub.c | 0 target/riscv/{ => sysemu}/kvm.c | 4 +- target/riscv/{ => sysemu}/machine.c | 0 target/riscv/{ => sysemu}/monitor.c | 0 target/riscv/{ => sysemu}/pmp.c | 0 target/riscv/{ => sysemu}/pmu.c | 0 target/riscv/{ => sysemu}/riscv-qmp-cmds.c | 0 target/riscv/{ => sysemu}/time_helper.c | 0 target/riscv/{ => tcg}/bitmanip_helper.c | 0 target/riscv/tcg/cpu.c | 98 + target/riscv/{ => tcg}/crypto_helper.c | 0 target/riscv/{ => tcg}/fpu_helper.c | 0 target/riscv/{ => tcg}/m128_helper.c | 0 target/riscv/{ => tcg}/op_helper.c | 0 target/riscv/tcg/sysemu/cpu_helper.c | 765 ++++++++ target/riscv/tcg/sysemu/debug.c | 165 ++ target/riscv/tcg/tcg-stub.c | 31 + target/riscv/{ => tcg}/translate.c | 1 - target/riscv/{ => tcg}/vector_helper.c | 0 target/riscv/{ => tcg}/zce_helper.c | 0 .gitlab-ci.d/crossbuilds.yml | 8 + target/riscv/meson.build | 33 +- target/riscv/sysemu/meson.build | 13 + target/riscv/tcg/meson.build | 22 + target/riscv/tcg/sysemu/meson.build | 4 + 44 files changed, 2037 insertions(+), 1893 deletions(-) rename target/riscv/{ => sysemu}/debug.h (96%) rename target/riscv/{ => sysemu}/instmap.h (100%) rename target/riscv/{ => sysemu}/kvm_riscv.h (100%) rename target/riscv/{ => sysemu}/pmp.h (100%) rename target/riscv/{ => sysemu}/pmu.h (100%) rename target/riscv/{ => sysemu}/time_helper.h (100%) rename target/riscv/{ => tcg}/XVentanaCondOps.decode (100%) rename target/riscv/{ => tcg}/insn16.decode (100%) rename target/riscv/{ => tcg}/insn32.decode (100%) rename target/riscv/{ => tcg}/xthead.decode (100%) rename target/riscv/{ => sysemu}/arch_dump.c (100%) create mode 100644 target/riscv/sysemu/cpu_helper.c rename target/riscv/{ => sysemu}/debug.c (83%) rename target/riscv/{ => sysemu}/kvm-stub.c (100%) rename target/riscv/{ => sysemu}/kvm.c (99%) rename target/riscv/{ => sysemu}/machine.c (100%) rename target/riscv/{ => sysemu}/monitor.c (100%) rename target/riscv/{ => sysemu}/pmp.c (100%) rename target/riscv/{ => sysemu}/pmu.c (100%) rename target/riscv/{ => sysemu}/riscv-qmp-cmds.c (100%) rename target/riscv/{ => sysemu}/time_helper.c (100%) rename target/riscv/{ => tcg}/bitmanip_helper.c (100%) create mode 100644 target/riscv/tcg/cpu.c rename target/riscv/{ => tcg}/crypto_helper.c (100%) rename target/riscv/{ => tcg}/fpu_helper.c (100%) rename target/riscv/{ => tcg}/m128_helper.c (100%) rename target/riscv/{ => tcg}/op_helper.c (100%) create mode 100644 target/riscv/tcg/sysemu/cpu_helper.c create mode 100644 target/riscv/tcg/sysemu/debug.c create mode 100644 target/riscv/tcg/tcg-stub.c rename target/riscv/{ => tcg}/translate.c (99%) rename target/riscv/{ => tcg}/vector_helper.c (100%) rename target/riscv/{ => tcg}/zce_helper.c (100%) create mode 100644 target/riscv/sysemu/meson.build create mode 100644 target/riscv/tcg/meson.build create mode 100644 target/riscv/tcg/sysemu/meson.build