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Patch Series S/W/F Date Submitter Delegate State
[v3,10/31] target-arm: Implement AArch64 TCR_EL1 --- 2014-02-15 Peter Maydell Superseded
[v3,09/31] target-arm: Implement AArch64 SCTLR_EL1 --- 2014-02-15 Peter Maydell Superseded
[v3,08/31] target-arm: Implement AArch64 memory attribute registers --- 2014-02-15 Peter Maydell Superseded
[v3,07/31] target-arm: Implement AArch64 dummy MDSCR_EL1 --- 2014-02-15 Peter Maydell Superseded
[v3,06/31] target-arm: Implement AArch64 TLB invalidate ops --- 2014-02-15 Peter Maydell Superseded
[v3,05/31] target-arm: Implement AArch64 cache invalidate/clean ops --- 2014-02-15 Peter Maydell Superseded
[v3,04/31] target-arm: Implement AArch64 MIDR_EL1 --- 2014-02-15 Peter Maydell Superseded
[v3,03/31] target-arm: Implement AArch64 CurrentEL sysreg --- 2014-02-15 Peter Maydell Superseded
[v3,02/31] target-arm: A64: Make cache ID registers visible to AArch64 --- 2014-02-15 Peter Maydell Superseded
[v3,01/31] target-arm: Fix raw read and write functions on AArch64 registers --- 2014-02-15 Peter Maydell Superseded
[2/2] QEMU: PPC: set default cpu type to be 'host' --- 2014-02-14 Stuart Yoder New
hw/arm/vexpress: Set reset-cbar property for CPUs --- 2014-02-13 Peter Maydell Superseded
target-arm: make smc behave as a nop --- 2014-02-11 Rob Herring New
[RFC] translate-all.c: add hack for coverage testing --- 2014-02-11 Peter Maydell New
[v2,2/2] target-arm: A64: Implement remaining 3-same instructions --- 2014-02-11 Peter Maydell Accepted
[v2,1/2] softfloat: Support halving the result of muladd operation --- 2014-02-11 Peter Maydell Accepted
ahci: fix sysbus support --- 2014-02-10 Rob Herring New
[PULL,07/48] tests: Run qom-test for every architecture --- 2014-02-10 Andreas Färber New
[PULL,29/29] arm/zynq: Add software system reset via SCLR --- 2014-02-08 Peter Maydell Accepted
[PULL,28/29] hw/arm/allwinner-a10: initialize EMAC --- 2014-02-08 Peter Maydell Accepted
[PULL,27/29] hw/net: add support for Allwinner EMAC Fast Ethernet controller --- 2014-02-08 Peter Maydell Accepted
[PULL,26/29] util/fifo8: clear fifo head upon reset --- 2014-02-08 Peter Maydell Accepted
[PULL,25/29] util/fifo8: implement push/pop of multiple bytes --- 2014-02-08 Peter Maydell Accepted
[PULL,24/29] disas: Implement disassembly output for A64 --- 2014-02-08 Peter Maydell Accepted
[PULL,23/29] disas/libvixl: Fix upstream libvixl compilation issues --- 2014-02-08 Peter Maydell Accepted
[PULL,22/29] disas: Add subset of libvixl sources for A64 disassembler --- 2014-02-08 Peter Maydell Accepted
[PULL,21/29] rules.mak: Link with C++ if we have a C++ compiler --- 2014-02-08 Peter Maydell Accepted
[PULL,20/29] rules.mak: Support .cc as a C++ source file suffix --- 2014-02-08 Peter Maydell Accepted
[PULL,19/29] arm_gic: Add GICC_APRn state to the GICState --- 2014-02-08 Peter Maydell Accepted
[PULL,18/29] vmstate: Add uint32 2D-array support --- 2014-02-08 Peter Maydell Accepted
[PULL,17/29] arm_gic: Support setting/getting binary point reg --- 2014-02-08 Peter Maydell Accepted
[PULL,16/29] arm_gic: Keep track of SGI sources --- 2014-02-08 Peter Maydell Accepted
[PULL,15/29] arm_gic: Fix GIC pending behavior --- 2014-02-08 Peter Maydell Accepted
[PULL,14/29] target-arm: Add support for AArch32 64bit VCVTB and VCVTT --- 2014-02-08 Peter Maydell Accepted
[PULL,13/29] target-arm: A64: Add FNEG and FABS to the SIMD 2-reg-misc group --- 2014-02-08 Peter Maydell Accepted
[PULL,12/29] target-arm: A64: Add 2-reg-misc REV* instructions --- 2014-02-08 Peter Maydell Accepted
[PULL,11/29] target-arm: A64: Add narrowing 2-reg-misc instructions --- 2014-02-08 Peter Maydell Accepted
[PULL,10/29] target-arm: A64: Implement 2-reg-misc CNT, NOT and RBIT --- 2014-02-08 Peter Maydell Accepted
[PULL,09/29] target-arm: A64: Implement 2-register misc compares, ABS, NEG --- 2014-02-08 Peter Maydell Accepted
[PULL,08/29] target-arm: A64: Add skeleton decode for SIMD 2-reg misc group --- 2014-02-08 Peter Maydell Accepted
[PULL,07/29] target-arm: A64: Add SIMD simple 64 bit insns from scalar 2-reg misc --- 2014-02-08 Peter Maydell Accepted
[PULL,06/29] target-arm: A64: Implement remaining integer scalar-3-same insns --- 2014-02-08 Peter Maydell Accepted
[PULL,05/29] target-arm: A64: Implement scalar pairwise ops --- 2014-02-08 Peter Maydell Accepted
[PULL,04/29] tcg: Add TCGV_UNUSED_PTR, TCGV_IS_UNUSED_PTR, TCGV_EQUAL_PTR --- 2014-02-08 Peter Maydell Accepted
[PULL,03/29] target-arm: A64: Implement pairwise integer ops from 3-reg-same SIMD --- 2014-02-08 Peter Maydell Accepted
[PULL,02/29] target-arm: A64: Implement remaining non-pairwise int SIMD 3-reg-same insns --- 2014-02-08 Peter Maydell Accepted
[PULL,01/29] target-arm: A64: Implement SIMD 3-reg-same shift and saturate insns --- 2014-02-08 Peter Maydell Accepted
[PULL,00/29] target-arm queue --- 2014-02-08 Peter Maydell Accepted
[8/8] target-arm: A64: Implement remaining 3-same instructions --- 2014-02-07 Peter Maydell Superseded
[7/8] softfloat: Support halving the result of muladd operation --- 2014-02-07 Peter Maydell Superseded
[6/8] target-arm: A64: Implement floating point pairwise insns --- 2014-02-07 Peter Maydell Superseded
[5/8] target-arm: A64: Implement SIMD FP compare and set insns --- 2014-02-07 Peter Maydell Superseded
[4/8] target-arm: A64: Implement scalar three different instructions --- 2014-02-07 Peter Maydell Superseded
[3/8] target-arm: A64: Implement SIMD scalar indexed instructions --- 2014-02-07 Peter Maydell Superseded
[2/8] target-arm: A64: Implement long vector x indexed insns --- 2014-02-07 Peter Maydell Superseded
[1/8] target-arm: A64: Implement plain vector SIMD indexed element insns --- 2014-02-07 Peter Maydell Accepted
[v3,5/5] disas: Implement disassembly output for A64 --- 2014-02-05 Peter Maydell Superseded
[v3,4/5] disas/libvixl: Fix upstream libvixl compilation issues --- 2014-02-05 Peter Maydell Superseded
[v3,3/5] disas: Add subset of libvixl sources for A64 disassembler --- 2014-02-05 Peter Maydell Superseded
[v3,2/5] rules.mak: Link with C++ if we have a C++ compiler --- 2014-02-05 Peter Maydell Superseded
[v3,1/5] rules.mak: Support .cc as a C++ source file suffix --- 2014-02-05 Peter Maydell Superseded
[1/8] vmstate: Make VMSTATE_STRUCT_POINTER take type, not ptr-to-type --- 2014-02-04 Juan Quintela New
[1/8] vmstate: Make VMSTATE_STRUCT_POINTER take type, not ptr-to-type --- 2014-02-04 Juan Quintela New
Add support for MAP_NORESERVE mmap flag. --- 2014-02-03 Christophe Lyon Superseded
[v6,6/6] hw: arm_gic_kvm: Add KVM VGIC save/restore logic --- 2014-02-02 Christoffer Dall Superseded
[v6,5/6] arm_gic: Add GICC_APRn state to the GICState --- 2014-02-02 Christoffer Dall Superseded
[v6,4/6] vmstate: Add uint32 2D-array support --- 2014-02-02 Christoffer Dall Superseded
[v6,3/6] arm_gic: Support setting/getting binary point reg --- 2014-02-02 Christoffer Dall Superseded
[v6,2/6] hw: arm_gic: Keep track of SGI sources --- 2014-02-02 Christoffer Dall Superseded
[v6,1/6] arm_gic: Fix GIC pending behavior --- 2014-02-02 Christoffer Dall Superseded
[v2,13/13] target-arm: A64: Add FNEG and FABS to the SIMD 2-reg-misc group --- 2014-02-01 Peter Maydell Superseded
[v2,12/13] target-arm: A64: Add 2-reg-misc REV* instructions --- 2014-02-01 Peter Maydell Superseded
[v2,11/13] target-arm: A64: Add narrowing 2-reg-misc instructions --- 2014-02-01 Peter Maydell Superseded
[v2,10/13] target-arm: A64: Implement 2-reg-misc CNT, NOT and RBIT --- 2014-02-01 Peter Maydell Superseded
[v2,09/13] target-arm: A64: Implement 2-register misc compares, ABS, NEG --- 2014-02-01 Peter Maydell Superseded
[v2,08/13] target-arm: A64: Add skeleton decode for SIMD 2-reg misc group --- 2014-02-01 Peter Maydell Superseded
[v2,07/13] target-arm: A64: Add SIMD simple 64 bit insns from scalar 2-reg misc --- 2014-02-01 Peter Maydell Superseded
[v2,06/13] target-arm: A64: Implement remaining integer scalar-3-same insns --- 2014-02-01 Peter Maydell Superseded
[v2,05/13] target-arm: A64: Implement scalar pairwise ops --- 2014-02-01 Peter Maydell Superseded
[v2,04/13] tcg: Add TCGV_UNUSED_PTR, TCGV_IS_UNUSED_PTR, TCGV_EQUAL_PTR --- 2014-02-01 Peter Maydell Superseded
[v2,03/13] target-arm: A64: Implement pairwise integer ops from 3-reg-same SIMD --- 2014-02-01 Peter Maydell Superseded
[v2,02/13] target-arm: A64: Implement remaining non-pairwise int SIMD 3-reg-same insns --- 2014-02-01 Peter Maydell Superseded
[v2,01/13] target-arm: A64: Implement SIMD 3-reg-same shift and saturate insns --- 2014-02-01 Peter Maydell Superseded
[v2,35/35] target-arm: Implement AArch64 OSLAR_EL1 sysreg as WI --- 2014-01-31 Peter Maydell Superseded
[v2,34/35] target-arm: Implement AArch64 dummy breakpoint and watchpoint registers --- 2014-01-31 Peter Maydell Superseded
[v2,33/35] target-arm: Implement AArch64 ID and feature registers --- 2014-01-31 Peter Maydell Superseded
[v2,32/35] target-arm: Implement AArch64 generic timers --- 2014-01-31 Peter Maydell Superseded
[v2,31/35] target-arm: Implement AArch64 MPIDR --- 2014-01-31 Peter Maydell Superseded
[v2,30/35] target-arm: Implement AArch64 TTBR* --- 2014-01-31 Peter Maydell Superseded
[v2,29/35] target-arm: Implement AArch64 VBAR_EL1 --- 2014-01-31 Peter Maydell Superseded
[v2,28/35] target-arm: Implement AArch64 TCR_EL1 --- 2014-01-31 Peter Maydell Superseded
[v2,27/35] target-arm: Implement AArch64 SCTLR_EL1 --- 2014-01-31 Peter Maydell Superseded
[v2,26/35] target-arm: Implement AArch64 memory attribute registers --- 2014-01-31 Peter Maydell Superseded
[v2,25/35] target-arm: Implement AArch64 dummy MDSCR_EL1 --- 2014-01-31 Peter Maydell Superseded
[v2,24/35] target-arm: Implement AArch64 TLB invalidate ops --- 2014-01-31 Peter Maydell Superseded
[v2,23/35] target-arm: Implement AArch64 cache invalidate/clean ops --- 2014-01-31 Peter Maydell Superseded
[v2,22/35] target-arm: Implement AArch64 DAIF system register --- 2014-01-31 Peter Maydell Superseded
[v2,21/35] target-arm: Implement AArch64 MIDR_EL1 --- 2014-01-31 Peter Maydell Superseded
[v2,20/35] target-arm: Implement AArch64 CurrentEL sysreg --- 2014-01-31 Peter Maydell Superseded
[v2,19/35] target-arm: A64: Make cache ID registers visible to AArch64 --- 2014-01-31 Peter Maydell Superseded
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