Patch Metrics

Linaro contributions to qemu-devel.

Patches per month: Submitted Accepted

Project Details

List addressqemu-devel@nongnu.org
Source treehttp://git.qemu.org/git/qemu.git
Last commit scanned5a5c383b1373aeb6c87a0d6060f6c3dc7c53082b
Show patches with: State = Action Required       |    Archived = No       |   2669 patches
« 1 2 ... 22 23 2426 27 »
Patch Series S/W/F Date Submitter Delegate State
[v8,08/27] target-arm: move AArch32 SCR into security reglist 0 0 0 2014-10-30 Greg Bellows New
[v8,07/27] target-arm: insert AArch32 cpregs twice into hashtable 0 0 0 2014-10-30 Greg Bellows New
[v8,06/27] target-arm: add secure state bit to CPREG hash 0 0 0 2014-10-30 Greg Bellows New
[v8,05/27] target-arm: add CPREG secure state support 0 0 0 2014-10-30 Greg Bellows New
[v8,02/27] target-arm: add async excp target_el function 0 0 0 2014-10-30 Greg Bellows New
[v8,01/27] target-arm: extend async excp masking 0 0 0 2014-10-30 Greg Bellows New
[Xen-devel,PULL,0/2] Xen tree 2014-10-30 0 0 0 2014-10-30 Stefano Stabellini New
target-arm: Add guest cpu endianness determination for virtio in KVM ARM64 0 0 0 2014-10-28 PranavkumarSawargaonkar New
[v7,07/32] target-arm: extend async excp masking 0 0 0 2014-10-24 Greg Bellows New
[PULL,v2,2/9] well-defined listing order for machine types 0 0 0 2014-10-22 Michael S. Tsirkin New
[PULL,2/7] well-defined listing order for machine types 0 0 0 2014-10-22 Michael S. Tsirkin New
[v7,31/32] target-arm: make MAIR0/1 banked 0 0 0 2014-10-21 Greg Bellows New
[v7,30/32] target-arm: make c13 cp regs banked (FCSEIDR, ...) 0 0 0 2014-10-21 Greg Bellows New
[v7,29/32] target-arm: make PAR banked 0 0 0 2014-10-21 Greg Bellows New
[v7,28/32] target-arm: make IFAR/DFAR banked 0 0 0 2014-10-21 Greg Bellows New
[v7,27/32] target-arm: make DFSR banked 0 0 0 2014-10-21 Greg Bellows New
[v7,26/32] target-arm: make IFSR banked 0 0 0 2014-10-21 Greg Bellows New
[v7,25/32] target-arm: make DACR banked 0 0 0 2014-10-21 Greg Bellows New
[v7,24/32] target-arm: make c2_mask and c2_base_mask banked 0 0 0 2014-10-21 Greg Bellows New
[v7,23/32] target-arm: add TCR_EL3 and make TTBCR banked 0 0 0 2014-10-21 Greg Bellows New
[v7,22/32] target-arm: add TTBR0_EL3 and make TTBR0/1 banked 0 0 0 2014-10-21 Greg Bellows New
[v7,21/32] target-arm: make CSSELR banked 0 0 0 2014-10-21 Greg Bellows New
[v7,20/32] target-arm: add SCTLR_EL3 and make SCTLR banked 0 0 0 2014-10-21 Greg Bellows New
[v7,19/32] target-arm: add MVBAR support 0 0 0 2014-10-21 Greg Bellows New
[v7,18/32] target-arm: add SDER definition 0 0 0 2014-10-21 Greg Bellows New
[v7,17/32] target-arm: add NSACR register 0 0 0 2014-10-21 Greg Bellows New
[v7,16/32] target-arm: respect SCR.FW, SCR.AW and SCTLR.NMFI 0 0 0 2014-10-21 Greg Bellows New
[v7,14/32] target-arm: move AArch32 SCR into security reglist 0 0 0 2014-10-21 Greg Bellows New
[v7,13/32] target-arm: insert AArch32 cpregs twice into hashtable 0 0 0 2014-10-21 Greg Bellows New
[v7,12/32] target-arm: add secure state bit to CPREG hash 0 0 0 2014-10-21 Greg Bellows New
[v7,11/32] target-arm: add CPREG secure state support 0 0 0 2014-10-21 Greg Bellows New
[v7,10/32] target-arm: add non-secure Translation Block flag 0 0 0 2014-10-21 Greg Bellows New
[v7,09/32] target-arm: add banked register accessors 0 0 0 2014-10-21 Greg Bellows New
[v7,08/32] target-arm: add async excp target_el function 0 0 0 2014-10-21 Greg Bellows New
[v7,07/32] target-arm: extend async excp masking 0 0 0 2014-10-21 Greg Bellows New
[v7,06/32] target-arm: A32: Emulate the SMC instruction 0 0 0 2014-10-21 Greg Bellows New
[v7,05/32] target-arm: make arm_current_el() return EL3 0 0 0 2014-10-21 Greg Bellows New
[v7,04/32] target-arm: rename arm_current_pl to arm_current_el 0 0 0 2014-10-21 Greg Bellows New
[v7,02/32] target-arm: add arm_is_secure() function 0 0 0 2014-10-21 Greg Bellows New
[v7,01/32] target-arm: increase arrays of registers R13 & R14 0 0 0 2014-10-21 Greg Bellows New
[v6,31/32] target-arm: make MAIR0/1 banked 0 0 0 2014-10-10 Greg Bellows New
[v6,30/32] target-arm: make c13 cp regs banked (FCSEIDR, ...) 0 0 0 2014-10-10 Greg Bellows New
[v6,29/32] target-arm: make PAR banked 0 0 0 2014-10-10 Greg Bellows New
[v6,28/32] target-arm: make IFAR/DFAR banked 0 0 0 2014-10-10 Greg Bellows New
[v6,27/32] target-arm: make DFSR banked 0 0 0 2014-10-10 Greg Bellows New
[v6,26/32] target-arm: make IFSR banked 0 0 0 2014-10-10 Greg Bellows New
[v6,25/32] target-arm: make DACR banked 0 0 0 2014-10-10 Greg Bellows New
[v6,24/32] target-arm: make c2_mask and c2_base_mask banked 0 0 0 2014-10-10 Greg Bellows New
[v6,23/32] target-arm: add TCR_EL3 and make TTBCR banked 0 0 0 2014-10-10 Greg Bellows New
[v6,22/32] target-arm: add TTBR0_EL3 and make TTBR0/1 banked 0 0 0 2014-10-10 Greg Bellows New
[v6,21/32] target-arm: make CSSELR banked 0 0 0 2014-10-10 Greg Bellows New
[v6,20/32] target-arm: add SCTLR_EL3 and make SCTLR banked 0 0 0 2014-10-10 Greg Bellows New
[v6,19/32] target-arm: add MVBAR support 0 0 0 2014-10-10 Greg Bellows New
[v6,18/32] target-arm: add SDER definition 0 0 0 2014-10-10 Greg Bellows New
[v6,17/32] target-arm: add NSACR register 0 0 0 2014-10-10 Greg Bellows New
[v6,16/32] target-arm: respect SCR.FW, SCR.AW and SCTLR.NMFI 0 0 0 2014-10-10 Greg Bellows New
[v6,14/32] target-arm: move AArch32 SCR into security reglist 0 0 0 2014-10-10 Greg Bellows New
[v6,13/32] target-arm: insert AArch32 cpregs twice into hashtable 0 0 0 2014-10-10 Greg Bellows New
[v6,12/32] target-arm: add secure state bit to CPREG hash 0 0 0 2014-10-10 Greg Bellows New
[v6,11/32] target-arm: add CPREG secure state support 0 0 0 2014-10-10 Greg Bellows New
[v6,10/32] target-arm: add non-secure Translation Block flag 0 0 0 2014-10-10 Greg Bellows New
[v6,09/32] target-arm: add banked register accessors 0 0 0 2014-10-10 Greg Bellows New
[v6,08/32] target-arm: add async excp target_el function 0 0 0 2014-10-10 Greg Bellows New
[v6,07/32] target-arm: extend async excp masking 0 0 0 2014-10-10 Greg Bellows New
[v6,06/32] target-arm: A32: Emulate the SMC instruction 0 0 0 2014-10-10 Greg Bellows New
[v6,05/32] target-arm: make arm_current_el() return EL3 0 0 0 2014-10-10 Greg Bellows New
[v6,04/32] target-arm: rename arm_current_pl to arm_current_el 0 0 0 2014-10-10 Greg Bellows New
[v6,02/32] target-arm: add arm_is_secure() function 0 0 0 2014-10-10 Greg Bellows New
[v6,01/32] target-arm: increase arrays of registers R13 & R14 0 0 0 2014-10-10 Greg Bellows New
[v2] hw/arm/boot: register cpu reset handlers if using -bios 0 0 0 2014-10-10 Ard Biesheuvel New
target-arm: add second UART to virt 0 0 0 2014-10-08 Greg Bellows New
[PULL,v2,0/5] linux-user patches for 2.2 0 0 0 2014-10-06 Riku Voipio New
[PULL,4/5] linux-user: don't include timerfd if not needed 0 0 0 2014-10-06 Riku Voipio New
[PULL,0/5] linux-user patches for 2.2 0 0 0 2014-10-06 Riku Voipio New
[v5,32/33] target-arm: add GDB scr register 0 0 0 2014-09-30 Greg Bellows New
[v5,31/33] target-arm: make c13 cp regs banked (FCSEIDR, ...) 0 0 0 2014-09-30 Greg Bellows New
[v5,30/33] target-arm: make MAIR0/1 banked 0 0 0 2014-09-30 Greg Bellows New
[v5,29/33] target-arm: make VBAR banked 0 0 0 2014-09-30 Greg Bellows New
[v5,28/33] target-arm: make PAR banked 0 0 0 2014-09-30 Greg Bellows New
[v5,27/33] target-arm: make IFAR/DFAR banked 0 0 0 2014-09-30 Greg Bellows New
[v5,26/33] target-arm: make DFSR banked 0 0 0 2014-09-30 Greg Bellows New
[v5,25/33] target-arm: make IFSR banked 0 0 0 2014-09-30 Greg Bellows New
[v5,24/33] target-arm: make DACR banked 0 0 0 2014-09-30 Greg Bellows New
[v5,23/33] target-arm: make c2_mask and c2_base_mask banked 0 0 0 2014-09-30 Greg Bellows New
[v5,22/33] target-arm: add TCR_EL3 and make TTBCR banked 0 0 0 2014-09-30 Greg Bellows New
[v5,21/33] target-arm: add TTBR0_EL3 and make TTBR0/1 banked 0 0 0 2014-09-30 Greg Bellows New
[v5,20/33] target-arm: make CSSELR banked 0 0 0 2014-09-30 Greg Bellows New
[v5,19/33] target-arm: add SCTLR_EL3 and make SCTLR banked 0 0 0 2014-09-30 Greg Bellows New
[v5,18/33] target-arm: add MVBAR support 0 0 0 2014-09-30 Greg Bellows New
[v5,17/33] target-arm: add SDER definition 0 0 0 2014-09-30 Greg Bellows New
[v5,16/33] target-arm: add NSACR register 0 0 0 2014-09-30 Greg Bellows New
[v5,15/33] target-arm: Respect SCR.FW, SCR.AW and SCTLR.NMFI 0 0 0 2014-09-30 Greg Bellows New
[v5,13/33] target-arm: move Aarch32 SCR into security reglist 0 0 0 2014-09-30 Greg Bellows New
[v5,12/33] target-arm: insert Aarch32 cpregs twice into hashtable 0 0 0 2014-09-30 Greg Bellows New
[v5,11/33] target-arm: arrayfying fieldoffset for banking 0 0 0 2014-09-30 Greg Bellows New
[v5,10/33] target-arm: add non-secure Translation Block flag 0 0 0 2014-09-30 Greg Bellows New
[v5,09/33] target-arm: add macros to access banked registers 0 0 0 2014-09-30 Greg Bellows New
[v5,08/33] target-arm: add async excp target_el function 0 0 0 2014-09-30 Greg Bellows New
[v5,07/33] target-arm: extend async excp masking 0 0 0 2014-09-30 Greg Bellows New
[v5,06/33] target-arm: A32: Emulate the SMC instruction 0 0 0 2014-09-30 Greg Bellows New
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