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andy.doan@linaro.org
andy.doan@linaro.org
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Patch
Series
S/W/F
Date
Submitter
Delegate
State
[PULL,05/12] target/riscv: Fix implementation of HLVX.WU instruction
riscv-to-apply queue
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2020-10-23
Alistair Francis
New
[PULL,04/12] target/riscv: Fix update of hstatus.GVA in riscv_cpu_do_interrupt
riscv-to-apply queue
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2020-10-23
Alistair Francis
New
[PULL,03/12] target/riscv: Fix update of hstatus.SPVP
riscv-to-apply queue
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2020-10-23
Alistair Francis
New
[PULL,02/12] hw/intc: Move sifive_plic.h to the include directory
riscv-to-apply queue
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2020-10-23
Alistair Francis
New
[v2,4/4] hw/riscv: Load the kernel after the firmware
Allow loading a no MMU kernel
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2020-10-14
Alistair Francis
New
[v2,1/1] register: Remove unnecessary NULL check
[v2,1/1] register: Remove unnecessary NULL check
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2020-10-02
Alistair Francis
New
[v1,1/1] register: Remove unnecessary NULL check
[v1,1/1] register: Remove unnecessary NULL check
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2020-10-02
Alistair Francis
New
[v1,4/4] hw/riscv: Load the kernel after the firmware
Allow loading a no MMU kernel
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2020-10-02
Alistair Francis
New
[v1,3/4] hw/riscv: Add a riscv_is_32_bit() function
Allow loading a no MMU kernel
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2020-10-02
Alistair Francis
New
[v1,2/4] hw/riscv: Return the end address of the loaded firmware
Allow loading a no MMU kernel
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2020-10-02
Alistair Francis
New
[v1,1/4] hw/riscv: sifive_u: Allow specifying the CPU
Allow loading a no MMU kernel
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2020-10-02
Alistair Francis
New
[v2,1/1] riscv: Convert interrupt logs to use qemu_log_mask()
[v2,1/1] riscv: Convert interrupt logs to use qemu_log_mask()
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2020-10-02
Alistair Francis
New
[v1,1/1] riscv: Convert interrupt logs to use qemu_log_mask()
[v1,1/1] riscv: Convert interrupt logs to use qemu_log_mask()
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2020-09-27
Alistair Francis
New
[PULL,2/2] core/register: Specify instance_size in the TypeInfo
register queue
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2020-09-27
Alistair Francis
New
[PULL,1/2] load_elf: Remove unused address variables from callers
register queue
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2020-09-27
Alistair Francis
New
[PULL,30/30] hw/riscv: Sort the Kconfig options in alphabetical order
riscv-to-apply queue
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2020-09-10
Alistair Francis
New
[PULL,29/30] hw/riscv: Drop CONFIG_SIFIVE
riscv-to-apply queue
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2020-09-10
Alistair Francis
New
[PULL,28/30] hw/riscv: Always build riscv_hart.c
riscv-to-apply queue
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2020-09-10
Alistair Francis
New
[PULL,27/30] hw/riscv: Move sifive_test model to hw/misc
riscv-to-apply queue
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2020-09-10
Alistair Francis
New
[PULL,26/30] hw/riscv: Move sifive_uart model to hw/char
riscv-to-apply queue
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2020-09-10
Alistair Francis
New
[PULL,25/30] hw/riscv: Move riscv_htif model to hw/char
riscv-to-apply queue
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2020-09-10
Alistair Francis
New
[PULL,24/30] hw/riscv: Move sifive_plic model to hw/intc
riscv-to-apply queue
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2020-09-10
Alistair Francis
New
[PULL,23/30] hw/riscv: Move sifive_clint model to hw/intc
riscv-to-apply queue
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2020-09-10
Alistair Francis
New
[PULL,22/30] hw/riscv: Move sifive_gpio model to hw/gpio
riscv-to-apply queue
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2020-09-10
Alistair Francis
New
[PULL,21/30] hw/riscv: Move sifive_u_otp model to hw/misc
riscv-to-apply queue
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2020-09-10
Alistair Francis
New
[PULL,20/30] hw/riscv: Move sifive_u_prci model to hw/misc
riscv-to-apply queue
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2020-09-10
Alistair Francis
New
[PULL,19/30] hw/riscv: Move sifive_e_prci model to hw/misc
riscv-to-apply queue
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2020-09-10
Alistair Francis
New
[PULL,18/30] hw/riscv: sifive_u: Connect a DMA controller
riscv-to-apply queue
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2020-09-10
Alistair Francis
New
[PULL,17/30] hw/riscv: clint: Avoid using hard-coded timebase frequency
riscv-to-apply queue
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2020-09-10
Alistair Francis
New
[PULL,16/30] hw/riscv: microchip_pfsoc: Hook GPIO controllers
riscv-to-apply queue
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2020-09-10
Alistair Francis
New
[PULL,15/30] hw/riscv: microchip_pfsoc: Connect 2 Cadence GEMs
riscv-to-apply queue
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2020-09-10
Alistair Francis
New
[PULL,14/30] hw/arm: xlnx: Set all boards' GEM 'phy-addr' property value to 23
riscv-to-apply queue
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2020-09-10
Alistair Francis
New
[PULL,13/30] hw/net: cadence_gem: Add a new 'phy-addr' property
riscv-to-apply queue
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2020-09-10
Alistair Francis
New
[PULL,12/30] hw/riscv: microchip_pfsoc: Connect a DMA controller
riscv-to-apply queue
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2020-09-10
Alistair Francis
New
[PULL,11/30] hw/dma: Add SiFive platform DMA controller emulation
riscv-to-apply queue
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2020-09-10
Alistair Francis
New
[PULL,10/30] hw/riscv: microchip_pfsoc: Connect a Cadence SDHCI controller and an SD card
riscv-to-apply queue
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2020-09-10
Alistair Francis
New
[PULL,09/30] hw/sd: Add Cadence SDHCI emulation
riscv-to-apply queue
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2020-09-10
Alistair Francis
New
[PULL,08/30] hw/riscv: microchip_pfsoc: Connect 5 MMUARTs
riscv-to-apply queue
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2020-09-10
Alistair Francis
New
[PULL,07/30] hw/char: Add Microchip PolarFire SoC MMUART emulation
riscv-to-apply queue
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2020-09-10
Alistair Francis
New
[PULL,06/30] hw/riscv: Initial support for Microchip PolarFire SoC Icicle Kit board
riscv-to-apply queue
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2020-09-10
Alistair Francis
New
[PULL,05/30] target/riscv: cpu: Set reset vector based on the configured property value
riscv-to-apply queue
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2020-09-10
Alistair Francis
New
[PULL,04/30] hw/riscv: hart: Add a new 'resetvec' property
riscv-to-apply queue
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2020-09-10
Alistair Francis
New
[PULL,03/30] target/riscv: cpu: Add a new 'resetvec' property
riscv-to-apply queue
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2020-09-10
Alistair Francis
New
[PULL,02/30] riscv: sifive_test: Allow 16-bit writes to memory region
riscv-to-apply queue
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2020-09-10
Alistair Francis
New
[PULL,01/30] target/riscv: Fix bug in getting trap cause name for trace_riscv_trap
riscv-to-apply queue
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-
2020-09-10
Alistair Francis
New
[PULL,18/18] target/riscv: Support the Virtual Instruction fault
Untitled series #58182
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-
2020-08-25
Alistair Francis
New
[PULL,07/18] target/riscv: Allow generating hlv/hlvx/hsv instructions
Untitled series #58182
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-
2020-08-25
Alistair Francis
New
[PULL,03/18] hw/riscv: Add helpers for RISC-V multi-socket NUMA machines
Untitled series #58182
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-
-
2020-08-25
Alistair Francis
New
[PULL,v3,12/20] roms/Makefile: Build the generic platform for RISC-V OpenSBI firmware
[PULL,v3,01/20] target/riscv: Generate nanboxed results from fp helpers
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2020-08-22
Alistair Francis
New
[PULL,v3,05/20] target/riscv: Check nanboxed inputs in trans_rvf.inc.c
[PULL,v3,01/20] target/riscv: Generate nanboxed results from fp helpers
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2020-08-22
Alistair Francis
New
[PULL,v3,04/20] target/riscv: Check nanboxed inputs to fp helpers
[PULL,v3,01/20] target/riscv: Generate nanboxed results from fp helpers
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2020-08-22
Alistair Francis
New
[PULL,v3,03/20] target/riscv: Generate nanboxed results from trans_rvf.inc.c
[PULL,v3,01/20] target/riscv: Generate nanboxed results from fp helpers
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2020-08-22
Alistair Francis
New
[PULL,v3,02/20] target/riscv: Generalize gen_nanbox_fpr to gen_nanbox_s
[PULL,v3,01/20] target/riscv: Generate nanboxed results from fp helpers
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2020-08-22
Alistair Francis
New
[PULL,v3,01/20] target/riscv: Generate nanboxed results from fp helpers
[PULL,v3,01/20] target/riscv: Generate nanboxed results from fp helpers
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2020-08-22
Alistair Francis
New
[v1,1/1] core/register: Specify instance_size in the TypeInfo
[v1,1/1] core/register: Specify instance_size in the TypeInfo
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2020-08-22
Alistair Francis
New
[PULL,v2,10/20] configure: Create symbolic links for pc-bios/*.elf files
riscv-to-apply queue
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2020-08-14
Alistair Francis
New
[PULL,v2,06/20] target/riscv: Clean up fmv.w.x
riscv-to-apply queue
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2020-08-14
Alistair Francis
New
[PULL,v2,05/20] target/riscv: Check nanboxed inputs in trans_rvf.inc.c
riscv-to-apply queue
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-
2020-08-14
Alistair Francis
New
[PULL,v2,02/20] target/riscv: Generalize gen_nanbox_fpr to gen_nanbox_s
riscv-to-apply queue
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-
2020-08-14
Alistair Francis
New
[PULL,20/20] hw/intc: ibex_plic: Honour source priorities
riscv-to-apply queue
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2020-08-12
Alistair Francis
New
[PULL,19/20] hw/intc: ibex_plic: Don't allow repeat interrupts on claimed lines
riscv-to-apply queue
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2020-08-12
Alistair Francis
New
[PULL,16/20] target/riscv: Fix the translation of physical address
riscv-to-apply queue
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2020-08-12
Alistair Francis
New
[PULL,15/20] gitlab-ci/opensbi: Update GitLab CI to build generic platform
riscv-to-apply queue
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2020-08-12
Alistair Francis
New
[PULL,11/20] roms/opensbi: Upgrade from v0.7 to v0.8
riscv-to-apply queue
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2020-08-12
Alistair Francis
New
[PULL,09/20] riscv: Fix bug in setting pmpcfg CSR for RISCV64
riscv-to-apply queue
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2020-08-12
Alistair Francis
New
[PULL,08/20] hw/riscv: sifive_u: Add a dummy L2 cache controller device
riscv-to-apply queue
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2020-08-12
Alistair Francis
New
[PULL,07/20] target/riscv: check before allocating TCG temps
riscv-to-apply queue
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2020-08-12
Alistair Francis
New
[v3,11/13] target/riscv: Support the v0.6 Hypervisor extension CRSs
RISC-V: Update the Hypervisor spec to v0.6.1
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2020-08-12
Alistair Francis
New
[v3,07/13] target/riscv: Update the Hypervisor trap return/entry
RISC-V: Update the Hypervisor spec to v0.6.1
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2020-08-12
Alistair Francis
New
[v3,03/13] target/riscv: Do two-stage lookups on hlv/hlvx/hsv instructions
RISC-V: Update the Hypervisor spec to v0.6.1
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2020-08-12
Alistair Francis
New
[v3,02/13] target/riscv: Allow generating hlv/hlvx/hsv instructions
RISC-V: Update the Hypervisor spec to v0.6.1
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2020-08-12
Alistair Francis
New
[v1,1/3] hw/intc: ibex_plic: Update the pending irqs
hw/intc: A few fixes for the Ibex PLIC
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2020-07-25
Alistair Francis
New
[PULL,3/5] target/riscv: fix vector index load/store constraints
[PULL,1/5] goldfish_rtc: Fix non-atomic read behaviour of TIME_LOW/TIME_HIGH
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2020-07-22
Alistair Francis
New
[PULL,2/5] target/riscv: Quiet Coverity complains about vamo*
[PULL,1/5] goldfish_rtc: Fix non-atomic read behaviour of TIME_LOW/TIME_HIGH
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2020-07-22
Alistair Francis
New
[PULL,1/5] goldfish_rtc: Fix non-atomic read behaviour of TIME_LOW/TIME_HIGH
[PULL,1/5] goldfish_rtc: Fix non-atomic read behaviour of TIME_LOW/TIME_HIGH
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2020-07-22
Alistair Francis
New
[PULL,15/15] target/riscv: Fix pmp NA4 implementation
Untitled series #58977
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2020-07-14
Alistair Francis
New
[PULL,10/15] target/riscv: fix return value of do_opivx_widen()
Untitled series #58977
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2020-07-14
Alistair Francis
New
[PULL,07/15] hw/riscv: Modify MROM size to end at 0x10000
Untitled series #58977
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2020-07-14
Alistair Francis
New
[PULL,05/15] riscv: Add opensbi firmware dynamic support
Untitled series #58977
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2020-07-14
Alistair Francis
New
[PULL,04/15] RISC-V: Copy the fdt in dram instead of ROM
Untitled series #58977
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2020-07-14
Alistair Francis
New
[PULL,02/15] hw/riscv: virt: Sort the SoC memmap table entries
Untitled series #58977
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2020-07-14
Alistair Francis
New
[v2,v2,2/2] hw/char: Convert the Ibex UART to use the registerfields API
[v2,v2,1/2] hw/char: Convert the Ibex UART to use the qdev Clock model
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2020-07-09
Alistair Francis
New
[v2,v2,1/2] hw/char: Convert the Ibex UART to use the qdev Clock model
[v2,v2,1/2] hw/char: Convert the Ibex UART to use the qdev Clock model
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-
2020-07-09
Alistair Francis
New
[PULL,v2,57/64] target/riscv: vector element index instruction
[PULL,v2,01/64] riscv: plic: Honour source priorities
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-
-
2020-07-02
Alistair Francis
New
[PULL,v2,56/64] target/riscv: vector iota instruction
[PULL,v2,01/64] riscv: plic: Honour source priorities
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-
-
2020-07-02
Alistair Francis
New
[PULL,v2,49/64] target/riscv: vector wideing integer reduction instructions
[PULL,v2,01/64] riscv: plic: Honour source priorities
-
-
-
2020-07-02
Alistair Francis
New
[PULL,v2,48/64] target/riscv: vector single-width integer reduction instructions
[PULL,v2,01/64] riscv: plic: Honour source priorities
-
-
-
2020-07-02
Alistair Francis
New
[PULL,v2,46/64] target/riscv: widening floating-point/integer type-convert instructions
[PULL,v2,01/64] riscv: plic: Honour source priorities
-
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-
2020-07-02
Alistair Francis
New
[PULL,v2,44/64] target/riscv: vector floating-point merge instructions
[PULL,v2,01/64] riscv: plic: Honour source priorities
-
-
-
2020-07-02
Alistair Francis
New
[PULL,v2,42/64] target/riscv: vector floating-point compare instructions
[PULL,v2,01/64] riscv: plic: Honour source priorities
-
-
-
2020-07-02
Alistair Francis
New
[PULL,v2,40/64] target/riscv: vector floating-point min/max instructions
[PULL,v2,01/64] riscv: plic: Honour source priorities
-
-
-
2020-07-02
Alistair Francis
New
[PULL,v2,38/64] target/riscv: vector widening floating-point fused multiply-add instructions
[PULL,v2,01/64] riscv: plic: Honour source priorities
-
-
-
2020-07-02
Alistair Francis
New
[PULL,v2,37/64] target/riscv: vector single-width floating-point fused multiply-add instructions
[PULL,v2,01/64] riscv: plic: Honour source priorities
-
-
-
2020-07-02
Alistair Francis
New
[PULL,v2,23/64] target/riscv: vector widening integer multiply instructions
[PULL,v2,01/64] riscv: plic: Honour source priorities
-
-
-
2020-07-02
Alistair Francis
New
[PULL,v2,21/64] target/riscv: vector single-width integer multiply instructions
[PULL,v2,01/64] riscv: plic: Honour source priorities
-
-
-
2020-07-02
Alistair Francis
New
[PULL,v2,18/64] target/riscv: vector narrowing integer right shift instructions
[PULL,v2,01/64] riscv: plic: Honour source priorities
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-
-
2020-07-02
Alistair Francis
New
[PULL,v2,12/64] target/riscv: add vector amo operations
[PULL,v2,01/64] riscv: plic: Honour source priorities
-
-
-
2020-07-02
Alistair Francis
New
[PULL,v2,10/64] target/riscv: add vector index load and store instructions
[PULL,v2,01/64] riscv: plic: Honour source priorities
-
-
-
2020-07-02
Alistair Francis
New
[PULL,v2,09/64] target/riscv: add vector stride load and store instructions
[PULL,v2,01/64] riscv: plic: Honour source priorities
-
-
-
2020-07-02
Alistair Francis
New
[PULL,v2,08/64] target/riscv: add an internals.h header
[PULL,v2,01/64] riscv: plic: Honour source priorities
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-
2020-07-02
Alistair Francis
New
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