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Show patches with
: Series =
target-arm queue
| Archived =
No
| 36 patches
Series
Submitter
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Accepted
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Delegate
------
Nobody
andy.doan@linaro.org
andy.doan@linaro.org
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Patch
Series
S/W/F
Date
Submitter
Delegate
State
[PULL,36/36] hw/arm/virt: Add board property to enable EL2
target-arm queue
-
-
-
2017-01-19
Peter Maydell
Not Applicable
[PULL,35/36] target-arm: Enable EL2 feature bit on A53 and A57
target-arm queue
-
-
-
2017-01-19
Peter Maydell
Not Applicable
[PULL,34/36] target/arm/psci.c: If EL2 implemented, start CPUs in EL2
target-arm queue
-
-
-
2017-01-19
Peter Maydell
Accepted
[PULL,33/36] hw/arm/virt-acpi-build: use SMC if booting in EL2
target-arm queue
-
-
-
2017-01-19
Peter Maydell
Accepted
[PULL,32/36] hw/arm/virt: Support using SMC for PSCI
target-arm queue
-
-
-
2017-01-19
Peter Maydell
Not Applicable
[PULL,31/36] hw/intc/arm_gicv3: Implement EL2 traps for CPU i/f regs
target-arm queue
-
-
-
2017-01-19
Peter Maydell
Accepted
[PULL,30/36] hw/intc/arm_gicv3: Implement gicv3_cpuif_virt_update()
target-arm queue
-
-
-
2017-01-19
Peter Maydell
Not Applicable
[PULL,29/36] hw/intc/arm_gicv3: Implement ICV_ registers EOIR and IAR
target-arm queue
-
-
-
2017-01-19
Peter Maydell
Accepted
[PULL,28/36] hw/intc/arm_gicv3: Implement ICV_ HPPIR, DIR and RPR registers
target-arm queue
-
-
-
2017-01-19
Peter Maydell
Accepted
[PULL,27/36] hw/intc/arm_gicv3: Implement ICV_ registers which are just accessors
target-arm queue
-
-
-
2017-01-19
Peter Maydell
Accepted
[PULL,26/36] hw/intc/arm_gicv3: Add accessors for ICH_ system registers
target-arm queue
-
-
-
2017-01-19
Peter Maydell
Accepted
[PULL,25/36] hw/intc/gicv3: Add data fields for virtualization support
target-arm queue
-
-
-
2017-01-19
Peter Maydell
Not Applicable
[PULL,24/36] hw/intc/gicv3: Add defines for ICH system register fields
target-arm queue
-
-
-
2017-01-19
Peter Maydell
Accepted
[PULL,23/36] target-arm: Add ARMCPU fields for GIC CPU i/f config
target-arm queue
-
-
-
2017-01-19
Peter Maydell
Accepted
[PULL,22/36] hw/arm/virt: Wire VIRQ, VFIQ, maintenance irq lines from GIC to CPU
target-arm queue
-
-
-
2017-01-19
Peter Maydell
Not Applicable
[PULL,21/36] target-arm: Expose output GPIO line for VCPU maintenance interrupt
target-arm queue
-
-
-
2017-01-19
Peter Maydell
Not Applicable
[PULL,20/36] hw/intc/arm_gic: Add external IRQ lines for VIRQ and VFIQ
target-arm queue
-
-
-
2017-01-19
Peter Maydell
Not Applicable
[PULL,19/36] hw/intc/arm_gicv3: Add external IRQ lines for VIRQ and VFIQ
target-arm queue
-
-
-
2017-01-19
Peter Maydell
Not Applicable
[PULL,18/36] hw/arm/virt-acpi - reserve ECAM space as PNP0C02 device
target-arm queue
-
-
-
2017-01-19
Peter Maydell
Not Applicable
[PULL,17/36] arm: virt: Fix segmentation fault when specifying an unsupported CPU
target-arm queue
-
-
-
2017-01-19
Peter Maydell
Not Applicable
[PULL,16/36] aspeed: use first FMC flash as a boot ROM
target-arm queue
-
-
-
2017-01-19
Peter Maydell
Accepted
[PULL,15/36] aspeed/smc: extend tests for Command mode
target-arm queue
-
-
-
2017-01-19
Peter Maydell
Accepted
[PULL,14/36] aspeed/smc: reset flash after each test
target-arm queue
-
-
-
2017-01-19
Peter Maydell
Accepted
[PULL,13/36] aspeed/smc: handle SPI flash Command mode
target-arm queue
-
-
-
2017-01-19
Peter Maydell
Not Applicable
[PULL,12/36] aspeed/smc: adjust the size of the register region
target-arm queue
-
-
-
2017-01-19
Peter Maydell
Not Applicable
[PULL,11/36] aspeed/smc: unfold the AspeedSMCController array
target-arm queue
-
-
-
2017-01-19
Peter Maydell
Not Applicable
[PULL,10/36] aspeed/smc: autostrap CE0/1 configuration
target-arm queue
-
-
-
2017-01-19
Peter Maydell
Accepted
[PULL,09/36] aspeed/smc: rework the prototype of the AspeedSMCFlash helper routines
target-arm queue
-
-
-
2017-01-19
Peter Maydell
Accepted
[PULL,08/36] aspeed/smc: remove call to aspeed_smc_update_cs() in reset function
target-arm queue
-
-
-
2017-01-19
Peter Maydell
Accepted
[PULL,07/36] aspeed/smc: remove call to reset in realize function
target-arm queue
-
-
-
2017-01-19
Peter Maydell
Accepted
[PULL,06/36] target/arm: Implement DBGVCR32_EL2 system register
target-arm queue
-
-
-
2017-01-19
Peter Maydell
Accepted
[PULL,05/36] target/arm: Handle VIRQ and VFIQ in arm_cpu_do_interrupt_aarch32()
target-arm queue
-
-
-
2017-01-19
Peter Maydell
Accepted
[PULL,04/36] block: m25p80: Improve 1GiB Micron flash definition
target-arm queue
-
-
-
2017-01-19
Peter Maydell
Accepted
[PULL,03/36] block: m25p80: Introduce die erase command
target-arm queue
-
-
-
2017-01-19
Peter Maydell
Accepted
[PULL,02/36] block: m25p80: Add Quad Page Program 4byte
target-arm queue
-
-
-
2017-01-19
Peter Maydell
Not Applicable
[PULL,01/36] arm: Uniquely name imx25 I2C buses.
target-arm queue
-
-
-
2017-01-19
Peter Maydell
Accepted