Show patches with: Submitter = Richard Henderson       |    State = Action Required       |   5350 patches
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Patch Series S/W/F Date Submitter Delegate State
[17/17] Build elf test cases instead of raw binaries RISU misc updates --- 2024-05-11 Richard Henderson New
[16/17] configure: Enable loongarch64 RISU misc updates --- 2024-05-11 Richard Henderson New
[15/17] risu: Allow use of ELF test files RISU misc updates --- 2024-05-11 Richard Henderson New
[14/17] aarch64: Use bool for sve_{z,p}reg_is_eq RISU misc updates --- 2024-05-11 Richard Henderson New
[13/17] Use bool for reginfo_is_eq RISU misc updates --- 2024-05-11 Richard Henderson New
[12/17] aarch64: Trivial SME test RISU misc updates --- 2024-05-11 Richard Henderson New
[11/17] aarch64: Add support for ZA storage RISU misc updates --- 2024-05-11 Richard Henderson New
[10/17] aarch64: Tidy reginfo dumping ahead of ZA state RISU misc updates --- 2024-05-11 Richard Henderson New
[09/17] ppc64: Clean up reginfo_dump RISU misc updates --- 2024-05-11 Richard Henderson New
[08/17] ppc64: Simplify reginfo_is_eq RISU misc updates --- 2024-05-11 Richard Henderson New
[07/17] ppc64: Compare all bits of CCR RISU misc updates --- 2024-05-11 Richard Henderson New
[06/17] ppc64: Clean register values in reginfo_init RISU misc updates --- 2024-05-11 Richard Henderson New
[05/17] Remove return value from reginfo_dump RISU misc updates --- 2024-05-11 Richard Henderson New
[04/17] Add --fulldump and --diffdup options RISU misc updates --- 2024-05-11 Richard Henderson New
[03/17] Standardize reginfo_dump_mismatch printing RISU misc updates --- 2024-05-11 Richard Henderson New
[02/17] Fix load_image error check for mmap RISU misc updates --- 2024-05-11 Richard Henderson New
[01/17] ppc64: Fix <sys/user.h> include order RISU misc updates --- 2024-05-11 Richard Henderson New
tcg/loongarch64: Fill out tcg_out_{ld,st} for vector regs tcg/loongarch64: Fill out tcg_out_{ld,st} for vector regs --- 2024-05-10 Richard Henderson New
[PULL,5/9] accel/tcg: Introduce CF_BP_PAGE [PULL,1/9] tcg: Add write_aofs to GVecGen3i --- 2024-05-07 Richard Henderson New
[PULL,0/9] tcg + misc patch queue --- 2024-05-07 Richard Henderson New
gitlab: Rename ubuntu-22.04-s390x-all to *-system gitlab: Rename ubuntu-22.04-s390x-all to *-system --- 2024-05-06 Richard Henderson New
[57/57] target/arm: Convert SQDMULH, SQRDMULH to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-06 Richard Henderson New
[56/57] target/arm: Tidy SQDMULH, SQRDMULH (vector) target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-06 Richard Henderson New
[55/57] target/arm: Convert MLA, MLS to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-06 Richard Henderson New
[54/57] target/arm: Convert MUL, PMUL to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-06 Richard Henderson New
[53/57] target/arm: Convert SABA, SABD, UABA, UABD to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-06 Richard Henderson New
[52/57] target/arm: Convert SMAX, SMIN, UMAX, UMIN to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-06 Richard Henderson New
[51/57] target/arm: Convert SRHADD, URHADD to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-06 Richard Henderson New
[50/57] target/arm: Convert SRHADD, URHADD to gvec target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-06 Richard Henderson New
[49/57] target/arm: Convert SHSUB, UHSUB to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-06 Richard Henderson New
[48/57] target/arm: Convert SHSUB, UHSUB to gvec target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-06 Richard Henderson New
[47/57] target/arm: Convert SHADD, UHADD to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-06 Richard Henderson New
[46/57] target/arm: Convert SHADD, UHADD to gvec target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-06 Richard Henderson New
[45/57] target/arm: Use TCG_COND_TSTNE in gen_cmtst_{i32,i64} target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-06 Richard Henderson New
[44/57] target/arm: Convert CMGT, CMHI, CMGE, CMHS, CMTST, CMEQ to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-06 Richard Henderson New
[43/57] target/arm: Convert ADD, SUB (vector) to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-06 Richard Henderson New
[42/57] target/arm: Convert SQRSHL, UQRSHL to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-06 Richard Henderson New
[41/57] target/arm: Convert SQRSHL and UQRSHL (register) to gvec target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-06 Richard Henderson New
[40/57] target/arm: Convert SQSHL, UQSHL to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-06 Richard Henderson New
[39/57] target/arm: Convert SQSHL and UQSHL (register) to gvec target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-06 Richard Henderson New
[38/57] target/arm: Convert SRSHL, URSHL to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-06 Richard Henderson New
[37/57] target/arm: Convert SRSHL and URSHL (register) to gvec target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-06 Richard Henderson New
[36/57] target/arm: Convert SSHL, USHL to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-06 Richard Henderson New
[35/57] target/arm: Convert SUQADD, USQADD to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-06 Richard Henderson New
[34/57] target/arm: Convert SQADD, SQSUB, UQADD, UQSUB to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-06 Richard Henderson New
[33/57] target/arm: Inline scalar SQADD, UQADD, SQSUB, UQSUB target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-06 Richard Henderson New
[32/57] target/arm: Inline scalar SUQADD and USQADD target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-06 Richard Henderson New
[31/57] target/arm: Convert SUQADD and USQADD to gvec target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-06 Richard Henderson New
[30/57] target/arm: Improve vector UQADD, UQSUB, SQADD, SQSUB target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-06 Richard Henderson New
[29/57] target/arm: Convert disas_simd_3same_logic to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-06 Richard Henderson New
[28/57] target/arm: Convert FMLAL, FMLSL to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-06 Richard Henderson New
[27/57] target/arm: Use gvec for neon pmax, pmin target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-06 Richard Henderson New
[26/57] target/arm: Convert SMAXP, SMINP, UMAXP, UMINP to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-06 Richard Henderson New
[25/57] target/arm: Use gvec for neon padd target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-06 Richard Henderson New
[24/57] target/arm: Convert ADDP to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-06 Richard Henderson New
[23/57] target/arm: Use gvec for neon faddp, fmaxp, fminp target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-06 Richard Henderson New
[22/57] target/arm: Convert FMAXP, FMINP, FMAXNMP, FMINNMP to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-06 Richard Henderson New
[21/57] target/arm: Convert FADDP to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-06 Richard Henderson New
[20/57] target/arm: Convert FRECPS, FRSQRTS to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-06 Richard Henderson New
[19/57] target/arm: Convert FABD to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-06 Richard Henderson New
[18/57] target/arm: Convert FCMEQ, FCMGE, FCMGT, FACGE, FACGT to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-06 Richard Henderson New
[17/57] target/arm: Convert FMLA, FMLS to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-06 Richard Henderson New
[16/57] target/arm: Convert FNMUL to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-06 Richard Henderson New
[15/57] target/arm: Expand vfp neg and abs inline target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-06 Richard Henderson New
[14/57] target/arm: Convert FMAX, FMIN, FMAXNM, FMINNM to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-06 Richard Henderson New
[13/57] target/arm: Convert FADD, FSUB, FDIV, FMUL to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-06 Richard Henderson New
[12/57] target/arm: Convert FMULX to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-06 Richard Henderson New
[11/57] target/arm: Convert Advanced SIMD copy to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-06 Richard Henderson New
[10/57] target/arm: Convert XAR to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-06 Richard Henderson New
[09/57] target/arm: Convert Cryptographic 3-register, imm2 to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-06 Richard Henderson New
[08/57] target/arm: Convert Cryptographic 4-register to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-06 Richard Henderson New
[07/57] target/arm: Convert Cryptographic 2-register SHA512 to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-06 Richard Henderson New
[06/57] target/arm: Convert Cryptographic 3-register SHA512 to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-06 Richard Henderson New
[05/57] target/arm: Convert Cryptographic 2-register SHA to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-06 Richard Henderson New
[04/57] target/arm: Convert Cryptographic 3-register SHA to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-06 Richard Henderson New
[03/57] target/arm: Convert Cryptographic AES to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-06 Richard Henderson New
[02/57] target/arm: Split out gengvec64.c target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-06 Richard Henderson New
[01/57] target/arm: Split out gengvec.c target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-06 Richard Henderson New
[PULL,3/9] target/alpha: Use DISAS_NEXT definition instead of magic '0' value [PULL,1/9] target/alpha: Use cpu_env in preference to ALPHA_CPU --- 2024-05-04 Richard Henderson New
[PULL,0/9] target/alpha: Implement CF_PCREL --- 2024-05-04 Richard Henderson New
[PULL,08/10] util/bufferiszero: Simplify test_buffer_is_zero_next_accel [PULL,01/10] util/bufferiszero: Remove SSE4.1 variant --- 2024-05-03 Richard Henderson New
[PULL,06/10] util/bufferiszero: Improve scalar variant [PULL,01/10] util/bufferiszero: Remove SSE4.1 variant --- 2024-05-03 Richard Henderson New
[PULL,05/10] util/bufferiszero: Optimize SSE2 and AVX2 variants [PULL,01/10] util/bufferiszero: Remove SSE4.1 variant --- 2024-05-03 Richard Henderson New
[PULL,00/10] bufferiszero improvements --- 2024-05-03 Richard Henderson New
[v2,4/7] target/sparc: Fix FMUL8x16A{U,L} target/sparc: vis fixes --- 2024-05-02 Richard Henderson New
[14/14] tests/tcg/s390x: Add per.S target/s390x: Fix and improve PER --- 2024-05-02 Richard Henderson New
[13/14] target/s390x: Adjust check of noreturn in translate_one target/s390x: Fix and improve PER --- 2024-05-02 Richard Henderson New
[12/14] target/s390x: Simplify per_ifetch, per_check_exception target/s390x: Fix and improve PER --- 2024-05-02 Richard Henderson New
[11/14] target/s390x: Fix helper_per_ifetch flags target/s390x: Fix and improve PER --- 2024-05-02 Richard Henderson New
[10/14] target/s390x: Raise exception from per_store_real target/s390x: Fix and improve PER --- 2024-05-02 Richard Henderson New
[09/14] target/s390x: Raise exception from helper_per_branch target/s390x: Fix and improve PER --- 2024-05-02 Richard Henderson New
[08/14] target/s390x: Split per_breaking_event from per_branch_* target/s390x: Fix and improve PER --- 2024-05-02 Richard Henderson New
[07/14] target/s390x: Simplify help_branch target/s390x: Fix and improve PER --- 2024-05-02 Richard Henderson New
[06/14] target/s390x: Introduce help_goto_indirect target/s390x: Fix and improve PER --- 2024-05-02 Richard Henderson New
[05/14] target/s390x: Disable conditional branch-to-next for PER target/s390x: Fix and improve PER --- 2024-05-02 Richard Henderson New
[04/14] target/s390x: Record separate PER bits in TB flags target/s390x: Fix and improve PER --- 2024-05-02 Richard Henderson New
[03/14] target/s390x: Update CR9 bits target/s390x: Fix and improve PER --- 2024-05-02 Richard Henderson New
[02/14] target/s390x: Move cpu_get_tb_cpu_state out of line target/s390x: Fix and improve PER --- 2024-05-02 Richard Henderson New
[01/14] target/s390x: Do not use unwind for per_check_exception target/s390x: Fix and improve PER --- 2024-05-02 Richard Henderson New
[PULL,18/20] plugins: Merge qemu_plugin_tb_insn_get to plugin-gen.c [PULL,01/20] tcg: Make tcg/helper-info.h self-contained --- 2024-05-01 Richard Henderson New
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