From patchwork Tue Mar 29 14:08:18 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 825 Return-Path: Delivered-To: unknown Received: from imap.gmail.com (74.125.159.109) by localhost6.localdomain6 with IMAP4-SSL; 08 Jun 2011 14:46:11 -0000 Delivered-To: patches@linaro.org Received: by 10.42.161.68 with SMTP id s4cs190870icx; Tue, 29 Mar 2011 07:08:32 -0700 (PDT) Received: by 10.204.168.66 with SMTP id t2mr4680320bky.53.1301407710769; Tue, 29 Mar 2011 07:08:30 -0700 (PDT) Received: from mnementh.archaic.org.uk (mnementh.archaic.org.uk [81.2.115.146]) by mx.google.com with ESMTPS id c1si14736776bky.62.2011.03.29.07.08.27 (version=TLSv1/SSLv3 cipher=OTHER); Tue, 29 Mar 2011 07:08:29 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of pm215@archaic.org.uk designates 81.2.115.146 as permitted sender) client-ip=81.2.115.146; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of pm215@archaic.org.uk designates 81.2.115.146 as permitted sender) smtp.mail=pm215@archaic.org.uk Received: from pm215 by mnementh.archaic.org.uk with local (Exim 4.72) (envelope-from ) id 1Q4Zaq-0006OI-Rl; Tue, 29 Mar 2011 15:08:24 +0100 From: Peter Maydell To: qemu-devel@nongnu.org Cc: patches@linaro.org, Blue Swirl Subject: [PATCH v3 1/7] Allow boards to specify maximum RAM size Date: Tue, 29 Mar 2011 15:08:18 +0100 Message-Id: <1301407704-24541-2-git-send-email-peter.maydell@linaro.org> X-Mailer: git-send-email 1.7.2.5 In-Reply-To: <1301407704-24541-1-git-send-email-peter.maydell@linaro.org> References: <1301407704-24541-1-git-send-email-peter.maydell@linaro.org> Allow boards to specify their maximum RAM size in the QEMUMachine struct. This allows us to provide a useful diagnostic if the user tries to specify a RAM size that the board cannot support. Signed-off-by: Peter Maydell --- hw/boards.h | 1 + vl.c | 16 +++++++++++++++- 2 files changed, 16 insertions(+), 1 deletions(-) diff --git a/hw/boards.h b/hw/boards.h index 6f0f0d7..5f41fce 100644 --- a/hw/boards.h +++ b/hw/boards.h @@ -19,6 +19,7 @@ typedef struct QEMUMachine { QEMUMachineInitFunc *init; int use_scsi; int max_cpus; + target_phys_addr_t max_ram; unsigned int no_serial:1, no_parallel:1, use_virtcon:1, diff --git a/vl.c b/vl.c index 192a240..69cb29b 100644 --- a/vl.c +++ b/vl.c @@ -166,6 +166,9 @@ int main(int argc, char **argv) //#define DEBUG_NET //#define DEBUG_SLIRP +/* Note that this default RAM size is capped to any maximum + * RAM size specified in the board's QEMUMachine struct. + */ #define DEFAULT_RAM_SIZE 128 #define MAX_VIRTIO_CONSOLES 1 @@ -3046,8 +3049,19 @@ int main(int argc, char **argv, char **envp) exit(1); /* init the memory */ - if (ram_size == 0) + if (ram_size == 0) { ram_size = DEFAULT_RAM_SIZE * 1024 * 1024; + if (machine->max_ram) { + ram_size = MIN(ram_size, machine->max_ram); + } + } else if (machine->max_ram && ram_size > machine->max_ram) { + /* Since you can only specify ram_size on the command line in MB it's + * OK to round down when printing the machine's maximum. + */ + fprintf(stderr, "qemu: maximum permitted RAM size for '%s' is %ldM\n", + machine->name, (ram_addr_t)(machine->max_ram / (1024 * 1024))); + exit(1); + } /* init the dynamic translator */ cpu_exec_init_all(tb_size * 1024 * 1024);