From patchwork Mon Dec 5 16:40:17 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 5460 Return-Path: X-Original-To: patchwork@peony.canonical.com Delivered-To: patchwork@peony.canonical.com Received: from fiordland.canonical.com (fiordland.canonical.com [91.189.94.145]) by peony.canonical.com (Postfix) with ESMTP id C0B5223E2A for ; Mon, 5 Dec 2011 16:40:27 +0000 (UTC) Received: from mail-lpp01m010-f52.google.com (mail-lpp01m010-f52.google.com [209.85.215.52]) by fiordland.canonical.com (Postfix) with ESMTP id A5973A18442 for ; Mon, 5 Dec 2011 16:40:27 +0000 (UTC) Received: by lagm6 with SMTP id m6so354087lag.11 for ; Mon, 05 Dec 2011 08:40:27 -0800 (PST) Received: by 10.152.122.34 with SMTP id lp2mr6588010lab.20.1323103227382; Mon, 05 Dec 2011 08:40:27 -0800 (PST) X-Forwarded-To: linaro-patchwork@canonical.com X-Forwarded-For: patch@linaro.org linaro-patchwork@canonical.com Delivered-To: patches@linaro.org Received: by 10.152.41.198 with SMTP id h6cs266700lal; Mon, 5 Dec 2011 08:40:27 -0800 (PST) Received: by 10.180.80.162 with SMTP id s2mr13604562wix.27.1323103224408; Mon, 05 Dec 2011 08:40:24 -0800 (PST) Received: from mnementh.archaic.org.uk (mnementh.archaic.org.uk. [81.2.115.146]) by mx.google.com with ESMTPS id eo20si10314672wbb.60.2011.12.05.08.40.23 (version=TLSv1/SSLv3 cipher=OTHER); Mon, 05 Dec 2011 08:40:24 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of pm215@archaic.org.uk designates 81.2.115.146 as permitted sender) client-ip=81.2.115.146; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of pm215@archaic.org.uk designates 81.2.115.146 as permitted sender) smtp.mail=pm215@archaic.org.uk Received: from pm215 by mnementh.archaic.org.uk with local (Exim 4.72) (envelope-from ) id 1RXbaW-0000Qx-Qu; Mon, 05 Dec 2011 16:40:20 +0000 From: Peter Maydell To: qemu-devel@nongnu.org Cc: patches@linaro.org, Bill Carson Subject: [PATCH 4/7] hw/realview_gic: Use GIC memory region for the CPU interface Date: Mon, 5 Dec 2011 16:40:17 +0000 Message-Id: <1323103220-1636-5-git-send-email-peter.maydell@linaro.org> X-Mailer: git-send-email 1.7.2.5 In-Reply-To: <1323103220-1636-1-git-send-email-peter.maydell@linaro.org> References: <1323103220-1636-1-git-send-email-peter.maydell@linaro.org> Use the GIC provided memory region for the CPU interface rather than implementing our own. Signed-off-by: Peter Maydell --- hw/realview_gic.c | 25 +------------------------ 1 files changed, 1 insertions(+), 24 deletions(-) diff --git a/hw/realview_gic.c b/hw/realview_gic.c index 479f939..8c4d509 100644 --- a/hw/realview_gic.c +++ b/hw/realview_gic.c @@ -23,36 +23,13 @@ gic_get_current_cpu(void) typedef struct { gic_state gic; - MemoryRegion iomem; MemoryRegion container; } RealViewGICState; -static uint64_t realview_gic_cpu_read(void *opaque, target_phys_addr_t offset, - unsigned size) -{ - gic_state *s = (gic_state *)opaque; - return gic_cpu_read(s, gic_get_current_cpu(), offset); -} - -static void realview_gic_cpu_write(void *opaque, target_phys_addr_t offset, - uint64_t value, unsigned size) -{ - gic_state *s = (gic_state *)opaque; - gic_cpu_write(s, gic_get_current_cpu(), offset, value); -} - -static const MemoryRegionOps realview_gic_cpu_ops = { - .read = realview_gic_cpu_read, - .write = realview_gic_cpu_write, - .endianness = DEVICE_NATIVE_ENDIAN, -}; - static void realview_gic_map_setup(RealViewGICState *s) { memory_region_init(&s->container, "realview-gic-container", 0x2000); - memory_region_init_io(&s->iomem, &realview_gic_cpu_ops, &s->gic, - "realview-gic", 0x1000); - memory_region_add_subregion(&s->container, 0, &s->iomem); + memory_region_add_subregion(&s->container, 0, &s->gic.cpuiomem[0]); memory_region_add_subregion(&s->container, 0x1000, &s->gic.iomem); }