From patchwork Tue Jan 24 12:39:16 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 6369 Return-Path: X-Original-To: patchwork@peony.canonical.com Delivered-To: patchwork@peony.canonical.com Received: from fiordland.canonical.com (fiordland.canonical.com [91.189.94.145]) by peony.canonical.com (Postfix) with ESMTP id 9397F23ECC for ; Tue, 24 Jan 2012 12:39:25 +0000 (UTC) Received: from mail-bk0-f52.google.com (mail-bk0-f52.google.com [209.85.214.52]) by fiordland.canonical.com (Postfix) with ESMTP id 776A6A1835F for ; Tue, 24 Jan 2012 12:39:25 +0000 (UTC) Received: by bkar19 with SMTP id r19so3955104bka.11 for ; Tue, 24 Jan 2012 04:39:25 -0800 (PST) MIME-Version: 1.0 Received: by 10.205.130.12 with SMTP id hk12mr4781227bkc.56.1327408765164; Tue, 24 Jan 2012 04:39:25 -0800 (PST) X-Forwarded-To: linaro-patchwork@canonical.com X-Forwarded-For: patch@linaro.org linaro-patchwork@canonical.com Delivered-To: patches@linaro.org Received: by 10.204.130.220 with SMTP id u28cs99701bks; Tue, 24 Jan 2012 04:39:24 -0800 (PST) Received: by 10.180.100.228 with SMTP id fb4mr20481167wib.1.1327408763318; Tue, 24 Jan 2012 04:39:23 -0800 (PST) Received: from mnementh.archaic.org.uk (mnementh.archaic.org.uk. [81.2.115.146]) by mx.google.com with ESMTPS id v57si11757698weq.126.2012.01.24.04.39.22 (version=TLSv1/SSLv3 cipher=OTHER); Tue, 24 Jan 2012 04:39:23 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of pm215@archaic.org.uk designates 81.2.115.146 as permitted sender) client-ip=81.2.115.146; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of pm215@archaic.org.uk designates 81.2.115.146 as permitted sender) smtp.mail=pm215@archaic.org.uk Received: from pm215 by mnementh.archaic.org.uk with local (Exim 4.72) (envelope-from ) id 1Rpfei-0000xl-Ub; Tue, 24 Jan 2012 12:39:20 +0000 From: Peter Maydell To: qemu-devel@nongnu.org Cc: patches@linaro.org, =?UTF-8?q?Andreas=20F=C3=A4rber?= Subject: [PATCH v2 5/9] hw/vexpress.c: Move secondary CPU boot code to SRAM Date: Tue, 24 Jan 2012 12:39:16 +0000 Message-Id: <1327408760-3666-6-git-send-email-peter.maydell@linaro.org> X-Mailer: git-send-email 1.7.2.5 In-Reply-To: <1327408760-3666-1-git-send-email-peter.maydell@linaro.org> References: <1327408760-3666-1-git-send-email-peter.maydell@linaro.org> X-Gm-Message-State: ALoCoQkUU2QP2zxrMSe0qY2GAEe8f9QJ68Kgd1EgXdQ8KaEks1ooWjh94cxcyVB/t2wd4XhsWJgp On real Versatile Express hardware, the boot ROM puts the secondary CPU bootcode/holding pen in SRAM. We can therefore rely on Linux not trashing this memory until secondary CPUs have booted up, and can put our QEMU-specific pen code in the same place. This allows us to drop the odd "hack" RAM page we were using before. Signed-off-by: Peter Maydell --- hw/vexpress.c | 16 ++-------------- 1 files changed, 2 insertions(+), 14 deletions(-) diff --git a/hw/vexpress.c b/hw/vexpress.c index 8c4d3b3..99a9690 100644 --- a/hw/vexpress.c +++ b/hw/vexpress.c @@ -30,13 +30,9 @@ #include "boards.h" #include "exec-memory.h" -#define SMP_BOOT_ADDR 0xe0000000 - #define VEXPRESS_BOARD_ID 0x8e0 -static struct arm_boot_info vexpress_binfo = { - .smp_loader_start = SMP_BOOT_ADDR, -}; +static struct arm_boot_info vexpress_binfo; /* Address maps for peripherals: * the Versatile Express motherboard has two possible maps, @@ -118,7 +114,6 @@ static void vexpress_a9_init(ram_addr_t ram_size, MemoryRegion *lowram = g_new(MemoryRegion, 1); MemoryRegion *vram = g_new(MemoryRegion, 1); MemoryRegion *sram = g_new(MemoryRegion, 1); - MemoryRegion *hackram = g_new(MemoryRegion, 1); DeviceState *dev, *sysctl, *pl041; SysBusDevice *busdev; qemu_irq *irqp; @@ -275,14 +270,6 @@ static void vexpress_a9_init(ram_addr_t ram_size, /* VE_DAPROM: not modelled */ - /* ??? Hack to map an additional page of ram for the secondary CPU - startup code. I guess this works on real hardware because the - BootROM happens to be in ROM/flash or in memory that isn't clobbered - until after Linux boots the secondary CPUs. */ - memory_region_init_ram(hackram, "vexpress.hack", 0x1000); - vmstate_register_ram_global(hackram); - memory_region_add_subregion(sysmem, SMP_BOOT_ADDR, hackram); - vexpress_binfo.ram_size = ram_size; vexpress_binfo.kernel_filename = kernel_filename; vexpress_binfo.kernel_cmdline = kernel_cmdline; @@ -290,6 +277,7 @@ static void vexpress_a9_init(ram_addr_t ram_size, vexpress_binfo.nb_cpus = smp_cpus; vexpress_binfo.board_id = VEXPRESS_BOARD_ID; vexpress_binfo.loader_start = 0x60000000; + vexpress_binfo.smp_loader_start = map[VE_SRAM]; vexpress_binfo.smp_bootreg_addr = map[VE_SYSREGS] + 0x30; arm_load_kernel(first_cpu, &vexpress_binfo); }