From patchwork Wed May 9 14:54:37 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 8504 Return-Path: X-Original-To: patchwork@peony.canonical.com Delivered-To: patchwork@peony.canonical.com Received: from fiordland.canonical.com (fiordland.canonical.com [91.189.94.145]) by peony.canonical.com (Postfix) with ESMTP id B7B4123E13 for ; Wed, 9 May 2012 14:54:43 +0000 (UTC) Received: from mail-we0-f180.google.com (mail-we0-f180.google.com [74.125.82.180]) by fiordland.canonical.com (Postfix) with ESMTP id A7E61A18038 for ; Wed, 9 May 2012 14:54:43 +0000 (UTC) Received: by werp13 with SMTP id p13so327119wer.11 for ; Wed, 09 May 2012 07:54:43 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=x-forwarded-to:x-forwarded-for:delivered-to:received-spf:from:to:cc :subject:date:message-id:x-mailer:x-gm-message-state; bh=X9fiYxYzhhuJaSKBVHKrmE0TznRGQXdogkfNr2Palnw=; b=jGTT9er0GpA7ky0CW8cpBbXNFg7OE3Jlpk7rW7rsGIAm+DxtXrOfuz5RqSAFkvM2rz 6VxK3dIaaJpg22wFO8kNNdH2MBl328GV55I6ajXjpE34BpDAl3btfOenBzwQ4sqLc25g 1oWg9ENsq03IGJPQYIQvvLJSyGn4p110BFCr6c4xnw52/75qVaL3tsDTLV2opZ2J4E6i R0IL6MGNvyztIql8KmJxfCCBOxZVhbaB/mk3P0Vr17UN4dGWe0GTLZ9VOTnY0tuj8HoZ 5kUWdZXP4EnWLDzmYvwdw9vZ8UHZI+ZfxK75gNj+pOCoQP7KhxMqU3H0Kbxm/ELpRDgz oNvw== Received: by 10.50.220.136 with SMTP id pw8mr290754igc.1.1336575282726; Wed, 09 May 2012 07:54:42 -0700 (PDT) X-Forwarded-To: linaro-patchwork@canonical.com X-Forwarded-For: patch@linaro.org linaro-patchwork@canonical.com Delivered-To: patches@linaro.org Received: by 10.231.73.147 with SMTP id q19csp22226ibj; Wed, 9 May 2012 07:54:41 -0700 (PDT) Received: by 10.180.101.103 with SMTP id ff7mr1083925wib.6.1336575281357; Wed, 09 May 2012 07:54:41 -0700 (PDT) Received: from mnementh.archaic.org.uk (mnementh.archaic.org.uk. [81.2.115.146]) by mx.google.com with ESMTPS id co9si3829382wib.23.2012.05.09.07.54.40 (version=TLSv1/SSLv3 cipher=OTHER); Wed, 09 May 2012 07:54:41 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of pm215@archaic.org.uk designates 81.2.115.146 as permitted sender) client-ip=81.2.115.146; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of pm215@archaic.org.uk designates 81.2.115.146 as permitted sender) smtp.mail=pm215@archaic.org.uk Received: from pm215 by mnementh.archaic.org.uk with local (Exim 4.72) (envelope-from ) id 1SS8Hl-0003La-LD; Wed, 09 May 2012 15:54:37 +0100 From: Peter Maydell To: qemu-devel@nongnu.org Cc: patches@linaro.org, =?UTF-8?q?Andreas=20F=C3=A4rber?= Subject: [PATCH for-1.1] target-arm: Fix crash when passed "-cpu foo" Date: Wed, 9 May 2012 15:54:37 +0100 Message-Id: <1336575277-12840-1-git-send-email-peter.maydell@linaro.org> X-Mailer: git-send-email 1.7.2.5 X-Gm-Message-State: ALoCoQm0ltj5eSqxsfk0HPojkM4JuDzZQEJkeuyY2vtypjm6XaP9NP9tYxMQTw2K8zxcr/qr4TYM The macro definition of cpu_init meant that if cpu_arm_init() returned NULL this wouldn't result in cpu_init() itself returning NULL. This had the effect that "-cpu foo" for some unknown CPU name 'foo' would cause ARM targets to segfault rather than generating a useful error message. Fix this by making cpu_init a simple inline function. Signed-off-by: Peter Maydell Acked-by: Andreas Färber --- I did a quick grep and I think ARM is the only target at the moment where we've made this change to cpu_init -- is that right, Andreas? target-arm/cpu.h | 10 +++++++++- 1 files changed, 9 insertions(+), 1 deletions(-) diff --git a/target-arm/cpu.h b/target-arm/cpu.h index 5eac070..d01285f 100644 --- a/target-arm/cpu.h +++ b/target-arm/cpu.h @@ -458,7 +458,15 @@ void cpu_arm_set_cp_io(CPUARMState *env, int cpnum, #define TARGET_PHYS_ADDR_SPACE_BITS 32 #define TARGET_VIRT_ADDR_SPACE_BITS 32 -#define cpu_init(model) (&cpu_arm_init(model)->env) +static inline CPUARMState *cpu_init(const char *cpu_model) +{ + ARMCPU *cpu = cpu_arm_init(cpu_model); + if (cpu) { + return &cpu->env; + } + return NULL; +} + #define cpu_exec cpu_arm_exec #define cpu_gen_code cpu_arm_gen_code #define cpu_signal_handler cpu_arm_signal_handler