From patchwork Thu Jun 28 14:35:54 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 9677 Return-Path: X-Original-To: patchwork@peony.canonical.com Delivered-To: patchwork@peony.canonical.com Received: from fiordland.canonical.com (fiordland.canonical.com [91.189.94.145]) by peony.canonical.com (Postfix) with ESMTP id E246723E1B for ; Thu, 28 Jun 2012 14:36:17 +0000 (UTC) Received: from mail-gh0-f180.google.com (mail-gh0-f180.google.com [209.85.160.180]) by fiordland.canonical.com (Postfix) with ESMTP id A734BA1893D for ; Thu, 28 Jun 2012 14:36:17 +0000 (UTC) Received: by ghbz12 with SMTP id z12so2079625ghb.11 for ; Thu, 28 Jun 2012 07:36:17 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=x-forwarded-to:x-forwarded-for:delivered-to:received-spf:from:to:cc :subject:date:message-id:x-mailer:in-reply-to:references :x-gm-message-state; bh=ynSvqYcKztVG0Q2jpl4L5BfrXG2ghA3l6Mc9tTFDqqg=; b=fqcVFy8e7eKok/VltvHnPDG4Co1wtz3TqlyMjlvTk9dtaERfbPAqk7F4hfRmnWQkUE +l6jjLHdcbeA0rHDJbYBI78xG5QSUiFEP9xXkmVlk0lOpzqEgq7r1xtmOaFKKRgK2Gaq 4JQ10K1zesz1gTpkWQm2mmP08iomrIyQ5w9mCd1yL9f067lysC6i6V5cSgkiXWT/Wz+7 FZsEldytNmtE33X+1Z1RtlY9vHhzpLiItwO9VjQ4adB/gQqRk3BFaxhkmaPCnlD3ClxO 5uyk0Sjm0XA7zV8vYGBOKRANU27DYwtMM9BefwrN0jnlvTMR4GOBTA31H44TcOEvyQ33 FvSA== Received: by 10.50.203.39 with SMTP id kn7mr109688igc.53.1340894173090; Thu, 28 Jun 2012 07:36:13 -0700 (PDT) X-Forwarded-To: linaro-patchwork@canonical.com X-Forwarded-For: patch@linaro.org linaro-patchwork@canonical.com Delivered-To: patches@linaro.org Received: by 10.231.24.148 with SMTP id v20csp43428ibb; Thu, 28 Jun 2012 07:36:10 -0700 (PDT) Received: by 10.180.104.168 with SMTP id gf8mr9344wib.12.1340894170087; Thu, 28 Jun 2012 07:36:10 -0700 (PDT) Received: from mnementh.archaic.org.uk (mnementh.archaic.org.uk. [81.2.115.146]) by mx.google.com with ESMTPS id p4si685392wia.2.2012.06.28.07.36.09 (version=TLSv1/SSLv3 cipher=OTHER); Thu, 28 Jun 2012 07:36:10 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of pm215@archaic.org.uk designates 81.2.115.146 as permitted sender) client-ip=81.2.115.146; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of pm215@archaic.org.uk designates 81.2.115.146 as permitted sender) smtp.mail=pm215@archaic.org.uk Received: from pm215 by mnementh.archaic.org.uk with local (Exim 4.72) (envelope-from ) id 1SkFpG-0008MI-92; Thu, 28 Jun 2012 15:36:06 +0100 From: Peter Maydell To: qemu-devel@nongnu.org Cc: patches@linaro.org Subject: [PATCH 01/13] hw/cadence_gem: Make rx_desc_addr and tx_desc_addr uint32_t Date: Thu, 28 Jun 2012 15:35:54 +0100 Message-Id: <1340894166-32105-2-git-send-email-peter.maydell@linaro.org> X-Mailer: git-send-email 1.7.2.5 In-Reply-To: <1340894166-32105-1-git-send-email-peter.maydell@linaro.org> References: <1340894166-32105-1-git-send-email-peter.maydell@linaro.org> X-Gm-Message-State: ALoCoQl30pVNWonj2e86uCQq1FuexMaAuV5Yzp/9bgEejADWaLbKdQDxUNiIjhgkbDeQKPw5bliA Make the state fields rx_desc_addr and tx_desc_addr uint32_t; this matches the VMStateDescription, and also conforms to how hardware works: the registers don't magically become larger if the device is attached to a CPU with a larger physical address size. It also fixes a compile failure if the target_phys_addr_t type is changed to 64 bits. Signed-off-by: Peter Maydell Reviewed-by: Peter A. G. Crosthwaite --- hw/cadence_gem.c | 4 ++-- 1 files changed, 2 insertions(+), 2 deletions(-) diff --git a/hw/cadence_gem.c b/hw/cadence_gem.c index dbde392..87143ca 100644 --- a/hw/cadence_gem.c +++ b/hw/cadence_gem.c @@ -339,8 +339,8 @@ typedef struct { uint8_t phy_loop; /* Are we in phy loopback? */ /* The current DMA descriptor pointers */ - target_phys_addr_t rx_desc_addr; - target_phys_addr_t tx_desc_addr; + uint32_t rx_desc_addr; + uint32_t tx_desc_addr; } GemState;