From patchwork Mon Jul 16 13:24:16 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 10009 Return-Path: X-Original-To: patchwork@peony.canonical.com Delivered-To: patchwork@peony.canonical.com Received: from fiordland.canonical.com (fiordland.canonical.com [91.189.94.145]) by peony.canonical.com (Postfix) with ESMTP id A9A8B23F2A for ; Mon, 16 Jul 2012 13:24:24 +0000 (UTC) Received: from mail-gg0-f180.google.com (mail-gg0-f180.google.com [209.85.161.180]) by fiordland.canonical.com (Postfix) with ESMTP id 7955CA188A3 for ; Mon, 16 Jul 2012 13:24:24 +0000 (UTC) Received: by mail-gg0-f180.google.com with SMTP id f1so5363090ggn.11 for ; Mon, 16 Jul 2012 06:24:24 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=x-forwarded-to:x-forwarded-for:delivered-to:received-spf:from:to:cc :subject:date:message-id:x-mailer:in-reply-to:references :x-gm-message-state; bh=3UdS0rfFfWa7Xu9yE41M31pqF6ywjypAZj9Mb9ugoWg=; b=G66Qfh1uI1oGQV8gPCAI7Iou6inBA5ZBiFINgnLrr+CoR3xLHvoZv5b/hYX41eMt+n J9jj1lqx+jcyuHKCBp7MJuw5f8OLgVKQYLtqvCqMlMEXFumPgNa0Ng2nlxAgIzpv6U3F 4FYVUQmOtpPChf/ArXIFHpYN0g+mQszbZzBOWrHjQtqvVwT1s4aCx4n5eKUBeCHSAzZW fLuF58F9lU94U2e+ULAjRiB3T1ziL9NIPTppYBs9NpP9eMAUBK4FZG5nwLVMEsdGHO7x 4hKD42CukhndeJvX3whco209HvzRoApqvs1M+NfIQgxbo6nkewos3ey5nAx4OoZMo1Am cD2g== Received: by 10.50.193.196 with SMTP id hq4mr5081320igc.57.1342445063909; Mon, 16 Jul 2012 06:24:23 -0700 (PDT) X-Forwarded-To: linaro-patchwork@canonical.com X-Forwarded-For: patch@linaro.org linaro-patchwork@canonical.com Delivered-To: patches@linaro.org Received: by 10.231.241.2 with SMTP id lc2csp7929ibb; Mon, 16 Jul 2012 06:24:20 -0700 (PDT) Received: by 10.180.103.4 with SMTP id fs4mr18187886wib.16.1342445059832; Mon, 16 Jul 2012 06:24:19 -0700 (PDT) Received: from mnementh.archaic.org.uk (mnementh.archaic.org.uk. [81.2.115.146]) by mx.google.com with ESMTPS id x6si23867648wiw.36.2012.07.16.06.24.19 (version=TLSv1/SSLv3 cipher=OTHER); Mon, 16 Jul 2012 06:24:19 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of pm215@archaic.org.uk designates 81.2.115.146 as permitted sender) client-ip=81.2.115.146; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of pm215@archaic.org.uk designates 81.2.115.146 as permitted sender) smtp.mail=pm215@archaic.org.uk Received: from pm215 by mnementh.archaic.org.uk with local (Exim 4.72) (envelope-from ) id 1SqlHd-0002Ns-B7; Mon, 16 Jul 2012 14:24:17 +0100 From: Peter Maydell To: qemu-devel@nongnu.org Cc: patches@linaro.org, Peter Crosthwaite Subject: [PATCH v2 6/6] hw/vexpress.c: Allow >4GB of RAM for Cortex-A15 daughterboard Date: Mon, 16 Jul 2012 14:24:16 +0100 Message-Id: <1342445056-9129-7-git-send-email-peter.maydell@linaro.org> X-Mailer: git-send-email 1.7.2.5 In-Reply-To: <1342445056-9129-1-git-send-email-peter.maydell@linaro.org> References: <1342445056-9129-1-git-send-email-peter.maydell@linaro.org> X-Gm-Message-State: ALoCoQmp9/3VJZ9aXvixAsmVf60wlHzkUYswCUo02AZp68BER5c+e6AcFOh4wqKCdPRl+A/G3QV7 Now that we have LPAE support and can handle passing 64 bit RAM sizes to Linux via the device tree, we can lift the restriction in the Versatile Express A15 daughterboard model on not having more than 2GB of RAM. Allow up to 30GB, which is the maximum that can fit in the address map before running into the (unmodelled) aliases of the first 2GB. Signed-off-by: Peter Maydell --- hw/vexpress.c | 13 ++++++++++--- 1 files changed, 10 insertions(+), 3 deletions(-) diff --git a/hw/vexpress.c b/hw/vexpress.c index 8072c5a..b2dc8a5 100644 --- a/hw/vexpress.c +++ b/hw/vexpress.c @@ -284,9 +284,16 @@ static void a15_daughterboard_init(const VEDBoardInfo *daughterboard, cpu_irq[n] = irqp[ARM_PIC_CPU_IRQ]; } - if (ram_size > 0x80000000) { - fprintf(stderr, "vexpress-a15: cannot model more than 2GB RAM\n"); - exit(1); + { + /* We have to use a separate 64 bit variable here to avoid the gcc + * "comparison is always false due to limited range of data type" + * warning if we are on a host where ram_addr_t is 32 bits. + */ + uint64_t rsz = ram_size; + if (rsz > (30ULL * 1024 * 1024 * 1024)) { + fprintf(stderr, "vexpress-a15: cannot model more than 30GB RAM\n"); + exit(1); + } } memory_region_init_ram(ram, "vexpress.highmem", ram_size);