From patchwork Tue Jul 24 10:39:25 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 10224 Return-Path: X-Original-To: patchwork@peony.canonical.com Delivered-To: patchwork@peony.canonical.com Received: from fiordland.canonical.com (fiordland.canonical.com [91.189.94.145]) by peony.canonical.com (Postfix) with ESMTP id C6B8A23E3D for ; Tue, 24 Jul 2012 10:39:33 +0000 (UTC) Received: from mail-yw0-f52.google.com (mail-yw0-f52.google.com [209.85.213.52]) by fiordland.canonical.com (Postfix) with ESMTP id 8E85BA180C6 for ; Tue, 24 Jul 2012 10:39:33 +0000 (UTC) Received: by yhpp61 with SMTP id p61so6779406yhp.11 for ; Tue, 24 Jul 2012 03:39:33 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=x-forwarded-to:x-forwarded-for:delivered-to:received-spf:from:to:cc :subject:date:message-id:x-mailer:x-gm-message-state; bh=Xw0C8xaQZr4AHNSJCxt13KvBWsxhsKS0XJGm2h4IIis=; b=FGzW5VStXMlkdkYVRlFL39RBbhwlbrQN1+7kTCWNPcUdcWbN2Rx4zkJCAQpLRWY6EL 1lzBF2OGU3gpbVUBQqhp0te2JyVnK6Ob3IZ9GGywglZJXzEjHfHOAcE3KNbRbEAO9M0a znzWo1G8j7Y+1ff+RjJhENzuh2Ni+Wrb8MEFz9N531eFf8krEI6qId2JvuY7thLFSQmM srPusUvjKm0NJ1CFzxeNqC6aNvYMefaFWqhL/JKixK0LUcY+WTnVEDalY4o4OlgRY/7N +IeYA1UyNRV4K5alO29Pun3CnjmisRlwLY3QFx1eqFXhnFAXVLwYYLzNmhMRKmy6TxDk 3VUg== Received: by 10.43.126.1 with SMTP id gu1mr14288927icc.6.1343126372919; Tue, 24 Jul 2012 03:39:32 -0700 (PDT) X-Forwarded-To: linaro-patchwork@canonical.com X-Forwarded-For: patch@linaro.org linaro-patchwork@canonical.com Delivered-To: patches@linaro.org Received: by 10.231.153.7 with SMTP id i7csp70099ibw; Tue, 24 Jul 2012 03:39:32 -0700 (PDT) Received: by 10.180.14.193 with SMTP id r1mr5707072wic.19.1343126371470; Tue, 24 Jul 2012 03:39:31 -0700 (PDT) Received: from mnementh.archaic.org.uk (mnementh.archaic.org.uk. [81.2.115.146]) by mx.google.com with ESMTPS id hd6si4771400wib.20.2012.07.24.03.39.30 (version=TLSv1/SSLv3 cipher=OTHER); Tue, 24 Jul 2012 03:39:31 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of pm215@archaic.org.uk designates 81.2.115.146 as permitted sender) client-ip=81.2.115.146; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of pm215@archaic.org.uk designates 81.2.115.146 as permitted sender) smtp.mail=pm215@archaic.org.uk Received: from pm215 by mnementh.archaic.org.uk with local (Exim 4.72) (envelope-from ) id 1StcWT-00065O-Kv; Tue, 24 Jul 2012 11:39:25 +0100 From: Peter Maydell To: qemu-devel@nongnu.org Cc: patches@linaro.org, Peter Crosthwaite , Paolo Bonzini , Paul Brook Subject: [PATCH] hw/armv7m_nvic: Fix incorrect default for num-irqs property Date: Tue, 24 Jul 2012 11:39:25 +0100 Message-Id: <1343126365-23371-1-git-send-email-peter.maydell@linaro.org> X-Mailer: git-send-email 1.7.2.5 X-Gm-Message-State: ALoCoQkkpJZz7iXIK2S7fJfvIMbH8A7fLr/2xw8SeXDXJ9Vha7H1zucocEB5WEQ4HAGVwWDMQaIH Fix an incorrect default value for the num-irqs property (we were attempting to override it from the default set by the parent class but not succeeding, which meant that the lm3s6965evb model would assert on startup attempting to wire up nonexistent irq lines). Instead of trying to override the parent's Property array, we define an instance_init function which runs after default setup but before user property setting and can just fix up the default value in the gic_state struct. Signed-off-by: Peter Maydell Tested-by: Peter Crosthwaite --- hw/armv7m_nvic.c | 21 ++++++++++++++------- 1 files changed, 14 insertions(+), 7 deletions(-) diff --git a/hw/armv7m_nvic.c b/hw/armv7m_nvic.c index 4867c1d..6a0832e 100644 --- a/hw/armv7m_nvic.c +++ b/hw/armv7m_nvic.c @@ -467,7 +467,7 @@ static int armv7m_nvic_init(SysBusDevice *dev) s->gic.num_cpu = 1; /* Tell the common code we're an NVIC */ s->gic.revision = 0xffffffff; - s->gic.num_irq = s->num_irq; + s->num_irq = s->gic.num_irq; nc->parent_init(dev); gic_init_irqs_and_distributor(&s->gic, s->num_irq); /* The NVIC and system controller register area looks like this: @@ -498,14 +498,21 @@ static int armv7m_nvic_init(SysBusDevice *dev) return 0; } -static Property armv7m_nvic_properties[] = { +static void armv7m_nvic_instance_init(Object *obj) +{ + /* We have a different default value for the num-irq property + * than our superclass. This function runs after qdev init + * has set the defaults from the Property array and before + * any user-specified property setting, so just modify the + * value in the gic_state struct. + */ + gic_state *s = ARM_GIC_COMMON(obj); /* The ARM v7m may have anything from 0 to 496 external interrupt * IRQ lines. We default to 64. Other boards may differ and should - * set this property appropriately. + * set the num-irq property appropriately. */ - DEFINE_PROP_UINT32("num-irq", nvic_state, num_irq, 64), - DEFINE_PROP_END_OF_LIST(), -}; + s->num_irq = 64; +} static void armv7m_nvic_class_init(ObjectClass *klass, void *data) { @@ -518,12 +525,12 @@ static void armv7m_nvic_class_init(ObjectClass *klass, void *data) sdc->init = armv7m_nvic_init; dc->vmsd = &vmstate_nvic; dc->reset = armv7m_nvic_reset; - dc->props = armv7m_nvic_properties; } static TypeInfo armv7m_nvic_info = { .name = TYPE_NVIC, .parent = TYPE_ARM_GIC_COMMON, + .instance_init = armv7m_nvic_instance_init, .instance_size = sizeof(nvic_state), .class_init = armv7m_nvic_class_init, .class_size = sizeof(NVICClass),