From patchwork Wed Jul 25 13:24:28 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 10234 Return-Path: X-Original-To: patchwork@peony.canonical.com Delivered-To: patchwork@peony.canonical.com Received: from fiordland.canonical.com (fiordland.canonical.com [91.189.94.145]) by peony.canonical.com (Postfix) with ESMTP id E9AE423E02 for ; Wed, 25 Jul 2012 13:24:38 +0000 (UTC) Received: from mail-gh0-f180.google.com (mail-gh0-f180.google.com [209.85.160.180]) by fiordland.canonical.com (Postfix) with ESMTP id B9B07A18C86 for ; Wed, 25 Jul 2012 13:24:38 +0000 (UTC) Received: by ghbz12 with SMTP id z12so687253ghb.11 for ; Wed, 25 Jul 2012 06:24:38 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=x-forwarded-to:x-forwarded-for:delivered-to:received-spf:from:to:cc :subject:date:message-id:x-mailer:in-reply-to:references :x-gm-message-state; bh=344Ngx1jw+NLD1HyfEp/y6gFYZNUcI5bdK+BK7Xo014=; b=DBBw656sy++DSsDIi4CpsHqRDNpKvYORFX3dej51daNQFEDspsbX22WX6OISivuWiZ XMoHznv65ffQ5y7Huta2LZm68x2Uiul+AyW/dNNsKAYOqggCWlzW3hQETY32XGJODZXm MRoRZUBDPnMeNcz2akY7s3DhHWQvIyTCz+eIogY+bUsX/gxEINvdoQfBCh/8CTk/P3BS /yFgzuyWEVf/vnC4awfe2UOS2oMj093Xx/S3DoEnUc3zlysr09wwYlosYnyLt5IwcHZA 8PHRUTOR+BS8qfxcR1PkRBMK8rAW8PLQaRIqPtm7SIwJpBJXhhkUK39VGlGAYEXvfR+q qaAw== Received: by 10.43.126.1 with SMTP id gu1mr24561228icc.6.1343222678135; Wed, 25 Jul 2012 06:24:38 -0700 (PDT) X-Forwarded-To: linaro-patchwork@canonical.com X-Forwarded-For: patch@linaro.org linaro-patchwork@canonical.com Delivered-To: patches@linaro.org Received: by 10.231.153.7 with SMTP id i7csp90862ibw; Wed, 25 Jul 2012 06:24:36 -0700 (PDT) Received: by 10.180.100.131 with SMTP id ey3mr4631202wib.15.1343222675943; Wed, 25 Jul 2012 06:24:35 -0700 (PDT) Received: from mnementh.archaic.org.uk (mnementh.archaic.org.uk. [81.2.115.146]) by mx.google.com with ESMTPS id cb8si3348014wib.30.2012.07.25.06.24.35 (version=TLSv1/SSLv3 cipher=OTHER); Wed, 25 Jul 2012 06:24:35 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of pm215@archaic.org.uk designates 81.2.115.146 as permitted sender) client-ip=81.2.115.146; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of pm215@archaic.org.uk designates 81.2.115.146 as permitted sender) smtp.mail=pm215@archaic.org.uk Received: from pm215 by mnementh.archaic.org.uk with local (Exim 4.72) (envelope-from ) id 1Su1Zo-0006al-A8; Wed, 25 Jul 2012 14:24:32 +0100 From: Peter Maydell To: qemu-devel@nongnu.org Cc: patches@linaro.org, Avi Kivity , Marcelo Tosatti , Jan Kiszka , Alexander Graf Subject: [PATCH 2/6] kvm: Rename kvm_irqchip_set_irq to kvm_inject_async_irq Date: Wed, 25 Jul 2012 14:24:28 +0100 Message-Id: <1343222672-25312-3-git-send-email-peter.maydell@linaro.org> X-Mailer: git-send-email 1.7.2.5 In-Reply-To: <1343222672-25312-1-git-send-email-peter.maydell@linaro.org> References: <1343222672-25312-1-git-send-email-peter.maydell@linaro.org> X-Gm-Message-State: ALoCoQkltVDTKjzu4C39lWyr7tKVX0UUpPEjqHCANXuErmUq2Ij5IIB6dompuK04QVttD12qnPzP Rename the function kvm_irqchip_set_irq() to kvm_inject_async_irq(), since it can be used for asynchronous interrupt injection whether there is a full irqchip model in the kernel or not. Signed-off-by: Peter Maydell Acked-by: Jan Kiszka --- hw/kvm/i8259.c | 2 +- hw/kvm/ioapic.c | 2 +- kvm-all.c | 6 +++--- kvm.h | 2 +- 4 files changed, 6 insertions(+), 6 deletions(-) diff --git a/hw/kvm/i8259.c b/hw/kvm/i8259.c index 94d1b9a..ab970db 100644 --- a/hw/kvm/i8259.c +++ b/hw/kvm/i8259.c @@ -94,7 +94,7 @@ static void kvm_pic_set_irq(void *opaque, int irq, int level) { int delivered; - delivered = kvm_irqchip_set_irq(kvm_state, irq, level); + delivered = kvm_inject_async_irq(kvm_state, irq, level); apic_report_irq_delivered(delivered); } diff --git a/hw/kvm/ioapic.c b/hw/kvm/ioapic.c index 3ae3175..d7add35 100644 --- a/hw/kvm/ioapic.c +++ b/hw/kvm/ioapic.c @@ -82,7 +82,7 @@ static void kvm_ioapic_set_irq(void *opaque, int irq, int level) KVMIOAPICState *s = opaque; int delivered; - delivered = kvm_irqchip_set_irq(kvm_state, s->kvm_gsi_base + irq, level); + delivered = kvm_inject_async_irq(kvm_state, s->kvm_gsi_base + irq, level); apic_report_irq_delivered(delivered); } diff --git a/kvm-all.c b/kvm-all.c index 3354c6f..9f14274 100644 --- a/kvm-all.c +++ b/kvm-all.c @@ -853,7 +853,7 @@ static void kvm_handle_interrupt(CPUArchState *env, int mask) } } -int kvm_irqchip_set_irq(KVMState *s, int irq, int level) +int kvm_inject_async_irq(KVMState *s, int irq, int level) { struct kvm_irq_level event; int ret; @@ -864,7 +864,7 @@ int kvm_irqchip_set_irq(KVMState *s, int irq, int level) event.irq = irq; ret = kvm_vm_ioctl(s, s->irqchip_inject_ioctl, &event); if (ret < 0) { - perror("kvm_set_irqchip_line"); + perror("kvm_inject_async_irq"); abort(); } @@ -1089,7 +1089,7 @@ int kvm_irqchip_send_msi(KVMState *s, MSIMessage msg) assert(route->kroute.type == KVM_IRQ_ROUTING_MSI); - return kvm_irqchip_set_irq(s, route->kroute.gsi, 1); + return kvm_inject_async_irq(s, route->kroute.gsi, 1); } int kvm_irqchip_add_msi_route(KVMState *s, MSIMessage msg) diff --git a/kvm.h b/kvm.h index 00abe36..cfdc95e 100644 --- a/kvm.h +++ b/kvm.h @@ -144,7 +144,7 @@ int kvm_arch_on_sigbus(int code, void *addr); void kvm_arch_init_irq_routing(KVMState *s); -int kvm_irqchip_set_irq(KVMState *s, int irq, int level); +int kvm_inject_async_irq(KVMState *s, int irq, int level); int kvm_irqchip_send_msi(KVMState *s, MSIMessage msg); void kvm_irqchip_add_irq_route(KVMState *s, int gsi, int irqchip, int pin);