From patchwork Thu Oct 25 12:57:42 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 12512 Return-Path: X-Original-To: patchwork@peony.canonical.com Delivered-To: patchwork@peony.canonical.com Received: from fiordland.canonical.com (fiordland.canonical.com [91.189.94.145]) by peony.canonical.com (Postfix) with ESMTP id 2176B23EFB for ; Thu, 25 Oct 2012 12:57:54 +0000 (UTC) Received: from mail-ia0-f180.google.com (mail-ia0-f180.google.com [209.85.210.180]) by fiordland.canonical.com (Postfix) with ESMTP id C3016A18FEF for ; Thu, 25 Oct 2012 12:57:53 +0000 (UTC) Received: by mail-ia0-f180.google.com with SMTP id f6so1219547iag.11 for ; Thu, 25 Oct 2012 05:57:53 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=x-forwarded-to:x-forwarded-for:delivered-to:received-spf:from:to:cc :subject:date:message-id:x-mailer:in-reply-to:references :x-gm-message-state; bh=7cgRRQSTzOoe1BoZwl/LuHGPgyS8xfnWr6HJ+oPP2+s=; b=QjYuiSWvyPF9KX6RAS/6EcYqpDwMNFTg6VWACbOfQLZMoOHzdeDuXryK7aYg+ucOyh 7jXtwdzIZhEMspBIjyhgO24XiesDWDjyTi2FizL/pUZeutrabBaMXR2kczjGzp6OFaam pVI5Mo4EGMBBr/KYoaVPJmDQ4OI1rQiV4zC3xNfNskLZHL34IDmyISRTSuuRADEuM7st c/FurQI2RqzHZaBKA9BnKt71i4UV06YDvZkyX16AJeJJzlpihmbJbTkDmTe28tVPYtej l0lalPoRZz4rSdDnN/bYgEZ2m7Kf2N2CTnIXjUgFSim2QAjrllXVGEy428RzmF2JaT1w a8ag== Received: by 10.50.161.169 with SMTP id xt9mr4202454igb.62.1351169873568; Thu, 25 Oct 2012 05:57:53 -0700 (PDT) X-Forwarded-To: linaro-patchwork@canonical.com X-Forwarded-For: patch@linaro.org linaro-patchwork@canonical.com Delivered-To: patches@linaro.org Received: by 10.50.67.148 with SMTP id n20csp42918igt; Thu, 25 Oct 2012 05:57:51 -0700 (PDT) Received: by 10.216.220.38 with SMTP id n38mr10792378wep.56.1351169871174; Thu, 25 Oct 2012 05:57:51 -0700 (PDT) Received: from mnementh.archaic.org.uk (1.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.d.1.0.0.b.8.0.1.0.0.2.ip6.arpa. [2001:8b0:1d0::1]) by mx.google.com with ESMTPS id hh1si1378026wib.31.2012.10.25.05.57.50 (version=TLSv1/SSLv3 cipher=OTHER); Thu, 25 Oct 2012 05:57:51 -0700 (PDT) Received-SPF: neutral (google.com: 2001:8b0:1d0::1 is neither permitted nor denied by best guess record for domain of pm215@archaic.org.uk) client-ip=2001:8b0:1d0::1; Authentication-Results: mx.google.com; spf=neutral (google.com: 2001:8b0:1d0::1 is neither permitted nor denied by best guess record for domain of pm215@archaic.org.uk) smtp.mail=pm215@archaic.org.uk Received: from pm215 by mnementh.archaic.org.uk with local (Exim 4.72) (envelope-from ) id 1TRN0N-0001Qp-QD; Thu, 25 Oct 2012 13:57:47 +0100 From: Peter Maydell To: qemu-devel@nongnu.org Cc: patches@linaro.org Subject: [PATCH 07/12] hw/arm_gic: Use LOG_GUEST_ERROR Date: Thu, 25 Oct 2012 13:57:42 +0100 Message-Id: <1351169867-5466-8-git-send-email-peter.maydell@linaro.org> X-Mailer: git-send-email 1.7.2.5 In-Reply-To: <1351169867-5466-1-git-send-email-peter.maydell@linaro.org> References: <1351169867-5466-1-git-send-email-peter.maydell@linaro.org> X-Gm-Message-State: ALoCoQldGM41QIZ8bbbB+e73IwwMr9LzT3cHpWfJf8Z4DMm15p+XSlfgT0Qw0yi1dCYLihUOn4A1 Use LOG_GUEST_ERROR to report guest accesses to bad offsets. Signed-off-by: Peter Maydell --- hw/arm_gic.c | 12 ++++++++---- 1 file changed, 8 insertions(+), 4 deletions(-) diff --git a/hw/arm_gic.c b/hw/arm_gic.c index ce16e83..f9e423f 100644 --- a/hw/arm_gic.c +++ b/hw/arm_gic.c @@ -324,7 +324,8 @@ static uint32_t gic_dist_readb(void *opaque, hwaddr offset) } return res; bad_reg: - hw_error("gic_dist_readb: Bad offset %x\n", (int)offset); + qemu_log_mask(LOG_GUEST_ERROR, + "gic_dist_readb: Bad offset %x\n", (int)offset); return 0; } @@ -487,7 +488,8 @@ static void gic_dist_writeb(void *opaque, hwaddr offset, gic_update(s); return; bad_reg: - hw_error("gic_dist_writeb: Bad offset %x\n", (int)offset); + qemu_log_mask(LOG_GUEST_ERROR, + "gic_dist_writeb: Bad offset %x\n", (int)offset); } static void gic_dist_writew(void *opaque, hwaddr offset, @@ -556,7 +558,8 @@ static uint32_t gic_cpu_read(GICState *s, int cpu, int offset) case 0x18: /* Highest Pending Interrupt */ return s->current_pending[cpu]; default: - hw_error("gic_cpu_read: Bad offset %x\n", (int)offset); + qemu_log_mask(LOG_GUEST_ERROR, + "gic_cpu_read: Bad offset %x\n", (int)offset); return 0; } } @@ -577,7 +580,8 @@ static void gic_cpu_write(GICState *s, int cpu, int offset, uint32_t value) case 0x10: /* End Of Interrupt */ return gic_complete_irq(s, cpu, value & 0x3ff); default: - hw_error("gic_cpu_write: Bad offset %x\n", (int)offset); + qemu_log_mask(LOG_GUEST_ERROR, + "gic_cpu_write: Bad offset %x\n", (int)offset); return; } gic_update(s);