From patchwork Tue Mar 26 10:22:02 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 15657 Return-Path: X-Original-To: patchwork@peony.canonical.com Delivered-To: patchwork@peony.canonical.com Received: from fiordland.canonical.com (fiordland.canonical.com [91.189.94.145]) by peony.canonical.com (Postfix) with ESMTP id DFF1D23E64 for ; Tue, 26 Mar 2013 10:22:23 +0000 (UTC) Received: from mail-ve0-f169.google.com (mail-ve0-f169.google.com [209.85.128.169]) by fiordland.canonical.com (Postfix) with ESMTP id 6B75CA198D3 for ; Tue, 26 Mar 2013 10:22:23 +0000 (UTC) Received: by mail-ve0-f169.google.com with SMTP id d10so2154122vea.14 for ; Tue, 26 Mar 2013 03:22:23 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=x-received:x-forwarded-to:x-forwarded-for:delivered-to:x-received :received-spf:from:to:cc:subject:date:message-id:x-mailer :in-reply-to:references:x-gm-message-state; bh=l2ZoqP7dQyDeykPzv8WwcXNN8B4RGYMsROJ4UsJogVw=; b=gPJHiM/TePQpee0xvlQEXC9A0vlbjJDNbOraSMc2ATN2uz3JZa4sSmBDCkYEnL4Pxw 01E+rwF0hfpJIYmUukhxiKBNm9NZXurGoc9d2fF1P/2y1u4JVZaQx4klJUdVXzY2Dmhk H+U6rnsOJfw98UiNwGSu4Ck5+sWAqwpoyVUkZVQR45VjDDw7AmbcWXBWkO3ZLScPhdwm W1+EC/+uhaeJ/XkTwNOlI6+8eL7inQS/mhLOGzxqREndJoZ0IECC5CvICTIAyvyzzlV+ criybrMI/54Q+70Q15eAJDfdG4o7NQLilIHW3YqKfv+JuKTyvRMaBSSahDWff7+QHNLh x0Eg== X-Received: by 10.220.225.200 with SMTP id it8mr18901730vcb.39.1364293342946; Tue, 26 Mar 2013 03:22:22 -0700 (PDT) X-Forwarded-To: linaro-patchwork@canonical.com X-Forwarded-For: patch@linaro.org linaro-patchwork@canonical.com Delivered-To: patches@linaro.org Received: by 10.59.4.204 with SMTP id cg12csp64350ved; Tue, 26 Mar 2013 03:22:22 -0700 (PDT) X-Received: by 10.112.9.200 with SMTP id c8mr7924166lbb.122.1364293337620; Tue, 26 Mar 2013 03:22:17 -0700 (PDT) Received: from mnementh.archaic.org.uk (1.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.d.1.0.0.b.8.0.1.0.0.2.ip6.arpa. [2001:8b0:1d0::1]) by mx.google.com with ESMTPS id sw3si6013281lab.217.2013.03.26.03.22.16 (version=TLSv1 cipher=RC4-SHA bits=128/128); Tue, 26 Mar 2013 03:22:17 -0700 (PDT) Received-SPF: neutral (google.com: 2001:8b0:1d0::1 is neither permitted nor denied by best guess record for domain of pm215@archaic.org.uk) client-ip=2001:8b0:1d0::1; Authentication-Results: mx.google.com; spf=neutral (google.com: 2001:8b0:1d0::1 is neither permitted nor denied by best guess record for domain of pm215@archaic.org.uk) smtp.mail=pm215@archaic.org.uk Received: from pm215 by mnementh.archaic.org.uk with local (Exim 4.72) (envelope-from ) id 1UKR1A-0002HB-2E; Tue, 26 Mar 2013 10:22:12 +0000 From: Peter Maydell To: qemu-devel@nongnu.org Cc: patches@linaro.org, Arnd Bergmann , "Michael S. Tsirkin" , =?UTF-8?q?Andreas=20F=C3=A4rber?= , Will Deacon , Paul Brook , Aurelien Jarno Subject: [PATCH v2 02/11] versatile_pci: Expose PCI I/O region on Versatile PB Date: Tue, 26 Mar 2013 10:22:02 +0000 Message-Id: <1364293331-8722-3-git-send-email-peter.maydell@linaro.org> X-Mailer: git-send-email 1.7.2.5 In-Reply-To: <1364293331-8722-1-git-send-email-peter.maydell@linaro.org> References: <1364293331-8722-1-git-send-email-peter.maydell@linaro.org> X-Gm-Message-State: ALoCoQnOsWcN15pVqWWm6575AuGqxOzfCCBdCWxv7tYt6VWgoZFwVKF8cKQiZfZRyNWkHtdnYUdp Comments in the QEMU source code claim that the version of the PCI controller on the VersatilePB board doesn't support the PCI I/O region, but this is incorrect; expose that region, map it in the correct location, and drop the misleading comments. This change removes the only currently implemented difference between the realview-pci and versatile-pci models; however there are other differences in not-yet-implemented functionality, so we retain the distinction between the two device types. Signed-off-by: Peter Maydell --- hw/arm/versatilepb.c | 3 +-- hw/versatile_pci.c | 8 +++----- 2 files changed, 4 insertions(+), 7 deletions(-) diff --git a/hw/arm/versatilepb.c b/hw/arm/versatilepb.c index baaa265..0d08d15 100644 --- a/hw/arm/versatilepb.c +++ b/hw/arm/versatilepb.c @@ -226,14 +226,13 @@ static void versatile_init(QEMUMachineInitArgs *args, int board_id) qdev_init_nofail(dev); sysbus_mmio_map(busdev, 0, 0x41000000); /* PCI self-config */ sysbus_mmio_map(busdev, 1, 0x42000000); /* PCI config */ + sysbus_mmio_map(busdev, 2, 0x43000000); /* PCI I/O */ sysbus_connect_irq(busdev, 0, sic[27]); sysbus_connect_irq(busdev, 1, sic[28]); sysbus_connect_irq(busdev, 2, sic[29]); sysbus_connect_irq(busdev, 3, sic[30]); pci_bus = (PCIBus *)qdev_get_child_bus(dev, "pci"); - /* The Versatile PCI bridge does not provide access to PCI IO space, - so many of the qemu PCI devices are not useable. */ for(n = 0; n < nb_nics; n++) { nd = &nd_table[n]; diff --git a/hw/versatile_pci.c b/hw/versatile_pci.c index 16ce5d1..1312f46 100644 --- a/hw/versatile_pci.c +++ b/hw/versatile_pci.c @@ -77,7 +77,7 @@ static int pci_vpb_init(SysBusDevice *dev) /* Our memory regions are: * 0 : PCI self config window * 1 : PCI config window - * 2 : PCI IO window (realview_pci only) + * 2 : PCI IO window */ memory_region_init_io(&s->mem_config, &pci_vpb_config_ops, bus, "pci-vpb-selfconfig", 0x1000000); @@ -85,10 +85,8 @@ static int pci_vpb_init(SysBusDevice *dev) memory_region_init_io(&s->mem_config2, &pci_vpb_config_ops, bus, "pci-vpb-config", 0x1000000); sysbus_init_mmio(dev, &s->mem_config2); - if (s->realview) { - isa_mmio_setup(&s->isa, 0x0100000); - sysbus_init_mmio(dev, &s->isa); - } + isa_mmio_setup(&s->isa, 0x0100000); + sysbus_init_mmio(dev, &s->isa); pci_create_simple(bus, -1, "versatile_pci_host"); return 0;