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[2001:8b0:1d0::1]) by mx.google.com with ESMTPS id u1si3550424wij.12.2013.07.01.10.35.26 for (version=TLSv1.2 cipher=RC4-SHA bits=128/128); Mon, 01 Jul 2013 10:35:27 -0700 (PDT) Received-SPF: neutral (google.com: 2001:8b0:1d0::1 is neither permitted nor denied by best guess record for domain of pm215@archaic.org.uk) client-ip=2001:8b0:1d0::1; Received: from pm215 by mnementh.archaic.org.uk with local (Exim 4.80) (envelope-from ) id 1Uti0b-0002M4-2Y; Mon, 01 Jul 2013 18:35:25 +0100 From: Peter Maydell To: qemu-devel@nongnu.org Cc: patches@linaro.org, Alexander Graf , Andreas Schwab , "Mian M. Hamayun" Subject: [PATCH v5 17/21] linux-user: Add AArch64 support Date: Mon, 1 Jul 2013 18:35:16 +0100 Message-Id: <1372700120-8896-18-git-send-email-peter.maydell@linaro.org> X-Mailer: git-send-email 1.7.10.4 In-Reply-To: <1372700120-8896-1-git-send-email-peter.maydell@linaro.org> References: <1372700120-8896-1-git-send-email-peter.maydell@linaro.org> X-Gm-Message-State: ALoCoQlHjYEk1QHNfC54okTFJUFqJgXPWVqVIca5ryXUzjKjk/etueVsWvoNiO192j5NFRurDVBo X-Original-Sender: peter.maydell@linaro.org X-Original-Authentication-Results: mx.google.com; spf=neutral (google.com: 209.85.128.180 is neither permitted nor denied by best guess record for domain of patch+caf_=patchwork-forward=linaro.org@linaro.org) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Precedence: list Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org List-ID: X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , From: Alexander Graf This patch adds support for AArch64 in all the small corners of linux-user and beyond. Signed-off-by: Alexander Graf Signed-off-by: John Rigby Message-id: 1368505980-17151-11-git-send-email-john.rigby@linaro.org [PMM: * removed some unnecessary #defines from syscall.h * catch attempts to use a 32 bit only cpu with aarch64-linux-user * termios stuff moved into its own patch ] Signed-off-by: Peter Maydell --- linux-user/aarch64/syscall.h | 8 ++++++++ linux-user/elfload.c | 15 +++++++++++++-- linux-user/main.c | 16 ++++++++++++++++ 3 files changed, 37 insertions(+), 2 deletions(-) create mode 100644 linux-user/aarch64/syscall.h diff --git a/linux-user/aarch64/syscall.h b/linux-user/aarch64/syscall.h new file mode 100644 index 0000000..e863640 --- /dev/null +++ b/linux-user/aarch64/syscall.h @@ -0,0 +1,8 @@ +struct target_pt_regs { + uint64_t regs[31]; + uint64_t sp; + uint64_t pc; + uint64_t pstate; +}; + +#define UNAME_MACHINE "aarch64" diff --git a/linux-user/elfload.c b/linux-user/elfload.c index ddef23e..9d8631d 100644 --- a/linux-user/elfload.c +++ b/linux-user/elfload.c @@ -267,16 +267,26 @@ static void elf_core_copy_regs(target_elf_gregset_t *regs, const CPUX86State *en #define ELF_START_MMAP 0x80000000 -#define elf_check_arch(x) ( (x) == EM_ARM ) +#define elf_check_arch(x) ((x) == ELF_MACHINE) +#define ELF_ARCH ELF_MACHINE + +#ifdef TARGET_AARCH64 +#define ELF_CLASS ELFCLASS64 +#else #define ELF_CLASS ELFCLASS32 -#define ELF_ARCH EM_ARM +#endif static inline void init_thread(struct target_pt_regs *regs, struct image_info *infop) { abi_long stack = infop->start_stack; memset(regs, 0, sizeof(*regs)); + +#ifdef TARGET_AARCH64 + regs->pc = infop->entry & ~0x3ULL; + regs->sp = stack; +#else regs->ARM_cpsr = 0x10; if (infop->entry & 1) regs->ARM_cpsr |= CPSR_T; @@ -290,6 +300,7 @@ static inline void init_thread(struct target_pt_regs *regs, /* For uClinux PIC binaries. */ /* XXX: Linux does this only on ARM with no MMU (do we care ?) */ regs->ARM_r10 = infop->start_data; +#endif } #define ELF_NREG 18 diff --git a/linux-user/main.c b/linux-user/main.c index 8aba817..e76e987 100644 --- a/linux-user/main.c +++ b/linux-user/main.c @@ -3965,6 +3965,22 @@ int main(int argc, char **argv, char **envp) cpu_x86_load_seg(env, R_FS, 0); cpu_x86_load_seg(env, R_GS, 0); #endif +#elif defined(TARGET_AARCH64) + { + int i; + + if (!(arm_feature(env, ARM_FEATURE_AARCH64))) { + fprintf(stderr, + "The selected ARM CPU does not support 64 bit mode\n"); + exit(1); + } + + for (i = 0; i < 31; i++) { + env->xregs[i] = regs->regs[i]; + } + env->pc = regs->pc; + env->xregs[31] = regs->sp; + } #elif defined(TARGET_ARM) { int i;