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[2001:8b0:1d0::1]) by mx.google.com with ESMTPS id rf3si1745348bkb.346.2013.07.01.10.35.33 for (version=TLSv1.2 cipher=RC4-SHA bits=128/128); Mon, 01 Jul 2013 10:35:34 -0700 (PDT) Received-SPF: neutral (google.com: 2001:8b0:1d0::1 is neither permitted nor denied by best guess record for domain of pm215@archaic.org.uk) client-ip=2001:8b0:1d0::1; Received: from pm215 by mnementh.archaic.org.uk with local (Exim 4.80) (envelope-from ) id 1Uti0X-0002KT-VG; Mon, 01 Jul 2013 18:35:22 +0100 From: Peter Maydell To: qemu-devel@nongnu.org Cc: patches@linaro.org, Alexander Graf , Andreas Schwab , "Mian M. Hamayun" Subject: [PATCH v5 08/21] gdbstub: Add AArch64 support Date: Mon, 1 Jul 2013 18:35:07 +0100 Message-Id: <1372700120-8896-9-git-send-email-peter.maydell@linaro.org> X-Mailer: git-send-email 1.7.10.4 In-Reply-To: <1372700120-8896-1-git-send-email-peter.maydell@linaro.org> References: <1372700120-8896-1-git-send-email-peter.maydell@linaro.org> X-Gm-Message-State: ALoCoQnw0udwuvgivACEtFret49jEITQQD7fXyMvfMLiETndPpN9nWHXZj213a7h5yBjdblFDRc1 X-Original-Sender: peter.maydell@linaro.org X-Original-Authentication-Results: mx.google.com; spf=neutral (google.com: 209.85.212.44 is neither permitted nor denied by best guess record for domain of patch+caf_=patchwork-forward=linaro.org@linaro.org) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Precedence: list Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org List-ID: X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , From: Alexander Graf We want to be able to debug AArch64 guests. So let's add the respective gdb stub functions and xml descriptions that allow us to do so. Signed-off-by: Alexander Graf Signed-off-by: John Rigby Message-id: 1368505980-17151-6-git-send-email-john.rigby@linaro.org Signed-off-by: Peter Maydell --- gdb-xml/aarch64-core.xml | 46 +++++++++++++++++++++++++ gdb-xml/aarch64-fpu.xml | 86 ++++++++++++++++++++++++++++++++++++++++++++++ gdbstub.c | 53 ++++++++++++++++++++++++++++ 3 files changed, 185 insertions(+) create mode 100644 gdb-xml/aarch64-core.xml create mode 100644 gdb-xml/aarch64-fpu.xml diff --git a/gdb-xml/aarch64-core.xml b/gdb-xml/aarch64-core.xml new file mode 100644 index 0000000..e1e9dc3 --- /dev/null +++ b/gdb-xml/aarch64-core.xml @@ -0,0 +1,46 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/gdb-xml/aarch64-fpu.xml b/gdb-xml/aarch64-fpu.xml new file mode 100644 index 0000000..997197e --- /dev/null +++ b/gdb-xml/aarch64-fpu.xml @@ -0,0 +1,86 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/gdbstub.c b/gdbstub.c index 3101a43..757805d 100644 --- a/gdbstub.c +++ b/gdbstub.c @@ -940,6 +940,59 @@ static int cpu_gdb_write_register(CPUSPARCState *env, uint8_t *mem_buf, int n) return 8; #endif } +#elif defined(TARGET_AARCH64) + +#define NUM_CORE_REGS 34 +#define GDB_CORE_XML "aarch64-core.xml" + +static int cpu_gdb_read_register(CPUARMState *env, uint8_t *mem_buf, int n) +{ + if (n < 31) { + /* Core integer register. */ + GET_REG64(env->xregs[n]); + } + switch (n) { + case 31: + GET_REG64(env->xregs[31]); + break; + case 32: + GET_REG64(env->pc); + break; + case 33: + GET_REG32(env->pstate); + break; + } + /* Unknown register. */ + return 0; +} + +static int cpu_gdb_write_register(CPUARMState *env, uint8_t *mem_buf, int n) +{ + uint64_t tmp; + + tmp = ldq_p(mem_buf); + + if (n < 31) { + /* Core integer register. */ + env->xregs[n] = tmp; + return 8; + } + switch (n) { + case 31: + env->xregs[31] = tmp; + return 8; + case 32: + env->pc = tmp; + return 8; + case 33: + /* CPSR */ + env->pstate = tmp; + return 4; + } + /* Unknown register. */ + return 0; +} + #elif defined (TARGET_ARM) /* Old gdb always expect FPA registers. Newer (xml-aware) gdb only expect