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[2001:8b0:1d0::1]) by mx.google.com with ESMTPS id uc7si3648397bkb.93.2014.03.06.11.56.57 for (version=TLSv1.2 cipher=RC4-SHA bits=128/128); Thu, 06 Mar 2014 11:56:58 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of pm215@archaic.org.uk designates 2001:8b0:1d0::1 as permitted sender) client-ip=2001:8b0:1d0::1; Received: from pm215 by mnementh.archaic.org.uk with local (Exim 4.80) (envelope-from ) id 1WLe2T-0000SO-6h; Thu, 06 Mar 2014 19:33:05 +0000 From: Peter Maydell To: qemu-devel@nongnu.org Cc: patches@linaro.org, Alexander Graf , Michael Matz , Claudio Fontana , Dirk Mueller , Laurent Desnogues , kvmarm@lists.cs.columbia.edu, Richard Henderson , =?UTF-8?q?Alex=20Benn=C3=A9e?= , Christoffer Dall , Will Newton , Peter Crosthwaite , Rob Herring Subject: [PATCH v4 01/21] target-arm: Split out private-to-target functions into internals.h Date: Thu, 6 Mar 2014 19:32:45 +0000 Message-Id: <1394134385-1727-2-git-send-email-peter.maydell@linaro.org> X-Mailer: git-send-email 1.7.10.4 In-Reply-To: <1394134385-1727-1-git-send-email-peter.maydell@linaro.org> References: <1394134385-1727-1-git-send-email-peter.maydell@linaro.org> X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: peter.maydell@linaro.org X-Original-Authentication-Results: mx.google.com; spf=neutral (google.com: 209.85.220.175 is neither permitted nor denied by best guess record for domain of patch+caf_=patchwork-forward=linaro.org@linaro.org) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Precedence: list Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org List-ID: X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , Currently cpu.h defines a mixture of functions and types needed by the rest of QEMU and those needed only by files within target-arm/. Split the latter out into a new header so they aren't needlessly exposed further than required. Signed-off-by: Peter Maydell Reviewed-by: Peter Crosthwaite --- target-arm/cpu.c | 1 + target-arm/cpu.h | 20 ------------------- target-arm/helper.c | 1 + target-arm/internals.h | 49 ++++++++++++++++++++++++++++++++++++++++++++++ target-arm/kvm32.c | 1 + target-arm/op_helper.c | 1 + target-arm/translate-a64.c | 1 + target-arm/translate.c | 1 + 8 files changed, 55 insertions(+), 20 deletions(-) create mode 100644 target-arm/internals.h diff --git a/target-arm/cpu.c b/target-arm/cpu.c index 1ce8a9b..bc8eac9 100644 --- a/target-arm/cpu.c +++ b/target-arm/cpu.c @@ -19,6 +19,7 @@ */ #include "cpu.h" +#include "internals.h" #include "qemu-common.h" #include "hw/qdev-properties.h" #include "qapi/qmp/qerror.h" diff --git a/target-arm/cpu.h b/target-arm/cpu.h index 49fef3f..6252ff3 100644 --- a/target-arm/cpu.h +++ b/target-arm/cpu.h @@ -111,11 +111,6 @@ typedef struct ARMGenericTimer { #define GTIMER_VIRT 1 #define NUM_GTIMERS 2 -/* Scale factor for generic timers, ie number of ns per tick. - * This gives a 62.5MHz timer. - */ -#define GTIMER_SCALE 16 - typedef struct CPUARMState { /* Regs for current mode. */ uint32_t regs[16]; @@ -318,11 +313,7 @@ typedef struct CPUARMState { #include "cpu-qom.h" ARMCPU *cpu_arm_init(const char *cpu_model); -void arm_translate_init(void); -void arm_cpu_register_gdb_regs_for_features(ARMCPU *cpu); int cpu_arm_exec(CPUARMState *s); -int bank_number(int mode); -void switch_mode(CPUARMState *, int); uint32_t do_arm_semihosting(CPUARMState *env); static inline bool is_a64(CPUARMState *env) @@ -545,17 +536,6 @@ static inline void vfp_set_fpcr(CPUARMState *env, uint32_t val) vfp_set_fpscr(env, new_fpscr); } -enum arm_fprounding { - FPROUNDING_TIEEVEN, - FPROUNDING_POSINF, - FPROUNDING_NEGINF, - FPROUNDING_ZERO, - FPROUNDING_TIEAWAY, - FPROUNDING_ODD -}; - -int arm_rmode_to_sf(int rmode); - enum arm_cpu_mode { ARM_CPU_MODE_USR = 0x10, ARM_CPU_MODE_FIQ = 0x11, diff --git a/target-arm/helper.c b/target-arm/helper.c index d44e603..3d65bae 100644 --- a/target-arm/helper.c +++ b/target-arm/helper.c @@ -1,4 +1,5 @@ #include "cpu.h" +#include "internals.h" #include "exec/gdbstub.h" #include "helper.h" #include "qemu/host-utils.h" diff --git a/target-arm/internals.h b/target-arm/internals.h new file mode 100644 index 0000000..a38a57f --- /dev/null +++ b/target-arm/internals.h @@ -0,0 +1,49 @@ +/* + * QEMU ARM CPU -- internal functions and types + * + * Copyright (c) 2014 Linaro Ltd + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * as published by the Free Software Foundation; either version 2 + * of the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, see + * + * + * This header defines functions, types, etc which need to be shared + * between different source files within target-arm/ but which are + * private to it and not required by the rest of QEMU. + */ + +#ifndef TARGET_ARM_INTERNALS_H +#define TARGET_ARM_INTERNALS_H + +/* Scale factor for generic timers, ie number of ns per tick. + * This gives a 62.5MHz timer. + */ +#define GTIMER_SCALE 16 + +int bank_number(int mode); +void switch_mode(CPUARMState *, int); +void arm_cpu_register_gdb_regs_for_features(ARMCPU *cpu); +void arm_translate_init(void); + +enum arm_fprounding { + FPROUNDING_TIEEVEN, + FPROUNDING_POSINF, + FPROUNDING_NEGINF, + FPROUNDING_ZERO, + FPROUNDING_TIEAWAY, + FPROUNDING_ODD +}; + +int arm_rmode_to_sf(int rmode); + +#endif diff --git a/target-arm/kvm32.c b/target-arm/kvm32.c index a4fde07..b21f844 100644 --- a/target-arm/kvm32.c +++ b/target-arm/kvm32.c @@ -21,6 +21,7 @@ #include "sysemu/kvm.h" #include "kvm_arm.h" #include "cpu.h" +#include "internals.h" #include "hw/arm/arm.h" static inline void set_feature(uint64_t *features, int feature) diff --git a/target-arm/op_helper.c b/target-arm/op_helper.c index 7d06d2f..1458cd3 100644 --- a/target-arm/op_helper.c +++ b/target-arm/op_helper.c @@ -18,6 +18,7 @@ */ #include "cpu.h" #include "helper.h" +#include "internals.h" #define SIGNBIT (uint32_t)0x80000000 #define SIGNBIT64 ((uint64_t)1 << 63) diff --git a/target-arm/translate-a64.c b/target-arm/translate-a64.c index f89b0a5..156fda2 100644 --- a/target-arm/translate-a64.c +++ b/target-arm/translate-a64.c @@ -26,6 +26,7 @@ #include "tcg-op.h" #include "qemu/log.h" #include "translate.h" +#include "internals.h" #include "qemu/host-utils.h" #include "exec/gen-icount.h" diff --git a/target-arm/translate.c b/target-arm/translate.c index 9612da7..4a53313 100644 --- a/target-arm/translate.c +++ b/target-arm/translate.c @@ -25,6 +25,7 @@ #include #include "cpu.h" +#include "internals.h" #include "disas/disas.h" #include "tcg-op.h" #include "qemu/log.h"