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[2001:8b0:1d0::1]) by mx.google.com with ESMTPS id gc5si1722186wjb.83.2014.04.10.09.16.04 for (version=TLSv1.2 cipher=RC4-SHA bits=128/128); Thu, 10 Apr 2014 09:16:06 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of pm215@archaic.org.uk designates 2001:8b0:1d0::1 as permitted sender) client-ip=2001:8b0:1d0::1; Received: from pm215 by mnementh.archaic.org.uk with local (Exim 4.80) (envelope-from ) id 1WYHdZ-0007rd-IM; Thu, 10 Apr 2014 17:15:37 +0100 From: Peter Maydell To: qemu-devel@nongnu.org Cc: patches@linaro.org, Alexander Graf , Laurent Desnogues , kvmarm@lists.cs.columbia.edu, Richard Henderson , =?UTF-8?q?Alex=20Benn=C3=A9e?= , Christoffer Dall , Peter Crosthwaite , Greg Bellows Subject: [PATCH v6 22/37] hw/arm/virt: Add support for Cortex-A57 Date: Thu, 10 Apr 2014 17:15:21 +0100 Message-Id: <1397146536-30116-23-git-send-email-peter.maydell@linaro.org> X-Mailer: git-send-email 1.7.10.4 In-Reply-To: <1397146536-30116-1-git-send-email-peter.maydell@linaro.org> References: <1397146536-30116-1-git-send-email-peter.maydell@linaro.org> X-Removed-Original-Auth: Dkim didn't pass. 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Signed-off-by: Peter Maydell --- This should perhaps not be just stealing the a15mpcore_priv on the basis that it's a GICv2... --- hw/arm/virt.c | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/hw/arm/virt.c b/hw/arm/virt.c index 2bbc931..e23868a 100644 --- a/hw/arm/virt.c +++ b/hw/arm/virt.c @@ -123,6 +123,14 @@ static VirtBoardInfo machines[] = { .irqmap = a15irqmap, }, { + .cpu_model = "cortex-a57", + /* Our A57 has an A15-style GICv2, so we can use a15mpcore_priv */ + .qdevname = "a15mpcore_priv", + .gic_compatible = "arm,cortex-a15-gic", + .memmap = a15memmap, + .irqmap = a15irqmap, + }, + { .cpu_model = "host", /* We use the A15 private peripheral model to get a V2 GIC */ .qdevname = "a15mpcore_priv",