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[2001:8b0:1d0::1]) by mx.google.com with ESMTPS id fv2si100153wib.35.2014.05.08.11.47.03 for (version=TLSv1.2 cipher=RC4-SHA bits=128/128); Thu, 08 May 2014 11:47:04 -0700 (PDT) Received-SPF: none (google.com: pm215@archaic.org.uk does not designate permitted sender hosts) client-ip=2001:8b0:1d0::1; Received: from pm215 by mnementh.archaic.org.uk with local (Exim 4.80) (envelope-from ) id 1WiTLO-00052z-TA; Thu, 08 May 2014 19:46:58 +0100 From: Peter Maydell To: qemu-devel@nongnu.org Cc: patches@linaro.org, Peter Crosthwaite Subject: [PATCH 7/8] hw/arm/stellaris: Correct handling of GPTM TAR register Date: Thu, 8 May 2014 19:46:57 +0100 Message-Id: <1399574818-19349-8-git-send-email-peter.maydell@linaro.org> X-Mailer: git-send-email 1.7.10.4 In-Reply-To: <1399574818-19349-1-git-send-email-peter.maydell@linaro.org> References: <1399574818-19349-1-git-send-email-peter.maydell@linaro.org> X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: peter.maydell@linaro.org X-Original-Authentication-Results: mx.google.com; spf=neutral (google.com: patch+caf_=patchwork-forward=linaro.org@linaro.org does not designate permitted sender hosts) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Precedence: list Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org List-ID: X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , We don't implement very much of the GPTM TAR register, and what we do is wrong. The "are we in RT mode?" field is in s->config, not s->control. Correct this, use LOG_UNIMP rather than hw_error() for the cases we don't support, and avoid an unlabelled fallthrough that makes Coverity complain. Signed-off-by: Peter Maydell Reviewed-by: Peter Crosthwaite --- hw/arm/stellaris.c | 13 ++++++++++--- 1 file changed, 10 insertions(+), 3 deletions(-) diff --git a/hw/arm/stellaris.c b/hw/arm/stellaris.c index d6cc77b..487ee72 100644 --- a/hw/arm/stellaris.c +++ b/hw/arm/stellaris.c @@ -185,12 +185,19 @@ static uint64_t gptm_read(void *opaque, hwaddr offset, case 0x44: /* TBPMR */ return s->match_prescale[1]; case 0x48: /* TAR */ - if (s->control == 1) + if (s->config == 1) { return s->rtc; + } + qemu_log_mask(LOG_UNIMP, + "gptm_read of TAR but timer read not supported"); + return 0; case 0x4c: /* TBR */ - hw_error("TODO: Timer value read\n"); + qemu_log_mask(LOG_UNIMP, + "gptm_read of TBR but timer read not supported"); + return 0; default: - hw_error("gptm_read: Bad offset 0x%x\n", (int)offset); + qemu_log_mask(LOG_GUEST_ERROR, + "gptm_read: Bad offset 0x%x\n", (int)offset); return 0; } }