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[2001:8b0:1d0::1]) by mx.google.com with ESMTPS id cu2si31682717wjb.71.2014.06.09.06.50.36 for (version=TLSv1.2 cipher=RC4-SHA bits=128/128); Mon, 09 Jun 2014 06:50:36 -0700 (PDT) Received-SPF: none (google.com: pm215@archaic.org.uk does not designate permitted sender hosts) client-ip=2001:8b0:1d0::1; Received: from pm215 by mnementh.archaic.org.uk with local (Exim 4.80) (envelope-from ) id 1Wtzy6-00066z-Ss; Mon, 09 Jun 2014 14:50:34 +0100 From: Peter Maydell To: qemu-devel@nongnu.org Cc: patches@linaro.org Subject: [PATCH] target-arm: A64: Use PMULL feature bit for PMULL Date: Mon, 9 Jun 2014 14:50:34 +0100 Message-Id: <1402321834-23468-1-git-send-email-peter.maydell@linaro.org> X-Mailer: git-send-email 1.7.10.4 X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: peter.maydell@linaro.org X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.220.174 as permitted sender) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Precedence: list Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org List-ID: X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , Now that we have a separate ARM_FEATURE_V8_PMULL bit, use it for the A64 PMULL, not the AES feature bit. Signed-off-by: Peter Maydell --- Oops, I thought I'd sent this trivial patch already; it sits between the "finish v8 AArch32 crypto insns" and the "add v8 AArch64 crypto instructions" patchsets, both already sent. linux-user/elfload.c | 2 +- target-arm/translate-a64.c | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/linux-user/elfload.c b/linux-user/elfload.c index 3241fec..e872493 100644 --- a/linux-user/elfload.c +++ b/linux-user/elfload.c @@ -539,7 +539,7 @@ static uint32_t get_elf_hwcap(void) /* probe for the extra features */ #define GET_FEATURE(feat, hwcap) \ do { if (arm_feature(&cpu->env, feat)) { hwcaps |= hwcap; } } while (0) - GET_FEATURE(ARM_FEATURE_V8_AES, ARM_HWCAP_A64_PMULL); + GET_FEATURE(ARM_FEATURE_V8_PMULL, ARM_HWCAP_A64_PMULL); #undef GET_FEATURE return hwcaps; diff --git a/target-arm/translate-a64.c b/target-arm/translate-a64.c index 9f964df..389a256 100644 --- a/target-arm/translate-a64.c +++ b/target-arm/translate-a64.c @@ -8573,7 +8573,7 @@ static void disas_simd_three_reg_diff(DisasContext *s, uint32_t insn) return; } if (size == 3) { - if (!arm_dc_feature(s, ARM_FEATURE_V8_AES)) { + if (!arm_dc_feature(s, ARM_FEATURE_V8_PMULL)) { unallocated_encoding(s); return; }