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X-Received-From: 2001:8b0:1d0::1 Subject: [Qemu-devel] [PULL 15/20] target-arm: A32/T32: Mask CRC value in calling code, not helper X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: , List-Help: , List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: peter.maydell@linaro.org X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.220.180 as permitted sender) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 Bring the 32-bit CRC helper functions into line with the A64 ones, by masking the high bytes of the value in the calling code rather than the helper. This is more efficient since we can determine the mask at translation time. Signed-off-by: Peter Maydell Message-id: 1401458125-27977-7-git-send-email-peter.maydell@linaro.org --- target-arm/helper.c | 25 ++++++------------------- target-arm/translate.c | 10 ++++++++++ 2 files changed, 16 insertions(+), 19 deletions(-) diff --git a/target-arm/helper.c b/target-arm/helper.c index d32d120..2b7a904 100644 --- a/target-arm/helper.c +++ b/target-arm/helper.c @@ -5585,28 +5585,15 @@ int arm_rmode_to_sf(int rmode) return rmode; } -static void crc_init_buffer(uint8_t *buf, uint32_t val, uint32_t bytes) -{ - memset(buf, 0, 4); - - if (bytes == 1) { - buf[0] = val & 0xff; - } else if (bytes == 2) { - buf[0] = val & 0xff; - buf[1] = (val >> 8) & 0xff; - } else { - buf[0] = val & 0xff; - buf[1] = (val >> 8) & 0xff; - buf[2] = (val >> 16) & 0xff; - buf[3] = (val >> 24) & 0xff; - } -} - +/* CRC helpers. + * The upper bytes of val (above the number specified by 'bytes') must have + * been zeroed out by the caller. + */ uint32_t HELPER(crc32)(uint32_t acc, uint32_t val, uint32_t bytes) { uint8_t buf[4]; - crc_init_buffer(buf, val, bytes); + stl_le_p(buf, val); /* zlib crc32 converts the accumulator and output to one's complement. */ return crc32(acc ^ 0xffffffff, buf, bytes) ^ 0xffffffff; @@ -5616,7 +5603,7 @@ uint32_t HELPER(crc32c)(uint32_t acc, uint32_t val, uint32_t bytes) { uint8_t buf[4]; - crc_init_buffer(buf, val, bytes); + stl_le_p(buf, val); /* Linux crc32c converts the output to one's complement. */ return crc32c(acc, buf, bytes) ^ 0xffffffff; diff --git a/target-arm/translate.c b/target-arm/translate.c index 41c3fc7..351943f 100644 --- a/target-arm/translate.c +++ b/target-arm/translate.c @@ -7806,6 +7806,11 @@ static void disas_arm_insn(CPUARMState * env, DisasContext *s) tmp = load_reg(s, rn); tmp2 = load_reg(s, rm); + if (op1 == 0) { + tcg_gen_andi_i32(tmp2, tmp2, 0xff); + } else if (op1 == 1) { + tcg_gen_andi_i32(tmp2, tmp2, 0xffff); + } tmp3 = tcg_const_i32(1 << op1); if (c & 0x2) { gen_helper_crc32c(tmp, tmp, tmp2, tmp3); @@ -9438,6 +9443,11 @@ static int disas_thumb2_insn(CPUARMState *env, DisasContext *s, uint16_t insn_hw } tmp2 = load_reg(s, rm); + if (sz == 0) { + tcg_gen_andi_i32(tmp2, tmp2, 0xff); + } else if (sz == 1) { + tcg_gen_andi_i32(tmp2, tmp2, 0xffff); + } tmp3 = tcg_const_i32(1 << sz); if (c) { gen_helper_crc32c(tmp, tmp, tmp2, tmp3);