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[2001:8b0:1d0::1]) by mx.google.com with ESMTPS id qi8si9390455oeb.78.2014.06.26.04.42.49 for (version=TLSv1.2 cipher=RC4-SHA bits=128/128); Thu, 26 Jun 2014 04:42:49 -0700 (PDT) Received-SPF: none (google.com: pm215@archaic.org.uk does not designate permitted sender hosts) client-ip=2001:8b0:1d0::1; Received: from pm215 by mnementh.archaic.org.uk with local (Exim 4.80) (envelope-from ) id 1X084k-0005KX-Ks; Thu, 26 Jun 2014 12:42:46 +0100 From: Peter Maydell To: qemu-devel@nongnu.org Cc: patches@linaro.org, Peter Crosthwaite Subject: [PATCH v2 2/4] hw/arm/strongarm: Wire up missing GPIO and PPC vmstate Date: Thu, 26 Jun 2014 12:42:44 +0100 Message-Id: <1403782966-20457-3-git-send-email-peter.maydell@linaro.org> X-Mailer: git-send-email 1.7.10.4 In-Reply-To: <1403782966-20457-1-git-send-email-peter.maydell@linaro.org> References: <1403782966-20457-1-git-send-email-peter.maydell@linaro.org> X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: peter.maydell@linaro.org X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.220.179 as permitted sender) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Precedence: list Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org List-ID: X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , The VMStateDescription structs for the GPIO and PPC devices were accidentally never wired up. Add missing state fields and register them via dc->vmsd. Signed-off-by: Peter Maydell --- hw/arm/strongarm.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/hw/arm/strongarm.c b/hw/arm/strongarm.c index cc2d7f2..9e2a0d4 100644 --- a/hw/arm/strongarm.c +++ b/hw/arm/strongarm.c @@ -674,6 +674,7 @@ static const VMStateDescription vmstate_strongarm_gpio_regs = { VMSTATE_UINT32(falling, StrongARMGPIOInfo), VMSTATE_UINT32(status, StrongARMGPIOInfo), VMSTATE_UINT32(gafr, StrongARMGPIOInfo), + VMSTATE_UINT32(prev_level, StrongARMGPIOInfo), VMSTATE_END_OF_LIST(), }, }; @@ -685,6 +686,7 @@ static void strongarm_gpio_class_init(ObjectClass *klass, void *data) k->init = strongarm_gpio_initfn; dc->desc = "StrongARM GPIO controller"; + dc->vmsd = &vmstate_strongarm_gpio_regs; } static const TypeInfo strongarm_gpio_info = { @@ -844,6 +846,7 @@ static const VMStateDescription vmstate_strongarm_ppc_regs = { VMSTATE_UINT32(ppar, StrongARMPPCInfo), VMSTATE_UINT32(psdr, StrongARMPPCInfo), VMSTATE_UINT32(ppfr, StrongARMPPCInfo), + VMSTATE_UINT32(prev_level, StrongARMPPCInfo), VMSTATE_END_OF_LIST(), }, }; @@ -855,6 +858,7 @@ static void strongarm_ppc_class_init(ObjectClass *klass, void *data) k->init = strongarm_ppc_init; dc->desc = "StrongARM PPC controller"; + dc->vmsd = &vmstate_strongarm_ppc_regs; } static const TypeInfo strongarm_ppc_info = {