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[2001:8b0:1d0::1]) by mx.google.com with ESMTPS id bg4si10342082wjb.126.2014.06.26.08.37.19 for (version=TLSv1.2 cipher=RC4-SHA bits=128/128); Thu, 26 Jun 2014 08:37:19 -0700 (PDT) Received-SPF: none (google.com: pm215@archaic.org.uk does not designate permitted sender hosts) client-ip=2001:8b0:1d0::1; Received: from pm215 by mnementh.archaic.org.uk with local (Exim 4.80) (envelope-from ) id 1X0Bjh-0005Ot-EC; Thu, 26 Jun 2014 16:37:17 +0100 From: Peter Maydell To: qemu-devel@nongnu.org Cc: patches@linaro.org, Richard Henderson , =?UTF-8?q?Andreas=20F=C3=A4rber?= Subject: [RFC UNTESTED] tcg/ppc: Fix support for 64-bit PPC MacOSX hosts Date: Thu, 26 Jun 2014 16:37:17 +0100 Message-Id: <1403797037-20734-1-git-send-email-peter.maydell@linaro.org> X-Mailer: git-send-email 1.7.10.4 X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: peter.maydell@linaro.org X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.128.181 as permitted sender) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Precedence: list Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org List-ID: X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , Add back in the support for 64-bit PPC MacOSX hosts that was broken in the recent merge of the 32-bit and 64-bit TCG backends. Signed-off-by: Peter Maydell Reviewed-by: Richard Henderson Reported-by: Andreas Färber Tested-by: Andreas Färber --- As per subject, this is totally untested since I don't have any PPC MacOSX hosts; numbers based on the documentation at https://developer.apple.com/library/mac/documentation/DeveloperTools/Conceptual/LowLevelABI/100-32-bit_PowerPC_Function_Calling_Conventions/32bitPowerPC.html https://developer.apple.com/library/mac/documentation/DeveloperTools/Conceptual/LowLevelABI/110-64-bit_PowerPC_Function_Calling_Conventions/64bitPowerPC.html tcg/ppc/tcg-target.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/tcg/ppc/tcg-target.c b/tcg/ppc/tcg-target.c index c83fd9f..1030318 100644 --- a/tcg/ppc/tcg-target.c +++ b/tcg/ppc/tcg-target.c @@ -1716,6 +1716,9 @@ static void tcg_out_qemu_st(TCGContext *s, const TCGArg *args, bool is_64) # define LINK_AREA_SIZE (6 * SZR) # define LR_OFFSET (1 * SZR) # define TCG_TARGET_CALL_STACK_OFFSET (LINK_AREA_SIZE + 8 * SZR) +#elif defined(TCG_TARGET_CALL_DARWIN) +# define LINK_AREA_SIZE (6 * SZR) +# define LR_OFFSET (2 * SZR) #elif TCG_TARGET_REG_BITS == 64 # if defined(_CALL_ELF) && _CALL_ELF == 2 # define LINK_AREA_SIZE (4 * SZR) @@ -1725,9 +1728,6 @@ static void tcg_out_qemu_st(TCGContext *s, const TCGArg *args, bool is_64) # if defined(_CALL_SYSV) # define LINK_AREA_SIZE (2 * SZR) # define LR_OFFSET (1 * SZR) -# elif defined(TCG_TARGET_CALL_DARWIN) -# define LINK_AREA_SIZE 24 -# define LR_OFFSET 8 # endif #endif #ifndef LR_OFFSET