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[2001:4830:134:3::11]) by mx.google.com with ESMTPS id i64si42497901qge.60.2014.08.22.07.44.58 for (version=TLSv1 cipher=RC4-SHA bits=128/128); Fri, 22 Aug 2014 07:44:58 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) client-ip=2001:4830:134:3::11; Received: from localhost ([::1]:37526 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1XKq5J-0006As-T6 for patch@linaro.org; Fri, 22 Aug 2014 10:44:57 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:46333) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1XKq4o-0005qq-Py for qemu-devel@nongnu.org; Fri, 22 Aug 2014 10:44:31 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1XKq4j-0003E4-SX for qemu-devel@nongnu.org; Fri, 22 Aug 2014 10:44:26 -0400 Received: from mnementh.archaic.org.uk ([81.2.115.146]:46668) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1XKq4j-0003Dv-Lk for qemu-devel@nongnu.org; Fri, 22 Aug 2014 10:44:21 -0400 Received: from pm215 by mnementh.archaic.org.uk with local (Exim 4.80) (envelope-from ) id 1XKq4i-0001u8-Ay; Fri, 22 Aug 2014 15:44:20 +0100 From: Peter Maydell To: qemu-devel@nongnu.org Date: Fri, 22 Aug 2014 15:44:20 +0100 Message-Id: <1408718660-7295-1-git-send-email-peter.maydell@linaro.org> X-Mailer: git-send-email 1.7.10.4 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x X-Received-From: 81.2.115.146 Cc: Ard Biesheuvel , patches@linaro.org Subject: [Qemu-devel] [PATCH] target-arm: Correct Cortex-A57 ISAR5 and AA64ISAR0 ID register values X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: , List-Help: , List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: peter.maydell@linaro.org X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.220.181 as permitted sender) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 We implement the crypto extensions but were incorrectly reporting ID register values for the Cortex-A57 which did not advertise crypto. Use the correct values as described in the TRM. With this fix Linux correctly detects presence of the crypto features and advertises them in /proc/cpuinfo. Reported-by: Ard Biesheuvel Cc: qemu-stable@nongnu.org Signed-off-by: Peter Maydell --- target-arm/cpu64.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/target-arm/cpu64.c b/target-arm/cpu64.c index 38d2b84..aa42803 100644 --- a/target-arm/cpu64.c +++ b/target-arm/cpu64.c @@ -123,9 +123,10 @@ static void aarch64_a57_initfn(Object *obj) cpu->id_isar2 = 0x21232042; cpu->id_isar3 = 0x01112131; cpu->id_isar4 = 0x00011142; + cpu->id_isar5 = 0x00011121; cpu->id_aa64pfr0 = 0x00002222; cpu->id_aa64dfr0 = 0x10305106; - cpu->id_aa64isar0 = 0x00010000; + cpu->id_aa64isar0 = 0x00011120; cpu->id_aa64mmfr0 = 0x00001124; cpu->dbgdidr = 0x3516d000; cpu->clidr = 0x0a200023;