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X-Received-From: 2001:8b0:1d0::1 Subject: [Qemu-devel] [PULL 7/7] target-arm: Correct condition for taking VIRQ and VFIQ X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: , List-Help: , List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: peter.maydell@linaro.org X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.215.41 as permitted sender) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 The VIRQ and VFIQ exceptions are (as the comments say) only taken if the CPU is in Non-secure state and the IMO/FMO bits are set to enable virtualized interrupts. Correct the code to actually implement this. Signed-off-by: Peter Maydell Reviewed-by: Edgar E. Iglesias Message-id: 1414684132-23971-3-git-send-email-peter.maydell@linaro.org --- target-arm/cpu.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/target-arm/cpu.h b/target-arm/cpu.h index 97eaf79..7f80090 100644 --- a/target-arm/cpu.h +++ b/target-arm/cpu.h @@ -1269,13 +1269,13 @@ static inline bool arm_excp_unmasked(CPUState *cs, unsigned int excp_idx) } return !(env->daif & PSTATE_I); case EXCP_VFIQ: - if (!secure && !(env->cp15.hcr_el2 & HCR_FMO)) { + if (secure || !(env->cp15.hcr_el2 & HCR_FMO)) { /* VFIQs are only taken when hypervized and non-secure. */ return false; } return !(env->daif & PSTATE_F); case EXCP_VIRQ: - if (!secure && !(env->cp15.hcr_el2 & HCR_IMO)) { + if (secure || !(env->cp15.hcr_el2 & HCR_IMO)) { /* VIRQs are only taken when hypervized and non-secure. */ return false; }