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[2001:8b0:1d0::1]) by mx.google.com with ESMTPS id dw9si192326wib.9.2014.12.11.10.00.40 for (version=TLSv1.2 cipher=RC4-SHA bits=128/128); Thu, 11 Dec 2014 10:00:41 -0800 (PST) Received-SPF: none (google.com: pm215@archaic.org.uk does not designate permitted sender hosts) client-ip=2001:8b0:1d0::1; Received: from pm215 by mnementh.archaic.org.uk with local (Exim 4.80) (envelope-from ) id 1Xz82W-0001T9-GN; Thu, 11 Dec 2014 18:00:36 +0000 From: Peter Maydell To: qemu-devel@nongnu.org Cc: patches@linaro.org, Richard Henderson , Aurelien Jarno , Paolo Bonzini , "Maciej W. Rozycki" Subject: [PATCH] !fixup softfloat: get default NaN values for SNAN_BIT_IS_ONE right Date: Thu, 11 Dec 2014 18:00:36 +0000 Message-Id: <1418320836-5622-1-git-send-email-peter.maydell@linaro.org> X-Mailer: git-send-email 1.7.10.4 X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: peter.maydell@linaro.org X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.215.54 as permitted sender) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Precedence: list Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org List-ID: X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , The default NaN values for SNAN_BIT_IS_ONE were actually infinities (all exponent bits set, all mantissa bits clear). Make them really NaNs (all exponent bits set, top bit of mantissa clear, all other mantissa bits set). Signed-off-by: Peter Maydell --- This fixes the error pointed out by Maciej. I'll squash this patch into the other softfloat-relicensing patch; it didn't seem worth sending out the whole series again for this since I anticipate further review. In the meantime, here's the correction. fpu/softfloat-specialize.h | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/fpu/softfloat-specialize.h b/fpu/softfloat-specialize.h index b65505f..5b4dbcd 100644 --- a/fpu/softfloat-specialize.h +++ b/fpu/softfloat-specialize.h @@ -116,7 +116,7 @@ const float32 float32_default_nan = const_float32(0x7FFFFFFF); defined(TARGET_XTENSA) const float32 float32_default_nan = const_float32(0x7FC00000); #elif SNAN_BIT_IS_ONE -const float32 float32_default_nan = const_float32(0xFF800000); +const float32 float32_default_nan = const_float32(0x7FBFFFFF); #else const float32 float32_default_nan = const_float32(0xFFC00000); #endif @@ -129,7 +129,7 @@ const float64 float64_default_nan = const_float64(LIT64( 0x7FFFFFFFFFFFFFFF )); #elif defined(TARGET_PPC) || defined(TARGET_ARM) || defined(TARGET_ALPHA) const float64 float64_default_nan = const_float64(LIT64( 0x7FF8000000000000 )); #elif SNAN_BIT_IS_ONE -const float64 float64_default_nan = const_float64(LIT64(0xFFF0000000000000)); +const float64 float64_default_nan = const_float64(LIT64(0x7FF7FFFFFFFFFFFF)); #else const float64 float64_default_nan = const_float64(LIT64( 0xFFF8000000000000 )); #endif @@ -138,8 +138,8 @@ const float64 float64_default_nan = const_float64(LIT64( 0xFFF8000000000000 )); | The pattern for a default generated extended double-precision NaN. *----------------------------------------------------------------------------*/ #if SNAN_BIT_IS_ONE -#define floatx80_default_nan_high 0xFFFF -#define floatx80_default_nan_low LIT64(0x8000000000000000) +#define floatx80_default_nan_high 0x7FFF +#define floatx80_default_nan_low LIT64(0xBFFFFFFFFFFFFFFF) #else #define floatx80_default_nan_high 0xFFFF #define floatx80_default_nan_low LIT64( 0xC000000000000000 ) @@ -153,8 +153,8 @@ const floatx80 floatx80_default_nan | `low' values hold the most- and least-significant bits, respectively. *----------------------------------------------------------------------------*/ #if SNAN_BIT_IS_ONE -#define float128_default_nan_high LIT64(0xFFFF000000000000) -#define float128_default_nan_low LIT64(0x0000000000000000) +#define float128_default_nan_high LIT64(0x7FFF7FFFFFFFFFFF) +#define float128_default_nan_low LIT64(0xFFFFFFFFFFFFFFFF) #else #define float128_default_nan_high LIT64( 0xFFFF800000000000 ) #define float128_default_nan_low LIT64( 0x0000000000000000 )