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[2001:4830:134:3::11]) by mx.google.com with ESMTPS id f103si19484523qge.32.2014.12.22.01.07.05 for (version=TLSv1 cipher=RC4-SHA bits=128/128); Mon, 22 Dec 2014 01:07:06 -0800 (PST) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) client-ip=2001:4830:134:3::11; Received: from localhost ([::1]:39693 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Y2yxF-0003Nc-78 for patch@linaro.org; Mon, 22 Dec 2014 04:07:05 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:45200) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Y2yw8-000246-6y for qemu-devel@nongnu.org; Mon, 22 Dec 2014 04:06:01 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1Y2yw2-0001ev-Gy for qemu-devel@nongnu.org; Mon, 22 Dec 2014 04:05:56 -0500 Received: from mail-pa0-f45.google.com ([209.85.220.45]:34267) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Y2yw2-0001ep-C5 for qemu-devel@nongnu.org; Mon, 22 Dec 2014 04:05:50 -0500 Received: by mail-pa0-f45.google.com with SMTP id lf10so5547096pab.18 for ; Mon, 22 Dec 2014 01:05:49 -0800 (PST) X-Received: by 10.68.239.102 with SMTP id vr6mr8170212pbc.35.1419239149857; Mon, 22 Dec 2014 01:05:49 -0800 (PST) Received: from pnqlab006.amcc.com ([182.73.239.130]) by mx.google.com with ESMTPSA id ly9sm2305423pdb.45.2014.12.22.01.05.45 (version=TLSv1.1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Mon, 22 Dec 2014 01:05:49 -0800 (PST) From: Pranavkumar Sawargaonkar To: qemu-devel@nongnu.org Date: Mon, 22 Dec 2014 14:34:57 +0530 Message-Id: <1419239097-14758-3-git-send-email-pranavkumar@linaro.org> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1419239097-14758-1-git-send-email-pranavkumar@linaro.org> References: <1419239097-14758-1-git-send-email-pranavkumar@linaro.org> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.85.220.45 Cc: peter.maydell@linaro.org, patches@apm.com, alex.bennee@linaro.org, kvmarm@lists.cs.columbia.edu, christoffer.dall@linaro.org, Pranavkumar Sawargaonkar Subject: [Qemu-devel] [PATCH V2 2/2] target-arm: Guest cpu endianness determination for virtio KVM ARM/ARM64 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: , List-Help: , List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: pranavkumar@linaro.org X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.217.172 as permitted sender) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 This patch implements a fucntion pointer virtio_is_big_endian() from "CPUClass" structure for arm/arm64. Function arm_cpu_virtio_endianness() is added to determine and return the guest cpu endianness to virtio. This is required for running cross endian guests with virtio on ARM/ARM64. Changelog: V2: - Change the patch to be used generically for both ARM and ARM64. - Address the review comments received in v1. V1: - First patch in this series. - http://lists.gnu.org/archive/html/qemu-devel/2014-10/msg03321.html Signed-off-by: Pranavkumar Sawargaonkar --- target-arm/cpu.c | 27 +++++++++++++++++++++++++++ target-arm/cpu.h | 2 ++ 2 files changed, 29 insertions(+) diff --git a/target-arm/cpu.c b/target-arm/cpu.c index d3db279..7145e02 100644 --- a/target-arm/cpu.c +++ b/target-arm/cpu.c @@ -320,6 +320,32 @@ static void arm_cpu_kvm_set_irq(void *opaque, int irq, int level) kvm_set_irq(kvm_state, kvm_irq, level ? 1 : 0); #endif } + +static bool arm_cpu_virtio_endianness(CPUState *cs) +{ + ARMCPU *cpu = ARM_CPU(cs); + CPUARMState *env = &cpu->env; + uint64_t sctlr; + + cpu_synchronize_state(cs); + + /* Check if we are running 32bit guest or not */ + if (!is_a64(env)) { + return (env->pstate & CPSR_E) ? 1 : 0; + } + + sctlr = env->cp15.sctlr_el[1]; + + if ((env->pstate & 0xf) == PSTATE_MODE_EL0t) { + sctlr &= SCTLR_E0E; + } else { + sctlr &= SCTLR_EE; + } + + /* If BIG-ENDIAN return 1 */ + return sctlr ? 1 : 0; +} + #endif static inline void set_feature(CPUARMState *env, int feature) @@ -1157,6 +1183,7 @@ static void arm_cpu_class_init(ObjectClass *oc, void *data) cc->do_interrupt = arm_cpu_do_interrupt; cc->get_phys_page_debug = arm_cpu_get_phys_page_debug; cc->vmsd = &vmstate_arm_cpu; + cc->virtio_is_big_endian = arm_cpu_virtio_endianness; #endif cc->gdb_num_core_regs = 26; cc->gdb_core_xml_file = "arm-core.xml"; diff --git a/target-arm/cpu.h b/target-arm/cpu.h index 7ba55f0..f32a5b6 100644 --- a/target-arm/cpu.h +++ b/target-arm/cpu.h @@ -32,6 +32,8 @@ # define ELF_MACHINE EM_ARM #endif +#define TARGET_IS_BIENDIAN 1 + #define CPUArchState struct CPUARMState #include "qemu-common.h"