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X-Received-From: 2001:8b0:1d0::1 Subject: [Qemu-devel] [PULL 09/28] Fix FMULX not squashing denormalized inputs when FZ is set. X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: , List-Help: , List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: peter.maydell@linaro.org X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.217.174 as permitted sender) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 From: Xiangyu Hu While FMULX returns a 2.0f float when two operators are infinity and zero, those operators should be unpacked from raw inputs first. Inconsistent cases would occur when operators are denormalized floats in flush-to-zero mode. A wrong codepath will be entered and 2.0f will not be returned without this patch. Fix by checking whether inputs need to be flushed before running into different codepaths. Signed-off-by: Xiangyu Hu Message-id: 1422459650-12490-1-git-send-email-libhu.so@gmail.com Signed-off-by: Peter Maydell --- target-arm/helper-a64.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/target-arm/helper-a64.c b/target-arm/helper-a64.c index 81066ca..ebd9247 100644 --- a/target-arm/helper-a64.c +++ b/target-arm/helper-a64.c @@ -135,6 +135,9 @@ float32 HELPER(vfp_mulxs)(float32 a, float32 b, void *fpstp) { float_status *fpst = fpstp; + a = float32_squash_input_denormal(a, fpst); + b = float32_squash_input_denormal(b, fpst); + if ((float32_is_zero(a) && float32_is_infinity(b)) || (float32_is_infinity(a) && float32_is_zero(b))) { /* 2.0 with the sign bit set to sign(A) XOR sign(B) */ @@ -148,6 +151,9 @@ float64 HELPER(vfp_mulxd)(float64 a, float64 b, void *fpstp) { float_status *fpst = fpstp; + a = float64_squash_input_denormal(a, fpst); + b = float64_squash_input_denormal(b, fpst); + if ((float64_is_zero(a) && float64_is_infinity(b)) || (float64_is_infinity(a) && float64_is_zero(b))) { /* 2.0 with the sign bit set to sign(A) XOR sign(B) */