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X-Received-From: 2001:8b0:1d0::1 Subject: [Qemu-devel] [PULL 18/28] target-arm: Don't define any MMU_MODE*_SUFFIXes X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: , List-Help: , List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: peter.maydell@linaro.org X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.217.170 as permitted sender) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 target-arm doesn't use any of the MMU-mode specific cpu ldst accessor functions. Suppress their generation by not defining any of the MMU_MODE*_SUFFIX macros. ("user" and "kernel" are too simplistic as descriptions of indexes 0 and 1 anyway.) Signed-off-by: Peter Maydell Reviewed-by: Greg Bellows Reviewed-by: Edgar E. Iglesias --- target-arm/cpu.h | 2 -- 1 file changed, 2 deletions(-) diff --git a/target-arm/cpu.h b/target-arm/cpu.h index 92c6ac6..3585754 100644 --- a/target-arm/cpu.h +++ b/target-arm/cpu.h @@ -1645,8 +1645,6 @@ typedef enum ARMMMUIdx { ARMMMUIdx_S1NSE1 = 8, } ARMMMUIdx; -#define MMU_MODE0_SUFFIX _user -#define MMU_MODE1_SUFFIX _kernel #define MMU_USER_IDX 0 /* Return the exception level we're running at if this is our mmu_idx */