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X-Received-From: 2001:8b0:1d0::1 Subject: [Qemu-devel] [PULL 25/28] disas/arm-a64.cc: Tell libvixl correct code addresses X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: , List-Help: , List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: peter.maydell@linaro.org X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.217.174 as permitted sender) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 disassembling relative branches in code which doesn't reside at what the guest CPU would think its execution address is. Use the new MapCodeAddress() API to tell libvixl where the code is from the guest CPU's point of view so it can get the target addresses right. Previous disassembly: 0x0000000040000000: 580000c0 ldr x0, pc+24 (addr 0x7f6cb7020434) 0x0000000040000004: aa1f03e1 mov x1, xzr 0x0000000040000008: aa1f03e2 mov x2, xzr 0x000000004000000c: aa1f03e3 mov x3, xzr 0x0000000040000010: 58000084 ldr x4, pc+16 (addr 0x7f6cb702042c) 0x0000000040000014: d61f0080 br x4 Fixed disassembly: 0x0000000040000000: 580000c0 ldr x0, pc+24 (addr 0x40000018) 0x0000000040000004: aa1f03e1 mov x1, xzr 0x0000000040000008: aa1f03e2 mov x2, xzr 0x000000004000000c: aa1f03e3 mov x3, xzr 0x0000000040000010: 58000084 ldr x4, pc+16 (addr 0x40000020) 0x0000000040000014: d61f0080 br x4 Signed-off-by: Peter Maydell Message-id: 1422274779-13359-3-git-send-email-peter.maydell@linaro.org --- disas/arm-a64.cc | 9 ++++++--- 1 file changed, 6 insertions(+), 3 deletions(-) diff --git a/disas/arm-a64.cc b/disas/arm-a64.cc index ca29f6f..e04f946 100644 --- a/disas/arm-a64.cc +++ b/disas/arm-a64.cc @@ -67,7 +67,8 @@ static void vixl_init(FILE *f) { int print_insn_arm_a64(uint64_t addr, disassemble_info *info) { uint8_t bytes[INSN_SIZE]; - uint32_t instr; + uint32_t instrval; + const Instruction *instr; int status; status = info->read_memory_func(addr, bytes, INSN_SIZE, info); @@ -80,8 +81,10 @@ int print_insn_arm_a64(uint64_t addr, disassemble_info *info) vixl_init(info->stream); } - instr = bytes[0] | bytes[1] << 8 | bytes[2] << 16 | bytes[3] << 24; - vixl_decoder->Decode(reinterpret_cast(&instr)); + instrval = bytes[0] | bytes[1] << 8 | bytes[2] << 16 | bytes[3] << 24; + instr = reinterpret_cast(&instrval); + vixl_disasm->MapCodeAddress(addr, instr); + vixl_decoder->Decode(instr); return INSN_SIZE; }