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[2001:4830:134:3::11]) by mx.google.com with ESMTPS id 29si2154440qkq.108.2015.05.28.05.21.38 for (version=TLSv1 cipher=RC4-SHA bits=128/128); Thu, 28 May 2015 05:21:38 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) client-ip=2001:4830:134:3::11; Received: from localhost ([::1]:58399 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Yxwob-0004OX-VA for patch@linaro.org; Thu, 28 May 2015 08:21:37 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:58348) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1YxweE-0002Kb-En for qemu-devel@nongnu.org; Thu, 28 May 2015 08:10:59 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1Yxwe7-0003dm-Hr for qemu-devel@nongnu.org; Thu, 28 May 2015 08:10:54 -0400 Received: from szxga01-in.huawei.com ([58.251.152.64]:45272) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Yxwe6-0003cU-Od; Thu, 28 May 2015 08:10:47 -0400 Received: from 172.24.2.119 (EHLO SZXEML429-HUB.china.huawei.com) ([172.24.2.119]) by szxrg01-dlp.huawei.com (MOS 4.3.7-GA FastPath queued) with ESMTP id COP98114; Thu, 28 May 2015 20:10:33 +0800 (CST) Received: from HGHY1Z002260041.china.huawei.com (10.177.16.142) by SZXEML429-HUB.china.huawei.com (10.82.67.184) with Microsoft SMTP Server id 14.3.158.1; Thu, 28 May 2015 20:10:13 +0800 From: Shannon Zhao To: Date: Thu, 28 May 2015 20:08:43 +0800 Message-ID: <1432814932-12608-21-git-send-email-zhaoshenglong@huawei.com> X-Mailer: git-send-email 1.9.0.msysgit.0 In-Reply-To: <1432814932-12608-1-git-send-email-zhaoshenglong@huawei.com> References: <1432814932-12608-1-git-send-email-zhaoshenglong@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.177.16.142] X-CFilter-Loop: Reflected X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.4.x-2.6.x [generic] X-Received-From: 58.251.152.64 Cc: qemu-trivial@nongnu.org, pbonzini@redhat.com, mjt@tls.msk.ru, shannon.zhao@linaro.org, peter.maydell@linaro.org Subject: [Qemu-devel] [PATCH 20/29] hw/unicore32/puv3.c: Fix memory leak spotted by valgrind X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: , List-Help: , List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: patch@linaro.org X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.215.48 as permitted sender) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 From: Shannon Zhao valgrind complains about: ==26001== 8 bytes in 1 blocks are definitely lost in loss record 234 of 1,038 ==26001== at 0x4C2845D: malloc (in /usr/lib64/valgrind/vgpreload_memcheck-amd64-linux.so) ==26001== by 0x1E1483: malloc_and_trace (vl.c:2556) ==26001== by 0x64C770E: g_malloc (in /usr/lib64/libglib-2.0.so.0.3600.3) ==26001== by 0x22D17B: qemu_extend_irqs (irq.c:55) ==26001== by 0x22D207: qemu_allocate_irqs (irq.c:64) ==26001== by 0x1BC56D: puv3_soc_init (puv3.c:49) ==26001== by 0x1BC8B1: puv3_init (puv3.c:128) ==26001== by 0x1E584E: main (vl.c:4249) Signed-off-by: Shannon Zhao Signed-off-by: Shannon Zhao --- hw/unicore32/puv3.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/hw/unicore32/puv3.c b/hw/unicore32/puv3.c index cc9a21a..703e29d 100644 --- a/hw/unicore32/puv3.c +++ b/hw/unicore32/puv3.c @@ -40,15 +40,15 @@ static void puv3_intc_cpu_handler(void *opaque, int irq, int level) static void puv3_soc_init(CPUUniCore32State *env) { - qemu_irq *cpu_intc, irqs[PUV3_IRQS_NR]; + qemu_irq cpu_intc, irqs[PUV3_IRQS_NR]; DeviceState *dev; MemoryRegion *i8042 = g_new(MemoryRegion, 1); int i; /* Initialize interrupt controller */ - cpu_intc = qemu_allocate_irqs(puv3_intc_cpu_handler, - uc32_env_get_cpu(env), 1); - dev = sysbus_create_simple("puv3_intc", PUV3_INTC_BASE, *cpu_intc); + cpu_intc = qemu_allocate_irq(puv3_intc_cpu_handler, + uc32_env_get_cpu(env), 0); + dev = sysbus_create_simple("puv3_intc", PUV3_INTC_BASE, cpu_intc); for (i = 0; i < PUV3_IRQS_NR; i++) { irqs[i] = qdev_get_gpio_in(dev, i); }