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[2001:4830:134:3::11]) by mx.google.com with ESMTPS id 74si7816102qgp.63.2015.06.05.08.56.34 for (version=TLSv1 cipher=RC4-SHA bits=128/128); Fri, 05 Jun 2015 08:56:35 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) client-ip=2001:4830:134:3::11; Received: from localhost ([::1]:48377 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Z0tz0-0003VB-L5 for patch@linaro.org; Fri, 05 Jun 2015 11:56:34 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:44631) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Z0txy-0002Xc-Hl for qemu-devel@nongnu.org; Fri, 05 Jun 2015 11:55:34 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1Z0txu-0002HO-LK for qemu-devel@nongnu.org; Fri, 05 Jun 2015 11:55:30 -0400 Received: from static.88-198-71-155.clients.your-server.de ([88.198.71.155]:55528 helo=socrates.bennee.com) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Z0txu-0002GH-F7 for qemu-devel@nongnu.org; Fri, 05 Jun 2015 11:55:26 -0400 Received: from localhost ([127.0.0.1] helo=zen.linaroharston) by socrates.bennee.com with esmtp (Exim 4.80) (envelope-from ) id 1Z0vJv-0001oT-I5; Fri, 05 Jun 2015 19:22:15 +0200 From: =?UTF-8?q?Alex=20Benn=C3=A9e?= To: qemu-devel@nongnu.org Date: Fri, 5 Jun 2015 16:55:34 +0100 Message-Id: <1433519734-11243-1-git-send-email-alex.bennee@linaro.org> X-Mailer: git-send-email 2.4.2 MIME-Version: 1.0 X-SA-Exim-Connect-IP: 127.0.0.1 X-SA-Exim-Mail-From: alex.bennee@linaro.org X-SA-Exim-Scanned: No (on socrates.bennee.com); SAEximRunCond expanded to false X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x X-Received-From: 88.198.71.155 Cc: =?UTF-8?q?Alex=20Benn=C3=A9e?= Subject: [Qemu-devel] [RFC PATCH] cputlb: modernise the debug support X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: , List-Help: , List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: alex.bennee@linaro.org X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.217.174 as permitted sender) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 To avoid cluttering the code with #ifdef legs we wrap up the print statements into a tlb_debug() macro. As access to the virtual TLB can get quite heavy defining DEBUG_TLB_LOG will ensure all the logs go to the qemu_log target of CPU_LOG_MMU instead of stderr. I've also removed DEBUG_TLB_CHECK which wasn't used. Signed-off-by: Alex Bennée --- cputlb.c | 47 ++++++++++++++++++++++++++++------------------- 1 file changed, 28 insertions(+), 19 deletions(-) diff --git a/cputlb.c b/cputlb.c index 7606548..ddb7b59 100644 --- a/cputlb.c +++ b/cputlb.c @@ -30,8 +30,23 @@ #include "exec/ram_addr.h" #include "tcg/tcg.h" -//#define DEBUG_TLB -//#define DEBUG_TLB_CHECK +/* DEBUG defines, enable DEBUG_TLB_LOG to log to the CPU_LOG_MMU target */ +/* #define DEBUG_TLB */ +/* #define DEBUG_TLB_LOG */ + +#ifdef DEBUG_TLB +#ifdef DEBUG_TLB_LOG +#define tlb_debug(fmt, ...) do { \ + qemu_log_mask(CPU_LOG_MMU, "%s: " fmt, __func__, ## __VA_ARGS__); \ + } while (0) +#else +#define tlb_debug(fmt, ...) do { \ + fprintf(stderr, "%s: " fmt, __func__, ## __VA_ARGS__); \ + } while (0) +#endif +#else +#define tlb_debug(fmt, ...) do { } while (0) +#endif /* statistics */ int tlb_flush_count; @@ -52,9 +67,8 @@ void tlb_flush(CPUState *cpu, int flush_global) { CPUArchState *env = cpu->env_ptr; -#if defined(DEBUG_TLB) - printf("tlb_flush:\n"); -#endif + tlb_debug("global: %d\n", flush_global); + /* must reset current TB so that interrupts cannot modify the links while we are modifying them */ cpu->current_tb = NULL; @@ -87,16 +101,14 @@ void tlb_flush_page(CPUState *cpu, target_ulong addr) int i; int mmu_idx; -#if defined(DEBUG_TLB) - printf("tlb_flush_page: " TARGET_FMT_lx "\n", addr); -#endif + tlb_debug("page :" TARGET_FMT_lx "\n", addr); + /* Check if we need to flush due to large pages. */ if ((addr & env->tlb_flush_mask) == env->tlb_flush_addr) { -#if defined(DEBUG_TLB) - printf("tlb_flush_page: forced full flush (" - TARGET_FMT_lx "/" TARGET_FMT_lx ")\n", - env->tlb_flush_addr, env->tlb_flush_mask); -#endif + tlb_debug("forcing full flush (" + TARGET_FMT_lx "/" TARGET_FMT_lx ")\n", + env->tlb_flush_addr, env->tlb_flush_mask); + tlb_flush(cpu, 1); return; } @@ -272,12 +284,9 @@ void tlb_set_page_with_attrs(CPUState *cpu, target_ulong vaddr, section = address_space_translate_for_iotlb(cpu, paddr, &xlat, &sz); assert(sz >= TARGET_PAGE_SIZE); -#if defined(DEBUG_TLB) - qemu_log_mask(CPU_LOG_MMU, - "tlb_set_page: vaddr=" TARGET_FMT_lx " paddr=0x" TARGET_FMT_plx - " prot=%x idx=%d\n", - vaddr, paddr, prot, mmu_idx); -#endif + tlb_debug("tlb_set_page: vaddr=" TARGET_FMT_lx " paddr=0x" TARGET_FMT_plx + " prot=%x idx=%d\n", + vaddr, paddr, prot, mmu_idx); address = vaddr; if (!memory_region_is_ram(section->mr) && !memory_region_is_romd(section->mr)) {