Message ID | 1484834995-26826-7-git-send-email-peter.maydell@linaro.org |
---|---|
State | Accepted |
Commit | 4d2ec4da1c2d60c9fd8bad137506870c2f980410 |
Headers | show
Delivered-To: patch@linaro.org Received: by 10.140.20.99 with SMTP id 90csp309866qgi; Thu, 19 Jan 2017 06:45:32 -0800 (PST) X-Received: by 10.200.51.6 with SMTP id t6mr7543890qta.75.1484837131980; Thu, 19 Jan 2017 06:45:31 -0800 (PST) Return-Path: <qemu-devel-bounces+patch=linaro.org@nongnu.org> Received: from lists.gnu.org (lists.gnu.org. [2001:4830:134:3::11]) by mx.google.com with ESMTPS id t188si2744213qkh.71.2017.01.19.06.45.31 for <patch@linaro.org> (version=TLS1 cipher=AES128-SHA bits=128/128); Thu, 19 Jan 2017 06:45:31 -0800 (PST) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) client-ip=2001:4830:134:3::11; Authentication-Results: mx.google.com; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) smtp.mailfrom=qemu-devel-bounces+patch=linaro.org@nongnu.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1]:48712 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from <qemu-devel-bounces+patch=linaro.org@nongnu.org>) id 1cUDxx-0004nv-Ie for patch@linaro.org; Thu, 19 Jan 2017 09:45:29 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:47713) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from <pm215@archaic.org.uk>) id 1cUDPx-00014p-2s for qemu-devel@nongnu.org; Thu, 19 Jan 2017 09:10:26 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from <pm215@archaic.org.uk>) id 1cUDPs-0005Ea-7t for qemu-devel@nongnu.org; Thu, 19 Jan 2017 09:10:21 -0500 Received: from orth.archaic.org.uk ([2001:8b0:1d0::2]:48208) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from <pm215@archaic.org.uk>) id 1cUDPr-00055o-W6 for qemu-devel@nongnu.org; Thu, 19 Jan 2017 09:10:16 -0500 Received: from pm215 by orth.archaic.org.uk with local (Exim 4.84_2) (envelope-from <pm215@archaic.org.uk>) id 1cUDPa-00035V-Si for qemu-devel@nongnu.org; Thu, 19 Jan 2017 14:09:58 +0000 From: Peter Maydell <peter.maydell@linaro.org> To: qemu-devel@nongnu.org Date: Thu, 19 Jan 2017 14:09:25 +0000 Message-Id: <1484834995-26826-7-git-send-email-peter.maydell@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1484834995-26826-1-git-send-email-peter.maydell@linaro.org> References: <1484834995-26826-1-git-send-email-peter.maydell@linaro.org> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 2001:8b0:1d0::2 Subject: [Qemu-devel] [PULL 06/36] target/arm: Implement DBGVCR32_EL2 system register X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: <qemu-devel.nongnu.org> List-Unsubscribe: <https://lists.nongnu.org/mailman/options/qemu-devel>, <mailto:qemu-devel-request@nongnu.org?subject=unsubscribe> List-Archive: <http://lists.nongnu.org/archive/html/qemu-devel/> List-Post: <mailto:qemu-devel@nongnu.org> List-Help: <mailto:qemu-devel-request@nongnu.org?subject=help> List-Subscribe: <https://lists.nongnu.org/mailman/listinfo/qemu-devel>, <mailto:qemu-devel-request@nongnu.org?subject=subscribe> Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" <qemu-devel-bounces+patch=linaro.org@nongnu.org> |
Series |
target-arm queue
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diff --git a/target/arm/helper.c b/target/arm/helper.c index ba72ebb..7111c8c 100644 --- a/target/arm/helper.c +++ b/target/arm/helper.c @@ -4066,6 +4066,13 @@ static const ARMCPRegInfo debug_cp_reginfo[] = { .cp = 14, .opc1 = 0, .crn = 0, .crm = 7, .opc2 = 0, .access = PL1_RW, .accessfn = access_tda, .type = ARM_CP_NOP }, + /* Dummy DBGVCR32_EL2 (which is only for a 64-bit hypervisor + * to save and restore a 32-bit guest's DBGVCR) + */ + { .name = "DBGVCR32_EL2", .state = ARM_CP_STATE_AA64, + .opc0 = 2, .opc1 = 4, .crn = 0, .crm = 7, .opc2 = 0, + .access = PL2_RW, .accessfn = access_tda, + .type = ARM_CP_NOP }, /* Dummy MDCCINT_EL1, since we don't implement the Debug Communications * Channel but Linux may try to access this register. The 32-bit * alias is DBGDCCINT.