From patchwork Fri Jul 14 10:51:26 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 107767 Delivered-To: patches@linaro.org Received: by 10.140.101.44 with SMTP id t41csp729870qge; Fri, 14 Jul 2017 03:51:32 -0700 (PDT) X-Received: by 10.223.177.129 with SMTP id q1mr4308291wra.82.1500029492164; Fri, 14 Jul 2017 03:51:32 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1500029492; cv=none; d=google.com; s=arc-20160816; b=Ku6+OqU/OXBenj+m7G73DbZl3tLW9hQvj0vQkA5HlXw+tJJ619xLP/GfcirKfCEKCX mWfb+OGf5U+2BuxFLW6V5lmkd4yKWByHw8DTxFlX/9kQQcvvleKZwbncUjCfL9MpZSfy QcxGGdb2F+EAr6/0US1p+uDA+6gyMXtGk4Od20ExvK7W6eI0v2z0pQKBZd+m3ompcJHd /fMK5fNl97qtEPEagMCt2I8tBli3OADFp6LI7a4WzH2fKa2H261c1skgwteKm2+UuPKn FRfpXECcKcgXt2gBNjF30RjFkIfpOVYP5a4c5jBX1v6MqoDZEjJfyIEB4ZBtRQItVLtD o/iA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=references:in-reply-to:message-id:date:subject:cc:to:from :arc-authentication-results; bh=Ib5qjF6V1Xog+q12Z6XgE4Gj9if8VsqjpQOSwkwD7d8=; b=uYH0iK+qfVzYR409Mrbe/pZrRqhvoaWaKnsHYnMXIcczdFJ0vG9dB++qMoL4GgwpKO DWuupkUhJngvbnWuHaUNcasBIUu/JcydFc85V2YdmpklxaUz691BtN8W+7qOxi93dvrs aTolWpgdCe/UqG6+t5Cql5Csi4apkjCnbPaYsliV9YxSQa5IasOkXipd1ptkcyvW6NFG kwBQfTVpQ/j2stJEV9rwzb+9ITnUNRHIkSR91W6TC1ffiy/V+syjuDDjMdN+X0KHp3Dj o99OJ+tAhoAguSQrDxIpADh9LRTMP6ati6DepV3wAP7Zg6hv+nBtd47VR4alPEJQAbsX EK0Q== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of pm215@archaic.org.uk designates 2001:8b0:1d0::2 as permitted sender) smtp.mailfrom=pm215@archaic.org.uk; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from orth.archaic.org.uk (orth.archaic.org.uk. [2001:8b0:1d0::2]) by mx.google.com with ESMTPS id c67si1896009wmf.186.2017.07.14.03.51.31 for (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 14 Jul 2017 03:51:32 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of pm215@archaic.org.uk designates 2001:8b0:1d0::2 as permitted sender) client-ip=2001:8b0:1d0::2; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of pm215@archaic.org.uk designates 2001:8b0:1d0::2 as permitted sender) smtp.mailfrom=pm215@archaic.org.uk; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from pm215 by orth.archaic.org.uk with local (Exim 4.84_2) (envelope-from ) id 1dVyC3-0007lk-Ne; Fri, 14 Jul 2017 11:51:31 +0100 From: Peter Maydell To: qemu-arm@nongnu.org, qemu-devel@nongnu.org Cc: patches@linaro.org, =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Alistair Francis Subject: [PATCH v2 8/9] hw/arm/mps2: Add ethernet Date: Fri, 14 Jul 2017 11:51:26 +0100 Message-Id: <1500029487-14822-9-git-send-email-peter.maydell@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1500029487-14822-1-git-send-email-peter.maydell@linaro.org> References: <1500029487-14822-1-git-send-email-peter.maydell@linaro.org> The MPS2 FPGA images support ethernet via a LAN9220. We use QEMU's LAN9118 model, which is software compatible except that it is missing the checksum-offload feature. Signed-off-by: Peter Maydell --- hw/arm/mps2.c | 10 +++++++++- 1 file changed, 9 insertions(+), 1 deletion(-) -- 2.7.4 Reviewed-by: Alex Bennée Reviewed-by: Philippe Mathieu-Daudé diff --git a/hw/arm/mps2.c b/hw/arm/mps2.c index bdc631a..6adfb22 100644 --- a/hw/arm/mps2.c +++ b/hw/arm/mps2.c @@ -35,6 +35,8 @@ #include "hw/char/cmsdk-apb-uart.h" #include "hw/timer/cmsdk-apb-timer.h" #include "hw/misc/mps2-scc.h" +#include "hw/devices.h" +#include "net/net.h" typedef enum MPS2FPGAType { FPGA_AN385, @@ -210,7 +212,6 @@ static void mps2_common_init(MachineState *machine) create_unimplemented_device("Extra peripheral region @0x40020000", 0x40020000, 0x00010000); create_unimplemented_device("RESERVED 4", 0x40030000, 0x001D0000); - create_unimplemented_device("Ethernet", 0x40200000, 0x00100000); create_unimplemented_device("VGA", 0x41000000, 0x0200000); switch (mmc->fpga_type) { @@ -309,6 +310,13 @@ static void mps2_common_init(MachineState *machine) &error_fatal); sysbus_mmio_map(SYS_BUS_DEVICE(sccdev), 0, 0x4002f000); + /* In hardware this is a LAN9220; the LAN9118 is software compatible + * except that it doesn't support the checksum-offload feature. + */ + lan9118_init(&nd_table[0], 0x40200000, + qdev_get_gpio_in(armv7m, + mmc->fpga_type == FPGA_AN385 ? 13 : 47)); + system_clock_scale = NANOSECONDS_PER_SECOND / SYSCLK_FRQ; armv7m_load_kernel(ARM_CPU(first_cpu), machine->kernel_filename,