From patchwork Fri Sep 22 15:00:07 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 114053 Delivered-To: patches@linaro.org Received: by 10.140.106.117 with SMTP id d108csp3394999qgf; Fri, 22 Sep 2017 07:59:44 -0700 (PDT) X-Google-Smtp-Source: AOwi7QCOiaaFc20s/nPfaDUTaj6xpBUP+cmyE9aJWGhbm7lkavBfFRjvrnqlkLyBG+FMKXVU8k8v X-Received: by 10.223.160.68 with SMTP id l4mr5013018wrl.79.1506092384215; Fri, 22 Sep 2017 07:59:44 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1506092384; cv=none; d=google.com; s=arc-20160816; b=DbejJlRMc2w2opi8Q28x2Mg65ys3XjcQ0HyqZNhf29bXIytr1VYgTUg6rvAoTxnXkE B2lP4eGcNMRtFTJdB7HF1Ym5LiqUKn6KY6wQllBmJdWujoWy1nVi3+31fiCT/pI30fqX iaaC66vsi1xNdK+mBoLbSxKXjIfwFWH0E+ywBR3zX1EO/Rk2PEm1wkLtD1bm0b/d85pW uhPP3b1JeCfkeTWr+AUDGyAFv54PCUjEx+Pq5Cff27fW4P36+5078hu8tzjYxXr6O1hw BVTqy649dxO30qlA84R+KjLxWwl8DrrN3JNtDeqJy/x6iN5BnYshfeKYnLE7VzKJJmj0 Ee/Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=references:in-reply-to:message-id:date:subject:cc:to:from :arc-authentication-results; bh=uPO11BNzIv7vz899Ht/+YwTX8A/SEtw3h5ZF3Wqohig=; b=sjihLtQOQPlGwZr6uUTqftBkyRpiJEilZoY7oYfft1nwfAI59YXVsqHD3QN2A4k3bx U9DzJQzlPzinytLK8MeUXf9IrXskvhQ2ZSawFPxPxltads4cgkHadhYhyv9psfdky0j/ 95xzCcVP7Jb9QIxjWWEer0SGxl/nKenvhitJTqBMDS3WXgftVdL5KBUW45WXMA6MxxCn snkWKXyAZzyQ9f3hQB9L1PWLeh0Fqk2x2jSqccu5CMReuGjsTU0ZA9I4Y6ABsaJLUTjo 6yjw+NjQoiPEUNtNKRWXkGU2ZMNRdSq8mTCSCNTAtk8ZPZnrXwKdeW1mmpSlsCKVVITe aGuA== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of pm215@archaic.org.uk designates 2001:8b0:1d0::2 as permitted sender) smtp.mailfrom=pm215@archaic.org.uk; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from orth.archaic.org.uk (orth.archaic.org.uk. [2001:8b0:1d0::2]) by mx.google.com with ESMTPS id n17si18051wrg.297.2017.09.22.07.59.44 for (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Fri, 22 Sep 2017 07:59:44 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of pm215@archaic.org.uk designates 2001:8b0:1d0::2 as permitted sender) client-ip=2001:8b0:1d0::2; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of pm215@archaic.org.uk designates 2001:8b0:1d0::2 as permitted sender) smtp.mailfrom=pm215@archaic.org.uk; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from pm215 by orth.archaic.org.uk with local (Exim 4.89) (envelope-from ) id 1dvPQd-0007H9-Mw; Fri, 22 Sep 2017 15:59:43 +0100 From: Peter Maydell To: qemu-arm@nongnu.org, qemu-devel@nongnu.org Cc: patches@linaro.org Subject: [PATCH 20/20] nvic: Add missing code for writing SHCSR.HARDFAULTPENDED bit Date: Fri, 22 Sep 2017 16:00:07 +0100 Message-Id: <1506092407-26985-21-git-send-email-peter.maydell@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1506092407-26985-1-git-send-email-peter.maydell@linaro.org> References: <1506092407-26985-1-git-send-email-peter.maydell@linaro.org> When we added support for the new SHCSR bits in v8M in commit 437d59c17e9 the code to support writing to the new HARDFAULTPENDED bit was accidentally only added for non-secure writes; the secure banked version of the bit should also be writable. Signed-off-by: Peter Maydell --- hw/intc/armv7m_nvic.c | 1 + 1 file changed, 1 insertion(+) -- 2.7.4 Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson diff --git a/hw/intc/armv7m_nvic.c b/hw/intc/armv7m_nvic.c index bd1d5d3..22d5e6e 100644 --- a/hw/intc/armv7m_nvic.c +++ b/hw/intc/armv7m_nvic.c @@ -1230,6 +1230,7 @@ static void nvic_writel(NVICState *s, uint32_t offset, uint32_t value, s->sec_vectors[ARMV7M_EXCP_BUS].enabled = (value & (1 << 17)) != 0; s->sec_vectors[ARMV7M_EXCP_USAGE].enabled = (value & (1 << 18)) != 0; + s->sec_vectors[ARMV7M_EXCP_HARD].pending = (value & (1 << 21)) != 0; /* SecureFault not banked, but RAZ/WI to NS */ s->vectors[ARMV7M_EXCP_SECURE].active = (value & (1 << 4)) != 0; s->vectors[ARMV7M_EXCP_SECURE].enabled = (value & (1 << 19)) != 0;